1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * SMI PCIe driver for DVBSky cards.
4 *
5 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
6 */
7
8 #include "smipcie.h"
9 #include "m88ds3103.h"
10 #include "ts2020.h"
11 #include "m88rs6000t.h"
12 #include "si2168.h"
13 #include "si2157.h"
14
15 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
16
smi_hw_init(struct smi_dev * dev)17 static int smi_hw_init(struct smi_dev *dev)
18 {
19 u32 port_mux, port_ctrl, int_stat;
20
21 /* set port mux.*/
22 port_mux = smi_read(MUX_MODE_CTRL);
23 port_mux &= ~(rbPaMSMask);
24 port_mux |= rbPaMSDtvNoGpio;
25 port_mux &= ~(rbPbMSMask);
26 port_mux |= rbPbMSDtvNoGpio;
27 port_mux &= ~(0x0f0000);
28 port_mux |= 0x50000;
29 smi_write(MUX_MODE_CTRL, port_mux);
30
31 /* set DTV register.*/
32 /* Port A */
33 port_ctrl = smi_read(VIDEO_CTRL_STATUS_A);
34 port_ctrl &= ~0x01;
35 smi_write(VIDEO_CTRL_STATUS_A, port_ctrl);
36 port_ctrl = smi_read(MPEG2_CTRL_A);
37 port_ctrl &= ~0x40;
38 port_ctrl |= 0x80;
39 smi_write(MPEG2_CTRL_A, port_ctrl);
40 /* Port B */
41 port_ctrl = smi_read(VIDEO_CTRL_STATUS_B);
42 port_ctrl &= ~0x01;
43 smi_write(VIDEO_CTRL_STATUS_B, port_ctrl);
44 port_ctrl = smi_read(MPEG2_CTRL_B);
45 port_ctrl &= ~0x40;
46 port_ctrl |= 0x80;
47 smi_write(MPEG2_CTRL_B, port_ctrl);
48
49 /* disable and clear interrupt.*/
50 smi_write(MSI_INT_ENA_CLR, ALL_INT);
51 int_stat = smi_read(MSI_INT_STATUS);
52 smi_write(MSI_INT_STATUS_CLR, int_stat);
53
54 /* reset demod.*/
55 smi_clear(PERIPHERAL_CTRL, 0x0303);
56 msleep(50);
57 smi_set(PERIPHERAL_CTRL, 0x0101);
58 return 0;
59 }
60
61 /* i2c bit bus.*/
smi_i2c_cfg(struct smi_dev * dev,u32 sw_ctl)62 static void smi_i2c_cfg(struct smi_dev *dev, u32 sw_ctl)
63 {
64 u32 dwCtrl;
65
66 dwCtrl = smi_read(sw_ctl);
67 dwCtrl &= ~0x18; /* disable output.*/
68 dwCtrl |= 0x21; /* reset and software mode.*/
69 dwCtrl &= ~0xff00;
70 dwCtrl |= 0x6400;
71 smi_write(sw_ctl, dwCtrl);
72 msleep(20);
73 dwCtrl = smi_read(sw_ctl);
74 dwCtrl &= ~0x20;
75 smi_write(sw_ctl, dwCtrl);
76 }
77
smi_i2c_setsda(struct smi_dev * dev,int state,u32 sw_ctl)78 static void smi_i2c_setsda(struct smi_dev *dev, int state, u32 sw_ctl)
79 {
80 if (state) {
81 /* set as input.*/
82 smi_clear(sw_ctl, SW_I2C_MSK_DAT_EN);
83 } else {
84 smi_clear(sw_ctl, SW_I2C_MSK_DAT_OUT);
85 /* set as output.*/
86 smi_set(sw_ctl, SW_I2C_MSK_DAT_EN);
87 }
88 }
89
smi_i2c_setscl(void * data,int state,u32 sw_ctl)90 static void smi_i2c_setscl(void *data, int state, u32 sw_ctl)
91 {
92 struct smi_dev *dev = data;
93
94 if (state) {
95 /* set as input.*/
96 smi_clear(sw_ctl, SW_I2C_MSK_CLK_EN);
97 } else {
98 smi_clear(sw_ctl, SW_I2C_MSK_CLK_OUT);
99 /* set as output.*/
100 smi_set(sw_ctl, SW_I2C_MSK_CLK_EN);
101 }
102 }
103
smi_i2c_getsda(void * data,u32 sw_ctl)104 static int smi_i2c_getsda(void *data, u32 sw_ctl)
105 {
106 struct smi_dev *dev = data;
107 /* set as input.*/
108 smi_clear(sw_ctl, SW_I2C_MSK_DAT_EN);
109 udelay(1);
110 return (smi_read(sw_ctl) & SW_I2C_MSK_DAT_IN) ? 1 : 0;
111 }
112
smi_i2c_getscl(void * data,u32 sw_ctl)113 static int smi_i2c_getscl(void *data, u32 sw_ctl)
114 {
115 struct smi_dev *dev = data;
116 /* set as input.*/
117 smi_clear(sw_ctl, SW_I2C_MSK_CLK_EN);
118 udelay(1);
119 return (smi_read(sw_ctl) & SW_I2C_MSK_CLK_IN) ? 1 : 0;
120 }
121 /* i2c 0.*/
smi_i2c0_setsda(void * data,int state)122 static void smi_i2c0_setsda(void *data, int state)
123 {
124 struct smi_dev *dev = data;
125
126 smi_i2c_setsda(dev, state, I2C_A_SW_CTL);
127 }
128
smi_i2c0_setscl(void * data,int state)129 static void smi_i2c0_setscl(void *data, int state)
130 {
131 struct smi_dev *dev = data;
132
133 smi_i2c_setscl(dev, state, I2C_A_SW_CTL);
134 }
135
smi_i2c0_getsda(void * data)136 static int smi_i2c0_getsda(void *data)
137 {
138 struct smi_dev *dev = data;
139
140 return smi_i2c_getsda(dev, I2C_A_SW_CTL);
141 }
142
smi_i2c0_getscl(void * data)143 static int smi_i2c0_getscl(void *data)
144 {
145 struct smi_dev *dev = data;
146
147 return smi_i2c_getscl(dev, I2C_A_SW_CTL);
148 }
149 /* i2c 1.*/
smi_i2c1_setsda(void * data,int state)150 static void smi_i2c1_setsda(void *data, int state)
151 {
152 struct smi_dev *dev = data;
153
154 smi_i2c_setsda(dev, state, I2C_B_SW_CTL);
155 }
156
smi_i2c1_setscl(void * data,int state)157 static void smi_i2c1_setscl(void *data, int state)
158 {
159 struct smi_dev *dev = data;
160
161 smi_i2c_setscl(dev, state, I2C_B_SW_CTL);
162 }
163
smi_i2c1_getsda(void * data)164 static int smi_i2c1_getsda(void *data)
165 {
166 struct smi_dev *dev = data;
167
168 return smi_i2c_getsda(dev, I2C_B_SW_CTL);
169 }
170
smi_i2c1_getscl(void * data)171 static int smi_i2c1_getscl(void *data)
172 {
173 struct smi_dev *dev = data;
174
175 return smi_i2c_getscl(dev, I2C_B_SW_CTL);
176 }
177
smi_i2c_init(struct smi_dev * dev)178 static int smi_i2c_init(struct smi_dev *dev)
179 {
180 int ret;
181
182 /* i2c bus 0 */
183 smi_i2c_cfg(dev, I2C_A_SW_CTL);
184 i2c_set_adapdata(&dev->i2c_bus[0], dev);
185 strscpy(dev->i2c_bus[0].name, "SMI-I2C0", sizeof(dev->i2c_bus[0].name));
186 dev->i2c_bus[0].owner = THIS_MODULE;
187 dev->i2c_bus[0].dev.parent = &dev->pci_dev->dev;
188 dev->i2c_bus[0].algo_data = &dev->i2c_bit[0];
189 dev->i2c_bit[0].data = dev;
190 dev->i2c_bit[0].setsda = smi_i2c0_setsda;
191 dev->i2c_bit[0].setscl = smi_i2c0_setscl;
192 dev->i2c_bit[0].getsda = smi_i2c0_getsda;
193 dev->i2c_bit[0].getscl = smi_i2c0_getscl;
194 dev->i2c_bit[0].udelay = 12;
195 dev->i2c_bit[0].timeout = 10;
196 /* Raise SCL and SDA */
197 smi_i2c0_setsda(dev, 1);
198 smi_i2c0_setscl(dev, 1);
199
200 ret = i2c_bit_add_bus(&dev->i2c_bus[0]);
201 if (ret < 0)
202 return ret;
203
204 /* i2c bus 1 */
205 smi_i2c_cfg(dev, I2C_B_SW_CTL);
206 i2c_set_adapdata(&dev->i2c_bus[1], dev);
207 strscpy(dev->i2c_bus[1].name, "SMI-I2C1", sizeof(dev->i2c_bus[1].name));
208 dev->i2c_bus[1].owner = THIS_MODULE;
209 dev->i2c_bus[1].dev.parent = &dev->pci_dev->dev;
210 dev->i2c_bus[1].algo_data = &dev->i2c_bit[1];
211 dev->i2c_bit[1].data = dev;
212 dev->i2c_bit[1].setsda = smi_i2c1_setsda;
213 dev->i2c_bit[1].setscl = smi_i2c1_setscl;
214 dev->i2c_bit[1].getsda = smi_i2c1_getsda;
215 dev->i2c_bit[1].getscl = smi_i2c1_getscl;
216 dev->i2c_bit[1].udelay = 12;
217 dev->i2c_bit[1].timeout = 10;
218 /* Raise SCL and SDA */
219 smi_i2c1_setsda(dev, 1);
220 smi_i2c1_setscl(dev, 1);
221
222 ret = i2c_bit_add_bus(&dev->i2c_bus[1]);
223 if (ret < 0)
224 i2c_del_adapter(&dev->i2c_bus[0]);
225
226 return ret;
227 }
228
smi_i2c_exit(struct smi_dev * dev)229 static void smi_i2c_exit(struct smi_dev *dev)
230 {
231 i2c_del_adapter(&dev->i2c_bus[0]);
232 i2c_del_adapter(&dev->i2c_bus[1]);
233 }
234
smi_read_eeprom(struct i2c_adapter * i2c,u16 reg,u8 * data,u16 size)235 static int smi_read_eeprom(struct i2c_adapter *i2c, u16 reg, u8 *data, u16 size)
236 {
237 int ret;
238 u8 b0[2] = { (reg >> 8) & 0xff, reg & 0xff };
239
240 struct i2c_msg msg[] = {
241 { .addr = 0x50, .flags = 0,
242 .buf = b0, .len = 2 },
243 { .addr = 0x50, .flags = I2C_M_RD,
244 .buf = data, .len = size }
245 };
246
247 ret = i2c_transfer(i2c, msg, 2);
248
249 if (ret != 2) {
250 dev_err(&i2c->dev, "%s: reg=0x%x (error=%d)\n",
251 __func__, reg, ret);
252 return ret;
253 }
254 return ret;
255 }
256
257 /* ts port interrupt operations */
smi_port_disableInterrupt(struct smi_port * port)258 static void smi_port_disableInterrupt(struct smi_port *port)
259 {
260 struct smi_dev *dev = port->dev;
261
262 smi_write(MSI_INT_ENA_CLR,
263 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1));
264 }
265
smi_port_enableInterrupt(struct smi_port * port)266 static void smi_port_enableInterrupt(struct smi_port *port)
267 {
268 struct smi_dev *dev = port->dev;
269
270 smi_write(MSI_INT_ENA_SET,
271 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1));
272 }
273
smi_port_clearInterrupt(struct smi_port * port)274 static void smi_port_clearInterrupt(struct smi_port *port)
275 {
276 struct smi_dev *dev = port->dev;
277
278 smi_write(MSI_INT_STATUS_CLR,
279 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1));
280 }
281
282 /* tasklet handler: DMA data to dmx.*/
smi_dma_xfer(struct tasklet_struct * t)283 static void smi_dma_xfer(struct tasklet_struct *t)
284 {
285 struct smi_port *port = from_tasklet(port, t, tasklet);
286 struct smi_dev *dev = port->dev;
287 u32 intr_status, finishedData, dmaManagement;
288 u8 dmaChan0State, dmaChan1State;
289
290 intr_status = port->_int_status;
291 dmaManagement = smi_read(port->DMA_MANAGEMENT);
292 dmaChan0State = (u8)((dmaManagement & 0x00000030) >> 4);
293 dmaChan1State = (u8)((dmaManagement & 0x00300000) >> 20);
294
295 /* CH-0 DMA interrupt.*/
296 if ((intr_status & port->_dmaInterruptCH0) && (dmaChan0State == 0x01)) {
297 dev_dbg(&dev->pci_dev->dev,
298 "Port[%d]-DMA CH0 engine complete successful !\n",
299 port->idx);
300 finishedData = smi_read(port->DMA_CHAN0_TRANS_STATE);
301 finishedData &= 0x003FFFFF;
302 /* value of DMA_PORT0_CHAN0_TRANS_STATE register [21:0]
303 * indicate dma total transfer length and
304 * zero of [21:0] indicate dma total transfer length
305 * equal to 0x400000 (4MB)*/
306 if (finishedData == 0)
307 finishedData = 0x00400000;
308 if (finishedData != SMI_TS_DMA_BUF_SIZE) {
309 dev_dbg(&dev->pci_dev->dev,
310 "DMA CH0 engine complete length mismatched, finish data=%d !\n",
311 finishedData);
312 }
313 dvb_dmx_swfilter_packets(&port->demux,
314 port->cpu_addr[0], (finishedData / 188));
315 /*dvb_dmx_swfilter(&port->demux,
316 port->cpu_addr[0], finishedData);*/
317 }
318 /* CH-1 DMA interrupt.*/
319 if ((intr_status & port->_dmaInterruptCH1) && (dmaChan1State == 0x01)) {
320 dev_dbg(&dev->pci_dev->dev,
321 "Port[%d]-DMA CH1 engine complete successful !\n",
322 port->idx);
323 finishedData = smi_read(port->DMA_CHAN1_TRANS_STATE);
324 finishedData &= 0x003FFFFF;
325 /* value of DMA_PORT0_CHAN0_TRANS_STATE register [21:0]
326 * indicate dma total transfer length and
327 * zero of [21:0] indicate dma total transfer length
328 * equal to 0x400000 (4MB)*/
329 if (finishedData == 0)
330 finishedData = 0x00400000;
331 if (finishedData != SMI_TS_DMA_BUF_SIZE) {
332 dev_dbg(&dev->pci_dev->dev,
333 "DMA CH1 engine complete length mismatched, finish data=%d !\n",
334 finishedData);
335 }
336 dvb_dmx_swfilter_packets(&port->demux,
337 port->cpu_addr[1], (finishedData / 188));
338 /*dvb_dmx_swfilter(&port->demux,
339 port->cpu_addr[1], finishedData);*/
340 }
341 /* restart DMA.*/
342 if (intr_status & port->_dmaInterruptCH0)
343 dmaManagement |= 0x00000002;
344 if (intr_status & port->_dmaInterruptCH1)
345 dmaManagement |= 0x00020000;
346 smi_write(port->DMA_MANAGEMENT, dmaManagement);
347 /* Re-enable interrupts */
348 smi_port_enableInterrupt(port);
349 }
350
smi_port_dma_free(struct smi_port * port)351 static void smi_port_dma_free(struct smi_port *port)
352 {
353 if (port->cpu_addr[0]) {
354 pci_free_consistent(port->dev->pci_dev, SMI_TS_DMA_BUF_SIZE,
355 port->cpu_addr[0], port->dma_addr[0]);
356 port->cpu_addr[0] = NULL;
357 }
358 if (port->cpu_addr[1]) {
359 pci_free_consistent(port->dev->pci_dev, SMI_TS_DMA_BUF_SIZE,
360 port->cpu_addr[1], port->dma_addr[1]);
361 port->cpu_addr[1] = NULL;
362 }
363 }
364
smi_port_init(struct smi_port * port,int dmaChanUsed)365 static int smi_port_init(struct smi_port *port, int dmaChanUsed)
366 {
367 dev_dbg(&port->dev->pci_dev->dev,
368 "%s, port %d, dmaused %d\n", __func__, port->idx, dmaChanUsed);
369 port->enable = 0;
370 if (port->idx == 0) {
371 /* Port A */
372 port->_dmaInterruptCH0 = dmaChanUsed & 0x01;
373 port->_dmaInterruptCH1 = dmaChanUsed & 0x02;
374
375 port->DMA_CHAN0_ADDR_LOW = DMA_PORTA_CHAN0_ADDR_LOW;
376 port->DMA_CHAN0_ADDR_HI = DMA_PORTA_CHAN0_ADDR_HI;
377 port->DMA_CHAN0_TRANS_STATE = DMA_PORTA_CHAN0_TRANS_STATE;
378 port->DMA_CHAN0_CONTROL = DMA_PORTA_CHAN0_CONTROL;
379 port->DMA_CHAN1_ADDR_LOW = DMA_PORTA_CHAN1_ADDR_LOW;
380 port->DMA_CHAN1_ADDR_HI = DMA_PORTA_CHAN1_ADDR_HI;
381 port->DMA_CHAN1_TRANS_STATE = DMA_PORTA_CHAN1_TRANS_STATE;
382 port->DMA_CHAN1_CONTROL = DMA_PORTA_CHAN1_CONTROL;
383 port->DMA_MANAGEMENT = DMA_PORTA_MANAGEMENT;
384 } else {
385 /* Port B */
386 port->_dmaInterruptCH0 = (dmaChanUsed << 2) & 0x04;
387 port->_dmaInterruptCH1 = (dmaChanUsed << 2) & 0x08;
388
389 port->DMA_CHAN0_ADDR_LOW = DMA_PORTB_CHAN0_ADDR_LOW;
390 port->DMA_CHAN0_ADDR_HI = DMA_PORTB_CHAN0_ADDR_HI;
391 port->DMA_CHAN0_TRANS_STATE = DMA_PORTB_CHAN0_TRANS_STATE;
392 port->DMA_CHAN0_CONTROL = DMA_PORTB_CHAN0_CONTROL;
393 port->DMA_CHAN1_ADDR_LOW = DMA_PORTB_CHAN1_ADDR_LOW;
394 port->DMA_CHAN1_ADDR_HI = DMA_PORTB_CHAN1_ADDR_HI;
395 port->DMA_CHAN1_TRANS_STATE = DMA_PORTB_CHAN1_TRANS_STATE;
396 port->DMA_CHAN1_CONTROL = DMA_PORTB_CHAN1_CONTROL;
397 port->DMA_MANAGEMENT = DMA_PORTB_MANAGEMENT;
398 }
399
400 if (port->_dmaInterruptCH0) {
401 port->cpu_addr[0] = pci_alloc_consistent(port->dev->pci_dev,
402 SMI_TS_DMA_BUF_SIZE,
403 &port->dma_addr[0]);
404 if (!port->cpu_addr[0]) {
405 dev_err(&port->dev->pci_dev->dev,
406 "Port[%d] DMA CH0 memory allocation failed!\n",
407 port->idx);
408 goto err;
409 }
410 }
411
412 if (port->_dmaInterruptCH1) {
413 port->cpu_addr[1] = pci_alloc_consistent(port->dev->pci_dev,
414 SMI_TS_DMA_BUF_SIZE,
415 &port->dma_addr[1]);
416 if (!port->cpu_addr[1]) {
417 dev_err(&port->dev->pci_dev->dev,
418 "Port[%d] DMA CH1 memory allocation failed!\n",
419 port->idx);
420 goto err;
421 }
422 }
423
424 smi_port_disableInterrupt(port);
425 tasklet_setup(&port->tasklet, smi_dma_xfer);
426 tasklet_disable(&port->tasklet);
427 port->enable = 1;
428 return 0;
429 err:
430 smi_port_dma_free(port);
431 return -ENOMEM;
432 }
433
smi_port_exit(struct smi_port * port)434 static void smi_port_exit(struct smi_port *port)
435 {
436 smi_port_disableInterrupt(port);
437 tasklet_kill(&port->tasklet);
438 smi_port_dma_free(port);
439 port->enable = 0;
440 }
441
smi_port_irq(struct smi_port * port,u32 int_status)442 static int smi_port_irq(struct smi_port *port, u32 int_status)
443 {
444 u32 port_req_irq = port->_dmaInterruptCH0 | port->_dmaInterruptCH1;
445 int handled = 0;
446
447 if (int_status & port_req_irq) {
448 smi_port_disableInterrupt(port);
449 port->_int_status = int_status;
450 smi_port_clearInterrupt(port);
451 tasklet_schedule(&port->tasklet);
452 handled = 1;
453 }
454 return handled;
455 }
456
smi_irq_handler(int irq,void * dev_id)457 static irqreturn_t smi_irq_handler(int irq, void *dev_id)
458 {
459 struct smi_dev *dev = dev_id;
460 struct smi_port *port0 = &dev->ts_port[0];
461 struct smi_port *port1 = &dev->ts_port[1];
462 struct smi_rc *ir = &dev->ir;
463 int handled = 0;
464
465 u32 intr_status = smi_read(MSI_INT_STATUS);
466
467 /* ts0 interrupt.*/
468 if (dev->info->ts_0)
469 handled += smi_port_irq(port0, intr_status);
470
471 /* ts1 interrupt.*/
472 if (dev->info->ts_1)
473 handled += smi_port_irq(port1, intr_status);
474
475 /* ir interrupt.*/
476 handled += smi_ir_irq(ir, intr_status);
477
478 return IRQ_RETVAL(handled);
479 }
480
smi_add_i2c_client(struct i2c_adapter * adapter,struct i2c_board_info * info)481 static struct i2c_client *smi_add_i2c_client(struct i2c_adapter *adapter,
482 struct i2c_board_info *info)
483 {
484 struct i2c_client *client;
485
486 request_module(info->type);
487 client = i2c_new_client_device(adapter, info);
488 if (!i2c_client_has_driver(client))
489 goto err_add_i2c_client;
490
491 if (!try_module_get(client->dev.driver->owner)) {
492 i2c_unregister_device(client);
493 goto err_add_i2c_client;
494 }
495 return client;
496
497 err_add_i2c_client:
498 client = NULL;
499 return client;
500 }
501
smi_del_i2c_client(struct i2c_client * client)502 static void smi_del_i2c_client(struct i2c_client *client)
503 {
504 module_put(client->dev.driver->owner);
505 i2c_unregister_device(client);
506 }
507
508 static const struct m88ds3103_config smi_dvbsky_m88ds3103_cfg = {
509 .i2c_addr = 0x68,
510 .clock = 27000000,
511 .i2c_wr_max = 33,
512 .clock_out = 0,
513 .ts_mode = M88DS3103_TS_PARALLEL,
514 .ts_clk = 16000,
515 .ts_clk_pol = 1,
516 .agc = 0x99,
517 .lnb_hv_pol = 0,
518 .lnb_en_pol = 1,
519 };
520
smi_dvbsky_m88ds3103_fe_attach(struct smi_port * port)521 static int smi_dvbsky_m88ds3103_fe_attach(struct smi_port *port)
522 {
523 int ret = 0;
524 struct smi_dev *dev = port->dev;
525 struct i2c_adapter *i2c;
526 /* tuner I2C module */
527 struct i2c_adapter *tuner_i2c_adapter;
528 struct i2c_client *tuner_client;
529 struct i2c_board_info tuner_info;
530 struct ts2020_config ts2020_config = {};
531 memset(&tuner_info, 0, sizeof(struct i2c_board_info));
532 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1];
533
534 /* attach demod */
535 port->fe = dvb_attach(m88ds3103_attach,
536 &smi_dvbsky_m88ds3103_cfg, i2c, &tuner_i2c_adapter);
537 if (!port->fe) {
538 ret = -ENODEV;
539 return ret;
540 }
541 /* attach tuner */
542 ts2020_config.fe = port->fe;
543 strscpy(tuner_info.type, "ts2020", I2C_NAME_SIZE);
544 tuner_info.addr = 0x60;
545 tuner_info.platform_data = &ts2020_config;
546 tuner_client = smi_add_i2c_client(tuner_i2c_adapter, &tuner_info);
547 if (!tuner_client) {
548 ret = -ENODEV;
549 goto err_tuner_i2c_device;
550 }
551
552 /* delegate signal strength measurement to tuner */
553 port->fe->ops.read_signal_strength =
554 port->fe->ops.tuner_ops.get_rf_strength;
555
556 port->i2c_client_tuner = tuner_client;
557 return ret;
558
559 err_tuner_i2c_device:
560 dvb_frontend_detach(port->fe);
561 return ret;
562 }
563
564 static const struct m88ds3103_config smi_dvbsky_m88rs6000_cfg = {
565 .i2c_addr = 0x69,
566 .clock = 27000000,
567 .i2c_wr_max = 33,
568 .ts_mode = M88DS3103_TS_PARALLEL,
569 .ts_clk = 16000,
570 .ts_clk_pol = 1,
571 .agc = 0x99,
572 .lnb_hv_pol = 0,
573 .lnb_en_pol = 1,
574 };
575
smi_dvbsky_m88rs6000_fe_attach(struct smi_port * port)576 static int smi_dvbsky_m88rs6000_fe_attach(struct smi_port *port)
577 {
578 int ret = 0;
579 struct smi_dev *dev = port->dev;
580 struct i2c_adapter *i2c;
581 /* tuner I2C module */
582 struct i2c_adapter *tuner_i2c_adapter;
583 struct i2c_client *tuner_client;
584 struct i2c_board_info tuner_info;
585 struct m88rs6000t_config m88rs6000t_config;
586
587 memset(&tuner_info, 0, sizeof(struct i2c_board_info));
588 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1];
589
590 /* attach demod */
591 port->fe = dvb_attach(m88ds3103_attach,
592 &smi_dvbsky_m88rs6000_cfg, i2c, &tuner_i2c_adapter);
593 if (!port->fe) {
594 ret = -ENODEV;
595 return ret;
596 }
597 /* attach tuner */
598 m88rs6000t_config.fe = port->fe;
599 strscpy(tuner_info.type, "m88rs6000t", I2C_NAME_SIZE);
600 tuner_info.addr = 0x21;
601 tuner_info.platform_data = &m88rs6000t_config;
602 tuner_client = smi_add_i2c_client(tuner_i2c_adapter, &tuner_info);
603 if (!tuner_client) {
604 ret = -ENODEV;
605 goto err_tuner_i2c_device;
606 }
607
608 /* delegate signal strength measurement to tuner */
609 port->fe->ops.read_signal_strength =
610 port->fe->ops.tuner_ops.get_rf_strength;
611
612 port->i2c_client_tuner = tuner_client;
613 return ret;
614
615 err_tuner_i2c_device:
616 dvb_frontend_detach(port->fe);
617 return ret;
618 }
619
smi_dvbsky_sit2_fe_attach(struct smi_port * port)620 static int smi_dvbsky_sit2_fe_attach(struct smi_port *port)
621 {
622 int ret = 0;
623 struct smi_dev *dev = port->dev;
624 struct i2c_adapter *i2c;
625 struct i2c_adapter *tuner_i2c_adapter;
626 struct i2c_client *client_tuner, *client_demod;
627 struct i2c_board_info client_info;
628 struct si2168_config si2168_config;
629 struct si2157_config si2157_config;
630
631 /* select i2c bus */
632 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1];
633
634 /* attach demod */
635 memset(&si2168_config, 0, sizeof(si2168_config));
636 si2168_config.i2c_adapter = &tuner_i2c_adapter;
637 si2168_config.fe = &port->fe;
638 si2168_config.ts_mode = SI2168_TS_PARALLEL;
639
640 memset(&client_info, 0, sizeof(struct i2c_board_info));
641 strscpy(client_info.type, "si2168", I2C_NAME_SIZE);
642 client_info.addr = 0x64;
643 client_info.platform_data = &si2168_config;
644
645 client_demod = smi_add_i2c_client(i2c, &client_info);
646 if (!client_demod) {
647 ret = -ENODEV;
648 return ret;
649 }
650 port->i2c_client_demod = client_demod;
651
652 /* attach tuner */
653 memset(&si2157_config, 0, sizeof(si2157_config));
654 si2157_config.fe = port->fe;
655 si2157_config.if_port = 1;
656
657 memset(&client_info, 0, sizeof(struct i2c_board_info));
658 strscpy(client_info.type, "si2157", I2C_NAME_SIZE);
659 client_info.addr = 0x60;
660 client_info.platform_data = &si2157_config;
661
662 client_tuner = smi_add_i2c_client(tuner_i2c_adapter, &client_info);
663 if (!client_tuner) {
664 smi_del_i2c_client(port->i2c_client_demod);
665 port->i2c_client_demod = NULL;
666 ret = -ENODEV;
667 return ret;
668 }
669 port->i2c_client_tuner = client_tuner;
670 return ret;
671 }
672
smi_fe_init(struct smi_port * port)673 static int smi_fe_init(struct smi_port *port)
674 {
675 int ret = 0;
676 struct smi_dev *dev = port->dev;
677 struct dvb_adapter *adap = &port->dvb_adapter;
678 u8 mac_ee[16];
679
680 dev_dbg(&port->dev->pci_dev->dev,
681 "%s: port %d, fe_type = %d\n",
682 __func__, port->idx, port->fe_type);
683 switch (port->fe_type) {
684 case DVBSKY_FE_M88DS3103:
685 ret = smi_dvbsky_m88ds3103_fe_attach(port);
686 break;
687 case DVBSKY_FE_M88RS6000:
688 ret = smi_dvbsky_m88rs6000_fe_attach(port);
689 break;
690 case DVBSKY_FE_SIT2:
691 ret = smi_dvbsky_sit2_fe_attach(port);
692 break;
693 }
694 if (ret < 0)
695 return ret;
696
697 /* register dvb frontend */
698 ret = dvb_register_frontend(adap, port->fe);
699 if (ret < 0) {
700 if (port->i2c_client_tuner)
701 smi_del_i2c_client(port->i2c_client_tuner);
702 if (port->i2c_client_demod)
703 smi_del_i2c_client(port->i2c_client_demod);
704 dvb_frontend_detach(port->fe);
705 return ret;
706 }
707 /* init MAC.*/
708 ret = smi_read_eeprom(&dev->i2c_bus[0], 0xc0, mac_ee, 16);
709 dev_info(&port->dev->pci_dev->dev,
710 "%s port %d MAC: %pM\n", dev->info->name,
711 port->idx, mac_ee + (port->idx)*8);
712 memcpy(adap->proposed_mac, mac_ee + (port->idx)*8, 6);
713 return ret;
714 }
715
smi_fe_exit(struct smi_port * port)716 static void smi_fe_exit(struct smi_port *port)
717 {
718 dvb_unregister_frontend(port->fe);
719 /* remove I2C demod and tuner */
720 if (port->i2c_client_tuner)
721 smi_del_i2c_client(port->i2c_client_tuner);
722 if (port->i2c_client_demod)
723 smi_del_i2c_client(port->i2c_client_demod);
724 dvb_frontend_detach(port->fe);
725 }
726
my_dvb_dmx_ts_card_init(struct dvb_demux * dvbdemux,char * id,int (* start_feed)(struct dvb_demux_feed *),int (* stop_feed)(struct dvb_demux_feed *),void * priv)727 static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
728 int (*start_feed)(struct dvb_demux_feed *),
729 int (*stop_feed)(struct dvb_demux_feed *),
730 void *priv)
731 {
732 dvbdemux->priv = priv;
733
734 dvbdemux->filternum = 256;
735 dvbdemux->feednum = 256;
736 dvbdemux->start_feed = start_feed;
737 dvbdemux->stop_feed = stop_feed;
738 dvbdemux->write_to_decoder = NULL;
739 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
740 DMX_SECTION_FILTERING |
741 DMX_MEMORY_BASED_FILTERING);
742 return dvb_dmx_init(dvbdemux);
743 }
744
my_dvb_dmxdev_ts_card_init(struct dmxdev * dmxdev,struct dvb_demux * dvbdemux,struct dmx_frontend * hw_frontend,struct dmx_frontend * mem_frontend,struct dvb_adapter * dvb_adapter)745 static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
746 struct dvb_demux *dvbdemux,
747 struct dmx_frontend *hw_frontend,
748 struct dmx_frontend *mem_frontend,
749 struct dvb_adapter *dvb_adapter)
750 {
751 int ret;
752
753 dmxdev->filternum = 256;
754 dmxdev->demux = &dvbdemux->dmx;
755 dmxdev->capabilities = 0;
756 ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
757 if (ret < 0)
758 return ret;
759
760 hw_frontend->source = DMX_FRONTEND_0;
761 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
762 mem_frontend->source = DMX_MEMORY_FE;
763 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
764 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
765 }
766
smi_config_DMA(struct smi_port * port)767 static u32 smi_config_DMA(struct smi_port *port)
768 {
769 struct smi_dev *dev = port->dev;
770 u32 totalLength = 0, dmaMemPtrLow, dmaMemPtrHi, dmaCtlReg;
771 u8 chanLatencyTimer = 0, dmaChanEnable = 1, dmaTransStart = 1;
772 u32 dmaManagement = 0, tlpTransUnit = DMA_TRANS_UNIT_188;
773 u8 tlpTc = 0, tlpTd = 1, tlpEp = 0, tlpAttr = 0;
774 u64 mem;
775
776 dmaManagement = smi_read(port->DMA_MANAGEMENT);
777 /* Setup Channel-0 */
778 if (port->_dmaInterruptCH0) {
779 totalLength = SMI_TS_DMA_BUF_SIZE;
780 mem = port->dma_addr[0];
781 dmaMemPtrLow = mem & 0xffffffff;
782 dmaMemPtrHi = mem >> 32;
783 dmaCtlReg = (totalLength) | (tlpTransUnit << 22) | (tlpTc << 25)
784 | (tlpTd << 28) | (tlpEp << 29) | (tlpAttr << 30);
785 dmaManagement |= dmaChanEnable | (dmaTransStart << 1)
786 | (chanLatencyTimer << 8);
787 /* write DMA register, start DMA engine */
788 smi_write(port->DMA_CHAN0_ADDR_LOW, dmaMemPtrLow);
789 smi_write(port->DMA_CHAN0_ADDR_HI, dmaMemPtrHi);
790 smi_write(port->DMA_CHAN0_CONTROL, dmaCtlReg);
791 }
792 /* Setup Channel-1 */
793 if (port->_dmaInterruptCH1) {
794 totalLength = SMI_TS_DMA_BUF_SIZE;
795 mem = port->dma_addr[1];
796 dmaMemPtrLow = mem & 0xffffffff;
797 dmaMemPtrHi = mem >> 32;
798 dmaCtlReg = (totalLength) | (tlpTransUnit << 22) | (tlpTc << 25)
799 | (tlpTd << 28) | (tlpEp << 29) | (tlpAttr << 30);
800 dmaManagement |= (dmaChanEnable << 16) | (dmaTransStart << 17)
801 | (chanLatencyTimer << 24);
802 /* write DMA register, start DMA engine */
803 smi_write(port->DMA_CHAN1_ADDR_LOW, dmaMemPtrLow);
804 smi_write(port->DMA_CHAN1_ADDR_HI, dmaMemPtrHi);
805 smi_write(port->DMA_CHAN1_CONTROL, dmaCtlReg);
806 }
807 return dmaManagement;
808 }
809
smi_start_feed(struct dvb_demux_feed * dvbdmxfeed)810 static int smi_start_feed(struct dvb_demux_feed *dvbdmxfeed)
811 {
812 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
813 struct smi_port *port = dvbdmx->priv;
814 struct smi_dev *dev = port->dev;
815 u32 dmaManagement;
816
817 if (port->users++ == 0) {
818 dmaManagement = smi_config_DMA(port);
819 smi_port_clearInterrupt(port);
820 smi_port_enableInterrupt(port);
821 smi_write(port->DMA_MANAGEMENT, dmaManagement);
822 tasklet_enable(&port->tasklet);
823 }
824 return port->users;
825 }
826
smi_stop_feed(struct dvb_demux_feed * dvbdmxfeed)827 static int smi_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
828 {
829 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
830 struct smi_port *port = dvbdmx->priv;
831 struct smi_dev *dev = port->dev;
832
833 if (--port->users)
834 return port->users;
835
836 tasklet_disable(&port->tasklet);
837 smi_port_disableInterrupt(port);
838 smi_clear(port->DMA_MANAGEMENT, 0x30003);
839 return 0;
840 }
841
smi_dvb_init(struct smi_port * port)842 static int smi_dvb_init(struct smi_port *port)
843 {
844 int ret;
845 struct dvb_adapter *adap = &port->dvb_adapter;
846 struct dvb_demux *dvbdemux = &port->demux;
847
848 dev_dbg(&port->dev->pci_dev->dev,
849 "%s, port %d\n", __func__, port->idx);
850
851 ret = dvb_register_adapter(adap, "SMI_DVB", THIS_MODULE,
852 &port->dev->pci_dev->dev,
853 adapter_nr);
854 if (ret < 0) {
855 dev_err(&port->dev->pci_dev->dev, "Fail to register DVB adapter.\n");
856 return ret;
857 }
858 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
859 smi_start_feed,
860 smi_stop_feed, port);
861 if (ret < 0)
862 goto err_del_dvb_register_adapter;
863
864 ret = my_dvb_dmxdev_ts_card_init(&port->dmxdev, &port->demux,
865 &port->hw_frontend,
866 &port->mem_frontend, adap);
867 if (ret < 0)
868 goto err_del_dvb_dmx;
869
870 ret = dvb_net_init(adap, &port->dvbnet, port->dmxdev.demux);
871 if (ret < 0)
872 goto err_del_dvb_dmxdev;
873 return 0;
874 err_del_dvb_dmxdev:
875 dvbdemux->dmx.close(&dvbdemux->dmx);
876 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->hw_frontend);
877 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->mem_frontend);
878 dvb_dmxdev_release(&port->dmxdev);
879 err_del_dvb_dmx:
880 dvb_dmx_release(&port->demux);
881 err_del_dvb_register_adapter:
882 dvb_unregister_adapter(&port->dvb_adapter);
883 return ret;
884 }
885
smi_dvb_exit(struct smi_port * port)886 static void smi_dvb_exit(struct smi_port *port)
887 {
888 struct dvb_demux *dvbdemux = &port->demux;
889
890 dvb_net_release(&port->dvbnet);
891
892 dvbdemux->dmx.close(&dvbdemux->dmx);
893 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->hw_frontend);
894 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->mem_frontend);
895 dvb_dmxdev_release(&port->dmxdev);
896 dvb_dmx_release(&port->demux);
897
898 dvb_unregister_adapter(&port->dvb_adapter);
899 }
900
smi_port_attach(struct smi_dev * dev,struct smi_port * port,int index)901 static int smi_port_attach(struct smi_dev *dev,
902 struct smi_port *port, int index)
903 {
904 int ret, dmachs;
905
906 port->dev = dev;
907 port->idx = index;
908 port->fe_type = (index == 0) ? dev->info->fe_0 : dev->info->fe_1;
909 dmachs = (index == 0) ? dev->info->ts_0 : dev->info->ts_1;
910 /* port init.*/
911 ret = smi_port_init(port, dmachs);
912 if (ret < 0)
913 return ret;
914 /* dvb init.*/
915 ret = smi_dvb_init(port);
916 if (ret < 0)
917 goto err_del_port_init;
918 /* fe init.*/
919 ret = smi_fe_init(port);
920 if (ret < 0)
921 goto err_del_dvb_init;
922 return 0;
923 err_del_dvb_init:
924 smi_dvb_exit(port);
925 err_del_port_init:
926 smi_port_exit(port);
927 return ret;
928 }
929
smi_port_detach(struct smi_port * port)930 static void smi_port_detach(struct smi_port *port)
931 {
932 smi_fe_exit(port);
933 smi_dvb_exit(port);
934 smi_port_exit(port);
935 }
936
smi_probe(struct pci_dev * pdev,const struct pci_device_id * id)937 static int smi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
938 {
939 struct smi_dev *dev;
940 int ret = -ENOMEM;
941
942 if (pci_enable_device(pdev) < 0)
943 return -ENODEV;
944
945 dev = kzalloc(sizeof(struct smi_dev), GFP_KERNEL);
946 if (!dev) {
947 ret = -ENOMEM;
948 goto err_pci_disable_device;
949 }
950
951 dev->pci_dev = pdev;
952 pci_set_drvdata(pdev, dev);
953 dev->info = (struct smi_cfg_info *) id->driver_data;
954 dev_info(&dev->pci_dev->dev,
955 "card detected: %s\n", dev->info->name);
956
957 dev->nr = dev->info->type;
958 dev->lmmio = ioremap(pci_resource_start(dev->pci_dev, 0),
959 pci_resource_len(dev->pci_dev, 0));
960 if (!dev->lmmio) {
961 ret = -ENOMEM;
962 goto err_kfree;
963 }
964
965 /* should we set to 32bit DMA? */
966 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
967 if (ret < 0)
968 goto err_pci_iounmap;
969
970 pci_set_master(pdev);
971
972 ret = smi_hw_init(dev);
973 if (ret < 0)
974 goto err_pci_iounmap;
975
976 ret = smi_i2c_init(dev);
977 if (ret < 0)
978 goto err_pci_iounmap;
979
980 if (dev->info->ts_0) {
981 ret = smi_port_attach(dev, &dev->ts_port[0], 0);
982 if (ret < 0)
983 goto err_del_i2c_adaptor;
984 }
985
986 if (dev->info->ts_1) {
987 ret = smi_port_attach(dev, &dev->ts_port[1], 1);
988 if (ret < 0)
989 goto err_del_port0_attach;
990 }
991
992 ret = smi_ir_init(dev);
993 if (ret < 0)
994 goto err_del_port1_attach;
995
996 #ifdef CONFIG_PCI_MSI /* to do msi interrupt.???*/
997 if (pci_msi_enabled())
998 ret = pci_enable_msi(dev->pci_dev);
999 if (ret)
1000 dev_info(&dev->pci_dev->dev, "MSI not available.\n");
1001 #endif
1002
1003 ret = request_irq(dev->pci_dev->irq, smi_irq_handler,
1004 IRQF_SHARED, "SMI_PCIE", dev);
1005 if (ret < 0)
1006 goto err_del_ir;
1007
1008 smi_ir_start(&dev->ir);
1009 return 0;
1010
1011 err_del_ir:
1012 smi_ir_exit(dev);
1013 err_del_port1_attach:
1014 if (dev->info->ts_1)
1015 smi_port_detach(&dev->ts_port[1]);
1016 err_del_port0_attach:
1017 if (dev->info->ts_0)
1018 smi_port_detach(&dev->ts_port[0]);
1019 err_del_i2c_adaptor:
1020 smi_i2c_exit(dev);
1021 err_pci_iounmap:
1022 iounmap(dev->lmmio);
1023 err_kfree:
1024 pci_set_drvdata(pdev, NULL);
1025 kfree(dev);
1026 err_pci_disable_device:
1027 pci_disable_device(pdev);
1028 return ret;
1029 }
1030
smi_remove(struct pci_dev * pdev)1031 static void smi_remove(struct pci_dev *pdev)
1032 {
1033 struct smi_dev *dev = pci_get_drvdata(pdev);
1034
1035 smi_write(MSI_INT_ENA_CLR, ALL_INT);
1036 free_irq(dev->pci_dev->irq, dev);
1037 #ifdef CONFIG_PCI_MSI
1038 pci_disable_msi(dev->pci_dev);
1039 #endif
1040 if (dev->info->ts_1)
1041 smi_port_detach(&dev->ts_port[1]);
1042 if (dev->info->ts_0)
1043 smi_port_detach(&dev->ts_port[0]);
1044
1045 smi_ir_exit(dev);
1046 smi_i2c_exit(dev);
1047 iounmap(dev->lmmio);
1048 pci_set_drvdata(pdev, NULL);
1049 pci_disable_device(pdev);
1050 kfree(dev);
1051 }
1052
1053 /* DVBSky cards */
1054 static const struct smi_cfg_info dvbsky_s950_cfg = {
1055 .type = SMI_DVBSKY_S950,
1056 .name = "DVBSky S950 V3",
1057 .ts_0 = SMI_TS_NULL,
1058 .ts_1 = SMI_TS_DMA_BOTH,
1059 .fe_0 = DVBSKY_FE_NULL,
1060 .fe_1 = DVBSKY_FE_M88DS3103,
1061 .rc_map = RC_MAP_DVBSKY,
1062 };
1063
1064 static const struct smi_cfg_info dvbsky_s952_cfg = {
1065 .type = SMI_DVBSKY_S952,
1066 .name = "DVBSky S952 V3",
1067 .ts_0 = SMI_TS_DMA_BOTH,
1068 .ts_1 = SMI_TS_DMA_BOTH,
1069 .fe_0 = DVBSKY_FE_M88RS6000,
1070 .fe_1 = DVBSKY_FE_M88RS6000,
1071 .rc_map = RC_MAP_DVBSKY,
1072 };
1073
1074 static const struct smi_cfg_info dvbsky_t9580_cfg = {
1075 .type = SMI_DVBSKY_T9580,
1076 .name = "DVBSky T9580 V3",
1077 .ts_0 = SMI_TS_DMA_BOTH,
1078 .ts_1 = SMI_TS_DMA_BOTH,
1079 .fe_0 = DVBSKY_FE_SIT2,
1080 .fe_1 = DVBSKY_FE_M88DS3103,
1081 .rc_map = RC_MAP_DVBSKY,
1082 };
1083
1084 static const struct smi_cfg_info technotrend_s2_4200_cfg = {
1085 .type = SMI_TECHNOTREND_S2_4200,
1086 .name = "TechnoTrend TT-budget S2-4200 Twin",
1087 .ts_0 = SMI_TS_DMA_BOTH,
1088 .ts_1 = SMI_TS_DMA_BOTH,
1089 .fe_0 = DVBSKY_FE_M88RS6000,
1090 .fe_1 = DVBSKY_FE_M88RS6000,
1091 .rc_map = RC_MAP_TT_1500,
1092 };
1093
1094 /* PCI IDs */
1095 #define SMI_ID(_subvend, _subdev, _driverdata) { \
1096 .vendor = SMI_VID, .device = SMI_PID, \
1097 .subvendor = _subvend, .subdevice = _subdev, \
1098 .driver_data = (unsigned long)&_driverdata }
1099
1100 static const struct pci_device_id smi_id_table[] = {
1101 SMI_ID(0x4254, 0x0550, dvbsky_s950_cfg),
1102 SMI_ID(0x4254, 0x0552, dvbsky_s952_cfg),
1103 SMI_ID(0x4254, 0x5580, dvbsky_t9580_cfg),
1104 SMI_ID(0x13c2, 0x3016, technotrend_s2_4200_cfg),
1105 {0}
1106 };
1107 MODULE_DEVICE_TABLE(pci, smi_id_table);
1108
1109 static struct pci_driver smipcie_driver = {
1110 .name = "SMI PCIe driver",
1111 .id_table = smi_id_table,
1112 .probe = smi_probe,
1113 .remove = smi_remove,
1114 };
1115
1116 module_pci_driver(smipcie_driver);
1117
1118 MODULE_AUTHOR("Max nibble <nibble.max@gmail.com>");
1119 MODULE_DESCRIPTION("SMI PCIe driver");
1120 MODULE_LICENSE("GPL");
1121