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1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
3  * Copyright (C) 2020 Marvell International Ltd.
4  */
5 
6 #include "aq_macsec.h"
7 #include "aq_nic.h"
8 #include <linux/rtnetlink.h>
9 
10 #include "macsec/macsec_api.h"
11 #define AQ_MACSEC_KEY_LEN_128_BIT 16
12 #define AQ_MACSEC_KEY_LEN_192_BIT 24
13 #define AQ_MACSEC_KEY_LEN_256_BIT 32
14 
15 enum aq_clear_type {
16 	/* update HW configuration */
17 	AQ_CLEAR_HW = BIT(0),
18 	/* update SW configuration (busy bits, pointers) */
19 	AQ_CLEAR_SW = BIT(1),
20 	/* update both HW and SW configuration */
21 	AQ_CLEAR_ALL = AQ_CLEAR_HW | AQ_CLEAR_SW,
22 };
23 
24 static int aq_clear_txsc(struct aq_nic_s *nic, const int txsc_idx,
25 			 enum aq_clear_type clear_type);
26 static int aq_clear_txsa(struct aq_nic_s *nic, struct aq_macsec_txsc *aq_txsc,
27 			 const int sa_num, enum aq_clear_type clear_type);
28 static int aq_clear_rxsc(struct aq_nic_s *nic, const int rxsc_idx,
29 			 enum aq_clear_type clear_type);
30 static int aq_clear_rxsa(struct aq_nic_s *nic, struct aq_macsec_rxsc *aq_rxsc,
31 			 const int sa_num, enum aq_clear_type clear_type);
32 static int aq_clear_secy(struct aq_nic_s *nic, const struct macsec_secy *secy,
33 			 enum aq_clear_type clear_type);
34 static int aq_apply_macsec_cfg(struct aq_nic_s *nic);
35 static int aq_apply_secy_cfg(struct aq_nic_s *nic,
36 			     const struct macsec_secy *secy);
37 
aq_ether_addr_to_mac(u32 mac[2],unsigned char * emac)38 static void aq_ether_addr_to_mac(u32 mac[2], unsigned char *emac)
39 {
40 	u32 tmp[2] = { 0 };
41 
42 	memcpy(((u8 *)tmp) + 2, emac, ETH_ALEN);
43 
44 	mac[0] = swab32(tmp[1]);
45 	mac[1] = swab32(tmp[0]);
46 }
47 
48 /* There's a 1:1 mapping between SecY and TX SC */
aq_get_txsc_idx_from_secy(struct aq_macsec_cfg * macsec_cfg,const struct macsec_secy * secy)49 static int aq_get_txsc_idx_from_secy(struct aq_macsec_cfg *macsec_cfg,
50 				     const struct macsec_secy *secy)
51 {
52 	int i;
53 
54 	if (unlikely(!secy))
55 		return -1;
56 
57 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
58 		if (macsec_cfg->aq_txsc[i].sw_secy == secy)
59 			return i;
60 	}
61 	return -1;
62 }
63 
aq_get_rxsc_idx_from_rxsc(struct aq_macsec_cfg * macsec_cfg,const struct macsec_rx_sc * rxsc)64 static int aq_get_rxsc_idx_from_rxsc(struct aq_macsec_cfg *macsec_cfg,
65 				     const struct macsec_rx_sc *rxsc)
66 {
67 	int i;
68 
69 	if (unlikely(!rxsc))
70 		return -1;
71 
72 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
73 		if (macsec_cfg->aq_rxsc[i].sw_rxsc == rxsc)
74 			return i;
75 	}
76 
77 	return -1;
78 }
79 
aq_get_txsc_idx_from_sc_idx(const enum aq_macsec_sc_sa sc_sa,const int sc_idx)80 static int aq_get_txsc_idx_from_sc_idx(const enum aq_macsec_sc_sa sc_sa,
81 				       const int sc_idx)
82 {
83 	switch (sc_sa) {
84 	case aq_macsec_sa_sc_4sa_8sc:
85 		return sc_idx >> 2;
86 	case aq_macsec_sa_sc_2sa_16sc:
87 		return sc_idx >> 1;
88 	case aq_macsec_sa_sc_1sa_32sc:
89 		return sc_idx;
90 	default:
91 		WARN_ONCE(true, "Invalid sc_sa");
92 	}
93 	return -1;
94 }
95 
96 /* Rotate keys u32[8] */
aq_rotate_keys(u32 (* key)[8],const int key_len)97 static void aq_rotate_keys(u32 (*key)[8], const int key_len)
98 {
99 	u32 tmp[8] = { 0 };
100 
101 	memcpy(&tmp, key, sizeof(tmp));
102 	memset(*key, 0, sizeof(*key));
103 
104 	if (key_len == AQ_MACSEC_KEY_LEN_128_BIT) {
105 		(*key)[0] = swab32(tmp[3]);
106 		(*key)[1] = swab32(tmp[2]);
107 		(*key)[2] = swab32(tmp[1]);
108 		(*key)[3] = swab32(tmp[0]);
109 	} else if (key_len == AQ_MACSEC_KEY_LEN_192_BIT) {
110 		(*key)[0] = swab32(tmp[5]);
111 		(*key)[1] = swab32(tmp[4]);
112 		(*key)[2] = swab32(tmp[3]);
113 		(*key)[3] = swab32(tmp[2]);
114 		(*key)[4] = swab32(tmp[1]);
115 		(*key)[5] = swab32(tmp[0]);
116 	} else if (key_len == AQ_MACSEC_KEY_LEN_256_BIT) {
117 		(*key)[0] = swab32(tmp[7]);
118 		(*key)[1] = swab32(tmp[6]);
119 		(*key)[2] = swab32(tmp[5]);
120 		(*key)[3] = swab32(tmp[4]);
121 		(*key)[4] = swab32(tmp[3]);
122 		(*key)[5] = swab32(tmp[2]);
123 		(*key)[6] = swab32(tmp[1]);
124 		(*key)[7] = swab32(tmp[0]);
125 	} else {
126 		pr_warn("Rotate_keys: invalid key_len\n");
127 	}
128 }
129 
130 #define STATS_2x32_TO_64(stat_field)                                           \
131 	(((u64)stat_field[1] << 32) | stat_field[0])
132 
aq_get_macsec_common_stats(struct aq_hw_s * hw,struct aq_macsec_common_stats * stats)133 static int aq_get_macsec_common_stats(struct aq_hw_s *hw,
134 				      struct aq_macsec_common_stats *stats)
135 {
136 	struct aq_mss_ingress_common_counters ingress_counters;
137 	struct aq_mss_egress_common_counters egress_counters;
138 	int ret;
139 
140 	/* MACSEC counters */
141 	ret = aq_mss_get_ingress_common_counters(hw, &ingress_counters);
142 	if (unlikely(ret))
143 		return ret;
144 
145 	stats->in.ctl_pkts = STATS_2x32_TO_64(ingress_counters.ctl_pkts);
146 	stats->in.tagged_miss_pkts =
147 		STATS_2x32_TO_64(ingress_counters.tagged_miss_pkts);
148 	stats->in.untagged_miss_pkts =
149 		STATS_2x32_TO_64(ingress_counters.untagged_miss_pkts);
150 	stats->in.notag_pkts = STATS_2x32_TO_64(ingress_counters.notag_pkts);
151 	stats->in.untagged_pkts =
152 		STATS_2x32_TO_64(ingress_counters.untagged_pkts);
153 	stats->in.bad_tag_pkts =
154 		STATS_2x32_TO_64(ingress_counters.bad_tag_pkts);
155 	stats->in.no_sci_pkts = STATS_2x32_TO_64(ingress_counters.no_sci_pkts);
156 	stats->in.unknown_sci_pkts =
157 		STATS_2x32_TO_64(ingress_counters.unknown_sci_pkts);
158 	stats->in.ctrl_prt_pass_pkts =
159 		STATS_2x32_TO_64(ingress_counters.ctrl_prt_pass_pkts);
160 	stats->in.unctrl_prt_pass_pkts =
161 		STATS_2x32_TO_64(ingress_counters.unctrl_prt_pass_pkts);
162 	stats->in.ctrl_prt_fail_pkts =
163 		STATS_2x32_TO_64(ingress_counters.ctrl_prt_fail_pkts);
164 	stats->in.unctrl_prt_fail_pkts =
165 		STATS_2x32_TO_64(ingress_counters.unctrl_prt_fail_pkts);
166 	stats->in.too_long_pkts =
167 		STATS_2x32_TO_64(ingress_counters.too_long_pkts);
168 	stats->in.igpoc_ctl_pkts =
169 		STATS_2x32_TO_64(ingress_counters.igpoc_ctl_pkts);
170 	stats->in.ecc_error_pkts =
171 		STATS_2x32_TO_64(ingress_counters.ecc_error_pkts);
172 	stats->in.unctrl_hit_drop_redir =
173 		STATS_2x32_TO_64(ingress_counters.unctrl_hit_drop_redir);
174 
175 	ret = aq_mss_get_egress_common_counters(hw, &egress_counters);
176 	if (unlikely(ret))
177 		return ret;
178 	stats->out.ctl_pkts = STATS_2x32_TO_64(egress_counters.ctl_pkt);
179 	stats->out.unknown_sa_pkts =
180 		STATS_2x32_TO_64(egress_counters.unknown_sa_pkts);
181 	stats->out.untagged_pkts =
182 		STATS_2x32_TO_64(egress_counters.untagged_pkts);
183 	stats->out.too_long = STATS_2x32_TO_64(egress_counters.too_long);
184 	stats->out.ecc_error_pkts =
185 		STATS_2x32_TO_64(egress_counters.ecc_error_pkts);
186 	stats->out.unctrl_hit_drop_redir =
187 		STATS_2x32_TO_64(egress_counters.unctrl_hit_drop_redir);
188 
189 	return 0;
190 }
191 
aq_get_rxsa_stats(struct aq_hw_s * hw,const int sa_idx,struct aq_macsec_rx_sa_stats * stats)192 static int aq_get_rxsa_stats(struct aq_hw_s *hw, const int sa_idx,
193 			     struct aq_macsec_rx_sa_stats *stats)
194 {
195 	struct aq_mss_ingress_sa_counters i_sa_counters;
196 	int ret;
197 
198 	ret = aq_mss_get_ingress_sa_counters(hw, &i_sa_counters, sa_idx);
199 	if (unlikely(ret))
200 		return ret;
201 
202 	stats->untagged_hit_pkts =
203 		STATS_2x32_TO_64(i_sa_counters.untagged_hit_pkts);
204 	stats->ctrl_hit_drop_redir_pkts =
205 		STATS_2x32_TO_64(i_sa_counters.ctrl_hit_drop_redir_pkts);
206 	stats->not_using_sa = STATS_2x32_TO_64(i_sa_counters.not_using_sa);
207 	stats->unused_sa = STATS_2x32_TO_64(i_sa_counters.unused_sa);
208 	stats->not_valid_pkts = STATS_2x32_TO_64(i_sa_counters.not_valid_pkts);
209 	stats->invalid_pkts = STATS_2x32_TO_64(i_sa_counters.invalid_pkts);
210 	stats->ok_pkts = STATS_2x32_TO_64(i_sa_counters.ok_pkts);
211 	stats->late_pkts = STATS_2x32_TO_64(i_sa_counters.late_pkts);
212 	stats->delayed_pkts = STATS_2x32_TO_64(i_sa_counters.delayed_pkts);
213 	stats->unchecked_pkts = STATS_2x32_TO_64(i_sa_counters.unchecked_pkts);
214 	stats->validated_octets =
215 		STATS_2x32_TO_64(i_sa_counters.validated_octets);
216 	stats->decrypted_octets =
217 		STATS_2x32_TO_64(i_sa_counters.decrypted_octets);
218 
219 	return 0;
220 }
221 
aq_get_txsa_stats(struct aq_hw_s * hw,const int sa_idx,struct aq_macsec_tx_sa_stats * stats)222 static int aq_get_txsa_stats(struct aq_hw_s *hw, const int sa_idx,
223 			     struct aq_macsec_tx_sa_stats *stats)
224 {
225 	struct aq_mss_egress_sa_counters e_sa_counters;
226 	int ret;
227 
228 	ret = aq_mss_get_egress_sa_counters(hw, &e_sa_counters, sa_idx);
229 	if (unlikely(ret))
230 		return ret;
231 
232 	stats->sa_hit_drop_redirect =
233 		STATS_2x32_TO_64(e_sa_counters.sa_hit_drop_redirect);
234 	stats->sa_protected2_pkts =
235 		STATS_2x32_TO_64(e_sa_counters.sa_protected2_pkts);
236 	stats->sa_protected_pkts =
237 		STATS_2x32_TO_64(e_sa_counters.sa_protected_pkts);
238 	stats->sa_encrypted_pkts =
239 		STATS_2x32_TO_64(e_sa_counters.sa_encrypted_pkts);
240 
241 	return 0;
242 }
243 
aq_get_txsa_next_pn(struct aq_hw_s * hw,const int sa_idx,u32 * pn)244 static int aq_get_txsa_next_pn(struct aq_hw_s *hw, const int sa_idx, u32 *pn)
245 {
246 	struct aq_mss_egress_sa_record sa_rec;
247 	int ret;
248 
249 	ret = aq_mss_get_egress_sa_record(hw, &sa_rec, sa_idx);
250 	if (likely(!ret))
251 		*pn = sa_rec.next_pn;
252 
253 	return ret;
254 }
255 
aq_get_rxsa_next_pn(struct aq_hw_s * hw,const int sa_idx,u32 * pn)256 static int aq_get_rxsa_next_pn(struct aq_hw_s *hw, const int sa_idx, u32 *pn)
257 {
258 	struct aq_mss_ingress_sa_record sa_rec;
259 	int ret;
260 
261 	ret = aq_mss_get_ingress_sa_record(hw, &sa_rec, sa_idx);
262 	if (likely(!ret))
263 		*pn = (!sa_rec.sat_nextpn) ? sa_rec.next_pn : 0;
264 
265 	return ret;
266 }
267 
aq_get_txsc_stats(struct aq_hw_s * hw,const int sc_idx,struct aq_macsec_tx_sc_stats * stats)268 static int aq_get_txsc_stats(struct aq_hw_s *hw, const int sc_idx,
269 			     struct aq_macsec_tx_sc_stats *stats)
270 {
271 	struct aq_mss_egress_sc_counters e_sc_counters;
272 	int ret;
273 
274 	ret = aq_mss_get_egress_sc_counters(hw, &e_sc_counters, sc_idx);
275 	if (unlikely(ret))
276 		return ret;
277 
278 	stats->sc_protected_pkts =
279 		STATS_2x32_TO_64(e_sc_counters.sc_protected_pkts);
280 	stats->sc_encrypted_pkts =
281 		STATS_2x32_TO_64(e_sc_counters.sc_encrypted_pkts);
282 	stats->sc_protected_octets =
283 		STATS_2x32_TO_64(e_sc_counters.sc_protected_octets);
284 	stats->sc_encrypted_octets =
285 		STATS_2x32_TO_64(e_sc_counters.sc_encrypted_octets);
286 
287 	return 0;
288 }
289 
aq_mdo_dev_open(struct macsec_context * ctx)290 static int aq_mdo_dev_open(struct macsec_context *ctx)
291 {
292 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
293 	int ret = 0;
294 
295 	if (ctx->prepare)
296 		return 0;
297 
298 	if (netif_carrier_ok(nic->ndev))
299 		ret = aq_apply_secy_cfg(nic, ctx->secy);
300 
301 	return ret;
302 }
303 
aq_mdo_dev_stop(struct macsec_context * ctx)304 static int aq_mdo_dev_stop(struct macsec_context *ctx)
305 {
306 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
307 	int i;
308 
309 	if (ctx->prepare)
310 		return 0;
311 
312 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
313 		if (nic->macsec_cfg->txsc_idx_busy & BIT(i))
314 			aq_clear_secy(nic, nic->macsec_cfg->aq_txsc[i].sw_secy,
315 				      AQ_CLEAR_HW);
316 	}
317 
318 	return 0;
319 }
320 
aq_set_txsc(struct aq_nic_s * nic,const int txsc_idx)321 static int aq_set_txsc(struct aq_nic_s *nic, const int txsc_idx)
322 {
323 	struct aq_macsec_txsc *aq_txsc = &nic->macsec_cfg->aq_txsc[txsc_idx];
324 	struct aq_mss_egress_class_record tx_class_rec = { 0 };
325 	const struct macsec_secy *secy = aq_txsc->sw_secy;
326 	struct aq_mss_egress_sc_record sc_rec = { 0 };
327 	unsigned int sc_idx = aq_txsc->hw_sc_idx;
328 	struct aq_hw_s *hw = nic->aq_hw;
329 	int ret = 0;
330 
331 	aq_ether_addr_to_mac(tx_class_rec.mac_sa, secy->netdev->dev_addr);
332 
333 	put_unaligned_be64((__force u64)secy->sci, tx_class_rec.sci);
334 	tx_class_rec.sci_mask = 0;
335 
336 	tx_class_rec.sa_mask = 0x3f;
337 
338 	tx_class_rec.action = 0; /* forward to SA/SC table */
339 	tx_class_rec.valid = 1;
340 
341 	tx_class_rec.sc_idx = sc_idx;
342 
343 	tx_class_rec.sc_sa = nic->macsec_cfg->sc_sa;
344 
345 	ret = aq_mss_set_egress_class_record(hw, &tx_class_rec, txsc_idx);
346 	if (ret)
347 		return ret;
348 
349 	sc_rec.protect = secy->protect_frames;
350 	if (secy->tx_sc.encrypt)
351 		sc_rec.tci |= BIT(1);
352 	if (secy->tx_sc.scb)
353 		sc_rec.tci |= BIT(2);
354 	if (secy->tx_sc.send_sci)
355 		sc_rec.tci |= BIT(3);
356 	if (secy->tx_sc.end_station)
357 		sc_rec.tci |= BIT(4);
358 	/* The C bit is clear if and only if the Secure Data is
359 	 * exactly the same as the User Data and the ICV is 16 octets long.
360 	 */
361 	if (!(secy->icv_len == 16 && !secy->tx_sc.encrypt))
362 		sc_rec.tci |= BIT(0);
363 
364 	sc_rec.an_roll = 0;
365 
366 	switch (secy->key_len) {
367 	case AQ_MACSEC_KEY_LEN_128_BIT:
368 		sc_rec.sak_len = 0;
369 		break;
370 	case AQ_MACSEC_KEY_LEN_192_BIT:
371 		sc_rec.sak_len = 1;
372 		break;
373 	case AQ_MACSEC_KEY_LEN_256_BIT:
374 		sc_rec.sak_len = 2;
375 		break;
376 	default:
377 		WARN_ONCE(true, "Invalid sc_sa");
378 		return -EINVAL;
379 	}
380 
381 	sc_rec.curr_an = secy->tx_sc.encoding_sa;
382 	sc_rec.valid = 1;
383 	sc_rec.fresh = 1;
384 
385 	return aq_mss_set_egress_sc_record(hw, &sc_rec, sc_idx);
386 }
387 
aq_sc_idx_max(const enum aq_macsec_sc_sa sc_sa)388 static u32 aq_sc_idx_max(const enum aq_macsec_sc_sa sc_sa)
389 {
390 	u32 result = 0;
391 
392 	switch (sc_sa) {
393 	case aq_macsec_sa_sc_4sa_8sc:
394 		result = 8;
395 		break;
396 	case aq_macsec_sa_sc_2sa_16sc:
397 		result = 16;
398 		break;
399 	case aq_macsec_sa_sc_1sa_32sc:
400 		result = 32;
401 		break;
402 	default:
403 		break;
404 	}
405 
406 	return result;
407 }
408 
aq_to_hw_sc_idx(const u32 sc_idx,const enum aq_macsec_sc_sa sc_sa)409 static u32 aq_to_hw_sc_idx(const u32 sc_idx, const enum aq_macsec_sc_sa sc_sa)
410 {
411 	switch (sc_sa) {
412 	case aq_macsec_sa_sc_4sa_8sc:
413 		return sc_idx << 2;
414 	case aq_macsec_sa_sc_2sa_16sc:
415 		return sc_idx << 1;
416 	case aq_macsec_sa_sc_1sa_32sc:
417 		return sc_idx;
418 	default:
419 		WARN_ONCE(true, "Invalid sc_sa");
420 	}
421 
422 	return sc_idx;
423 }
424 
sc_sa_from_num_an(const int num_an)425 static enum aq_macsec_sc_sa sc_sa_from_num_an(const int num_an)
426 {
427 	enum aq_macsec_sc_sa sc_sa = aq_macsec_sa_sc_not_used;
428 
429 	switch (num_an) {
430 	case 4:
431 		sc_sa = aq_macsec_sa_sc_4sa_8sc;
432 		break;
433 	case 2:
434 		sc_sa = aq_macsec_sa_sc_2sa_16sc;
435 		break;
436 	case 1:
437 		sc_sa = aq_macsec_sa_sc_1sa_32sc;
438 		break;
439 	default:
440 		break;
441 	}
442 
443 	return sc_sa;
444 }
445 
aq_mdo_add_secy(struct macsec_context * ctx)446 static int aq_mdo_add_secy(struct macsec_context *ctx)
447 {
448 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
449 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
450 	const struct macsec_secy *secy = ctx->secy;
451 	enum aq_macsec_sc_sa sc_sa;
452 	u32 txsc_idx;
453 	int ret = 0;
454 
455 	if (secy->xpn)
456 		return -EOPNOTSUPP;
457 
458 	sc_sa = sc_sa_from_num_an(MACSEC_NUM_AN);
459 	if (sc_sa == aq_macsec_sa_sc_not_used)
460 		return -EINVAL;
461 
462 	if (hweight32(cfg->txsc_idx_busy) >= aq_sc_idx_max(sc_sa))
463 		return -ENOSPC;
464 
465 	txsc_idx = ffz(cfg->txsc_idx_busy);
466 	if (txsc_idx == AQ_MACSEC_MAX_SC)
467 		return -ENOSPC;
468 
469 	if (ctx->prepare)
470 		return 0;
471 
472 	cfg->sc_sa = sc_sa;
473 	cfg->aq_txsc[txsc_idx].hw_sc_idx = aq_to_hw_sc_idx(txsc_idx, sc_sa);
474 	cfg->aq_txsc[txsc_idx].sw_secy = secy;
475 
476 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
477 		ret = aq_set_txsc(nic, txsc_idx);
478 
479 	set_bit(txsc_idx, &cfg->txsc_idx_busy);
480 
481 	return ret;
482 }
483 
aq_mdo_upd_secy(struct macsec_context * ctx)484 static int aq_mdo_upd_secy(struct macsec_context *ctx)
485 {
486 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
487 	const struct macsec_secy *secy = ctx->secy;
488 	int txsc_idx;
489 	int ret = 0;
490 
491 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, secy);
492 	if (txsc_idx < 0)
493 		return -ENOENT;
494 
495 	if (ctx->prepare)
496 		return 0;
497 
498 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
499 		ret = aq_set_txsc(nic, txsc_idx);
500 
501 	return ret;
502 }
503 
aq_clear_txsc(struct aq_nic_s * nic,const int txsc_idx,enum aq_clear_type clear_type)504 static int aq_clear_txsc(struct aq_nic_s *nic, const int txsc_idx,
505 			 enum aq_clear_type clear_type)
506 {
507 	struct aq_macsec_txsc *tx_sc = &nic->macsec_cfg->aq_txsc[txsc_idx];
508 	struct aq_mss_egress_class_record tx_class_rec = { 0 };
509 	struct aq_mss_egress_sc_record sc_rec = { 0 };
510 	struct aq_hw_s *hw = nic->aq_hw;
511 	int ret = 0;
512 	int sa_num;
513 
514 	for_each_set_bit (sa_num, &tx_sc->tx_sa_idx_busy, AQ_MACSEC_MAX_SA) {
515 		ret = aq_clear_txsa(nic, tx_sc, sa_num, clear_type);
516 		if (ret)
517 			return ret;
518 	}
519 
520 	if (clear_type & AQ_CLEAR_HW) {
521 		ret = aq_mss_set_egress_class_record(hw, &tx_class_rec,
522 						     txsc_idx);
523 		if (ret)
524 			return ret;
525 
526 		sc_rec.fresh = 1;
527 		ret = aq_mss_set_egress_sc_record(hw, &sc_rec,
528 						  tx_sc->hw_sc_idx);
529 		if (ret)
530 			return ret;
531 	}
532 
533 	if (clear_type & AQ_CLEAR_SW) {
534 		clear_bit(txsc_idx, &nic->macsec_cfg->txsc_idx_busy);
535 		nic->macsec_cfg->aq_txsc[txsc_idx].sw_secy = NULL;
536 	}
537 
538 	return ret;
539 }
540 
aq_mdo_del_secy(struct macsec_context * ctx)541 static int aq_mdo_del_secy(struct macsec_context *ctx)
542 {
543 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
544 	int ret = 0;
545 
546 	if (ctx->prepare)
547 		return 0;
548 
549 	if (!nic->macsec_cfg)
550 		return 0;
551 
552 	ret = aq_clear_secy(nic, ctx->secy, AQ_CLEAR_ALL);
553 
554 	return ret;
555 }
556 
aq_update_txsa(struct aq_nic_s * nic,const unsigned int sc_idx,const struct macsec_secy * secy,const struct macsec_tx_sa * tx_sa,const unsigned char * key,const unsigned char an)557 static int aq_update_txsa(struct aq_nic_s *nic, const unsigned int sc_idx,
558 			  const struct macsec_secy *secy,
559 			  const struct macsec_tx_sa *tx_sa,
560 			  const unsigned char *key, const unsigned char an)
561 {
562 	const u32 next_pn = tx_sa->next_pn_halves.lower;
563 	struct aq_mss_egress_sakey_record key_rec;
564 	const unsigned int sa_idx = sc_idx | an;
565 	struct aq_mss_egress_sa_record sa_rec;
566 	struct aq_hw_s *hw = nic->aq_hw;
567 	int ret = 0;
568 
569 	memset(&sa_rec, 0, sizeof(sa_rec));
570 	sa_rec.valid = tx_sa->active;
571 	sa_rec.fresh = 1;
572 	sa_rec.next_pn = next_pn;
573 
574 	ret = aq_mss_set_egress_sa_record(hw, &sa_rec, sa_idx);
575 	if (ret)
576 		return ret;
577 
578 	if (!key)
579 		return ret;
580 
581 	memset(&key_rec, 0, sizeof(key_rec));
582 	memcpy(&key_rec.key, key, secy->key_len);
583 
584 	aq_rotate_keys(&key_rec.key, secy->key_len);
585 
586 	ret = aq_mss_set_egress_sakey_record(hw, &key_rec, sa_idx);
587 
588 	memzero_explicit(&key_rec, sizeof(key_rec));
589 	return ret;
590 }
591 
aq_mdo_add_txsa(struct macsec_context * ctx)592 static int aq_mdo_add_txsa(struct macsec_context *ctx)
593 {
594 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
595 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
596 	const struct macsec_secy *secy = ctx->secy;
597 	struct aq_macsec_txsc *aq_txsc;
598 	int txsc_idx;
599 	int ret = 0;
600 
601 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, secy);
602 	if (txsc_idx < 0)
603 		return -EINVAL;
604 
605 	if (ctx->prepare)
606 		return 0;
607 
608 	aq_txsc = &cfg->aq_txsc[txsc_idx];
609 	set_bit(ctx->sa.assoc_num, &aq_txsc->tx_sa_idx_busy);
610 
611 	memcpy(aq_txsc->tx_sa_key[ctx->sa.assoc_num], ctx->sa.key,
612 	       secy->key_len);
613 
614 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
615 		ret = aq_update_txsa(nic, aq_txsc->hw_sc_idx, secy,
616 				     ctx->sa.tx_sa, ctx->sa.key,
617 				     ctx->sa.assoc_num);
618 
619 	return ret;
620 }
621 
aq_mdo_upd_txsa(struct macsec_context * ctx)622 static int aq_mdo_upd_txsa(struct macsec_context *ctx)
623 {
624 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
625 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
626 	const struct macsec_secy *secy = ctx->secy;
627 	struct aq_macsec_txsc *aq_txsc;
628 	int txsc_idx;
629 	int ret = 0;
630 
631 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, secy);
632 	if (txsc_idx < 0)
633 		return -EINVAL;
634 
635 	if (ctx->prepare)
636 		return 0;
637 
638 	aq_txsc = &cfg->aq_txsc[txsc_idx];
639 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
640 		ret = aq_update_txsa(nic, aq_txsc->hw_sc_idx, secy,
641 				     ctx->sa.tx_sa, NULL, ctx->sa.assoc_num);
642 
643 	return ret;
644 }
645 
aq_clear_txsa(struct aq_nic_s * nic,struct aq_macsec_txsc * aq_txsc,const int sa_num,enum aq_clear_type clear_type)646 static int aq_clear_txsa(struct aq_nic_s *nic, struct aq_macsec_txsc *aq_txsc,
647 			 const int sa_num, enum aq_clear_type clear_type)
648 {
649 	const int sa_idx = aq_txsc->hw_sc_idx | sa_num;
650 	struct aq_hw_s *hw = nic->aq_hw;
651 	int ret = 0;
652 
653 	if (clear_type & AQ_CLEAR_SW)
654 		clear_bit(sa_num, &aq_txsc->tx_sa_idx_busy);
655 
656 	if ((clear_type & AQ_CLEAR_HW) && netif_carrier_ok(nic->ndev)) {
657 		struct aq_mss_egress_sakey_record key_rec;
658 		struct aq_mss_egress_sa_record sa_rec;
659 
660 		memset(&sa_rec, 0, sizeof(sa_rec));
661 		sa_rec.fresh = 1;
662 
663 		ret = aq_mss_set_egress_sa_record(hw, &sa_rec, sa_idx);
664 		if (ret)
665 			return ret;
666 
667 		memset(&key_rec, 0, sizeof(key_rec));
668 		return aq_mss_set_egress_sakey_record(hw, &key_rec, sa_idx);
669 	}
670 
671 	return 0;
672 }
673 
aq_mdo_del_txsa(struct macsec_context * ctx)674 static int aq_mdo_del_txsa(struct macsec_context *ctx)
675 {
676 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
677 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
678 	int txsc_idx;
679 	int ret = 0;
680 
681 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, ctx->secy);
682 	if (txsc_idx < 0)
683 		return -EINVAL;
684 
685 	if (ctx->prepare)
686 		return 0;
687 
688 	ret = aq_clear_txsa(nic, &cfg->aq_txsc[txsc_idx], ctx->sa.assoc_num,
689 			    AQ_CLEAR_ALL);
690 
691 	return ret;
692 }
693 
aq_rxsc_validate_frames(const enum macsec_validation_type validate)694 static int aq_rxsc_validate_frames(const enum macsec_validation_type validate)
695 {
696 	switch (validate) {
697 	case MACSEC_VALIDATE_DISABLED:
698 		return 2;
699 	case MACSEC_VALIDATE_CHECK:
700 		return 1;
701 	case MACSEC_VALIDATE_STRICT:
702 		return 0;
703 	default:
704 		WARN_ONCE(true, "Invalid validation type");
705 	}
706 
707 	return 0;
708 }
709 
aq_set_rxsc(struct aq_nic_s * nic,const u32 rxsc_idx)710 static int aq_set_rxsc(struct aq_nic_s *nic, const u32 rxsc_idx)
711 {
712 	const struct aq_macsec_rxsc *aq_rxsc =
713 		&nic->macsec_cfg->aq_rxsc[rxsc_idx];
714 	struct aq_mss_ingress_preclass_record pre_class_record;
715 	const struct macsec_rx_sc *rx_sc = aq_rxsc->sw_rxsc;
716 	const struct macsec_secy *secy = aq_rxsc->sw_secy;
717 	const u32 hw_sc_idx = aq_rxsc->hw_sc_idx;
718 	struct aq_mss_ingress_sc_record sc_record;
719 	struct aq_hw_s *hw = nic->aq_hw;
720 	int ret = 0;
721 
722 	memset(&pre_class_record, 0, sizeof(pre_class_record));
723 	put_unaligned_be64((__force u64)rx_sc->sci, pre_class_record.sci);
724 	pre_class_record.sci_mask = 0xff;
725 	/* match all MACSEC ethertype packets */
726 	pre_class_record.eth_type = ETH_P_MACSEC;
727 	pre_class_record.eth_type_mask = 0x3;
728 
729 	aq_ether_addr_to_mac(pre_class_record.mac_sa, (char *)&rx_sc->sci);
730 	pre_class_record.sa_mask = 0x3f;
731 
732 	pre_class_record.an_mask = nic->macsec_cfg->sc_sa;
733 	pre_class_record.sc_idx = hw_sc_idx;
734 	/* strip SecTAG & forward for decryption */
735 	pre_class_record.action = 0x0;
736 	pre_class_record.valid = 1;
737 
738 	ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
739 						 2 * rxsc_idx + 1);
740 	if (ret)
741 		return ret;
742 
743 	/* If SCI is absent, then match by SA alone */
744 	pre_class_record.sci_mask = 0;
745 	pre_class_record.sci_from_table = 1;
746 
747 	ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
748 						 2 * rxsc_idx);
749 	if (ret)
750 		return ret;
751 
752 	memset(&sc_record, 0, sizeof(sc_record));
753 	sc_record.validate_frames =
754 		aq_rxsc_validate_frames(secy->validate_frames);
755 	if (secy->replay_protect) {
756 		sc_record.replay_protect = 1;
757 		sc_record.anti_replay_window = secy->replay_window;
758 	}
759 	sc_record.valid = 1;
760 	sc_record.fresh = 1;
761 
762 	ret = aq_mss_set_ingress_sc_record(hw, &sc_record, hw_sc_idx);
763 	if (ret)
764 		return ret;
765 
766 	return ret;
767 }
768 
aq_mdo_add_rxsc(struct macsec_context * ctx)769 static int aq_mdo_add_rxsc(struct macsec_context *ctx)
770 {
771 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
772 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
773 	const u32 rxsc_idx_max = aq_sc_idx_max(cfg->sc_sa);
774 	u32 rxsc_idx;
775 	int ret = 0;
776 
777 	if (hweight32(cfg->rxsc_idx_busy) >= rxsc_idx_max)
778 		return -ENOSPC;
779 
780 	rxsc_idx = ffz(cfg->rxsc_idx_busy);
781 	if (rxsc_idx >= rxsc_idx_max)
782 		return -ENOSPC;
783 
784 	if (ctx->prepare)
785 		return 0;
786 
787 	cfg->aq_rxsc[rxsc_idx].hw_sc_idx = aq_to_hw_sc_idx(rxsc_idx,
788 							   cfg->sc_sa);
789 	cfg->aq_rxsc[rxsc_idx].sw_secy = ctx->secy;
790 	cfg->aq_rxsc[rxsc_idx].sw_rxsc = ctx->rx_sc;
791 
792 	if (netif_carrier_ok(nic->ndev) && netif_running(ctx->secy->netdev))
793 		ret = aq_set_rxsc(nic, rxsc_idx);
794 
795 	if (ret < 0)
796 		return ret;
797 
798 	set_bit(rxsc_idx, &cfg->rxsc_idx_busy);
799 
800 	return 0;
801 }
802 
aq_mdo_upd_rxsc(struct macsec_context * ctx)803 static int aq_mdo_upd_rxsc(struct macsec_context *ctx)
804 {
805 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
806 	int rxsc_idx;
807 	int ret = 0;
808 
809 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, ctx->rx_sc);
810 	if (rxsc_idx < 0)
811 		return -ENOENT;
812 
813 	if (ctx->prepare)
814 		return 0;
815 
816 	if (netif_carrier_ok(nic->ndev) && netif_running(ctx->secy->netdev))
817 		ret = aq_set_rxsc(nic, rxsc_idx);
818 
819 	return ret;
820 }
821 
aq_clear_rxsc(struct aq_nic_s * nic,const int rxsc_idx,enum aq_clear_type clear_type)822 static int aq_clear_rxsc(struct aq_nic_s *nic, const int rxsc_idx,
823 			 enum aq_clear_type clear_type)
824 {
825 	struct aq_macsec_rxsc *rx_sc = &nic->macsec_cfg->aq_rxsc[rxsc_idx];
826 	struct aq_hw_s *hw = nic->aq_hw;
827 	int ret = 0;
828 	int sa_num;
829 
830 	for_each_set_bit (sa_num, &rx_sc->rx_sa_idx_busy, AQ_MACSEC_MAX_SA) {
831 		ret = aq_clear_rxsa(nic, rx_sc, sa_num, clear_type);
832 		if (ret)
833 			return ret;
834 	}
835 
836 	if (clear_type & AQ_CLEAR_HW) {
837 		struct aq_mss_ingress_preclass_record pre_class_record;
838 		struct aq_mss_ingress_sc_record sc_record;
839 
840 		memset(&pre_class_record, 0, sizeof(pre_class_record));
841 		memset(&sc_record, 0, sizeof(sc_record));
842 
843 		ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
844 							 2 * rxsc_idx);
845 		if (ret)
846 			return ret;
847 
848 		ret = aq_mss_set_ingress_preclass_record(hw, &pre_class_record,
849 							 2 * rxsc_idx + 1);
850 		if (ret)
851 			return ret;
852 
853 		sc_record.fresh = 1;
854 		ret = aq_mss_set_ingress_sc_record(hw, &sc_record,
855 						   rx_sc->hw_sc_idx);
856 		if (ret)
857 			return ret;
858 	}
859 
860 	if (clear_type & AQ_CLEAR_SW) {
861 		clear_bit(rxsc_idx, &nic->macsec_cfg->rxsc_idx_busy);
862 		rx_sc->sw_secy = NULL;
863 		rx_sc->sw_rxsc = NULL;
864 	}
865 
866 	return ret;
867 }
868 
aq_mdo_del_rxsc(struct macsec_context * ctx)869 static int aq_mdo_del_rxsc(struct macsec_context *ctx)
870 {
871 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
872 	enum aq_clear_type clear_type = AQ_CLEAR_SW;
873 	int rxsc_idx;
874 	int ret = 0;
875 
876 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, ctx->rx_sc);
877 	if (rxsc_idx < 0)
878 		return -ENOENT;
879 
880 	if (ctx->prepare)
881 		return 0;
882 
883 	if (netif_carrier_ok(nic->ndev))
884 		clear_type = AQ_CLEAR_ALL;
885 
886 	ret = aq_clear_rxsc(nic, rxsc_idx, clear_type);
887 
888 	return ret;
889 }
890 
aq_update_rxsa(struct aq_nic_s * nic,const unsigned int sc_idx,const struct macsec_secy * secy,const struct macsec_rx_sa * rx_sa,const unsigned char * key,const unsigned char an)891 static int aq_update_rxsa(struct aq_nic_s *nic, const unsigned int sc_idx,
892 			  const struct macsec_secy *secy,
893 			  const struct macsec_rx_sa *rx_sa,
894 			  const unsigned char *key, const unsigned char an)
895 {
896 	struct aq_mss_ingress_sakey_record sa_key_record;
897 	const u32 next_pn = rx_sa->next_pn_halves.lower;
898 	struct aq_mss_ingress_sa_record sa_record;
899 	struct aq_hw_s *hw = nic->aq_hw;
900 	const int sa_idx = sc_idx | an;
901 	int ret = 0;
902 
903 	memset(&sa_record, 0, sizeof(sa_record));
904 	sa_record.valid = rx_sa->active;
905 	sa_record.fresh = 1;
906 	sa_record.next_pn = next_pn;
907 
908 	ret = aq_mss_set_ingress_sa_record(hw, &sa_record, sa_idx);
909 	if (ret)
910 		return ret;
911 
912 	if (!key)
913 		return ret;
914 
915 	memset(&sa_key_record, 0, sizeof(sa_key_record));
916 	memcpy(&sa_key_record.key, key, secy->key_len);
917 
918 	switch (secy->key_len) {
919 	case AQ_MACSEC_KEY_LEN_128_BIT:
920 		sa_key_record.key_len = 0;
921 		break;
922 	case AQ_MACSEC_KEY_LEN_192_BIT:
923 		sa_key_record.key_len = 1;
924 		break;
925 	case AQ_MACSEC_KEY_LEN_256_BIT:
926 		sa_key_record.key_len = 2;
927 		break;
928 	default:
929 		return -1;
930 	}
931 
932 	aq_rotate_keys(&sa_key_record.key, secy->key_len);
933 
934 	ret = aq_mss_set_ingress_sakey_record(hw, &sa_key_record, sa_idx);
935 
936 	memzero_explicit(&sa_key_record, sizeof(sa_key_record));
937 	return ret;
938 }
939 
aq_mdo_add_rxsa(struct macsec_context * ctx)940 static int aq_mdo_add_rxsa(struct macsec_context *ctx)
941 {
942 	const struct macsec_rx_sc *rx_sc = ctx->sa.rx_sa->sc;
943 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
944 	const struct macsec_secy *secy = ctx->secy;
945 	struct aq_macsec_rxsc *aq_rxsc;
946 	int rxsc_idx;
947 	int ret = 0;
948 
949 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, rx_sc);
950 	if (rxsc_idx < 0)
951 		return -EINVAL;
952 
953 	if (ctx->prepare)
954 		return 0;
955 
956 	aq_rxsc = &nic->macsec_cfg->aq_rxsc[rxsc_idx];
957 	set_bit(ctx->sa.assoc_num, &aq_rxsc->rx_sa_idx_busy);
958 
959 	memcpy(aq_rxsc->rx_sa_key[ctx->sa.assoc_num], ctx->sa.key,
960 	       secy->key_len);
961 
962 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
963 		ret = aq_update_rxsa(nic, aq_rxsc->hw_sc_idx, secy,
964 				     ctx->sa.rx_sa, ctx->sa.key,
965 				     ctx->sa.assoc_num);
966 
967 	return ret;
968 }
969 
aq_mdo_upd_rxsa(struct macsec_context * ctx)970 static int aq_mdo_upd_rxsa(struct macsec_context *ctx)
971 {
972 	const struct macsec_rx_sc *rx_sc = ctx->sa.rx_sa->sc;
973 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
974 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
975 	const struct macsec_secy *secy = ctx->secy;
976 	int rxsc_idx;
977 	int ret = 0;
978 
979 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, rx_sc);
980 	if (rxsc_idx < 0)
981 		return -EINVAL;
982 
983 	if (ctx->prepare)
984 		return 0;
985 
986 	if (netif_carrier_ok(nic->ndev) && netif_running(secy->netdev))
987 		ret = aq_update_rxsa(nic, cfg->aq_rxsc[rxsc_idx].hw_sc_idx,
988 				     secy, ctx->sa.rx_sa, NULL,
989 				     ctx->sa.assoc_num);
990 
991 	return ret;
992 }
993 
aq_clear_rxsa(struct aq_nic_s * nic,struct aq_macsec_rxsc * aq_rxsc,const int sa_num,enum aq_clear_type clear_type)994 static int aq_clear_rxsa(struct aq_nic_s *nic, struct aq_macsec_rxsc *aq_rxsc,
995 			 const int sa_num, enum aq_clear_type clear_type)
996 {
997 	int sa_idx = aq_rxsc->hw_sc_idx | sa_num;
998 	struct aq_hw_s *hw = nic->aq_hw;
999 	int ret = 0;
1000 
1001 	if (clear_type & AQ_CLEAR_SW)
1002 		clear_bit(sa_num, &aq_rxsc->rx_sa_idx_busy);
1003 
1004 	if ((clear_type & AQ_CLEAR_HW) && netif_carrier_ok(nic->ndev)) {
1005 		struct aq_mss_ingress_sakey_record sa_key_record;
1006 		struct aq_mss_ingress_sa_record sa_record;
1007 
1008 		memset(&sa_key_record, 0, sizeof(sa_key_record));
1009 		memset(&sa_record, 0, sizeof(sa_record));
1010 		sa_record.fresh = 1;
1011 		ret = aq_mss_set_ingress_sa_record(hw, &sa_record, sa_idx);
1012 		if (ret)
1013 			return ret;
1014 
1015 		return aq_mss_set_ingress_sakey_record(hw, &sa_key_record,
1016 						       sa_idx);
1017 	}
1018 
1019 	return ret;
1020 }
1021 
aq_mdo_del_rxsa(struct macsec_context * ctx)1022 static int aq_mdo_del_rxsa(struct macsec_context *ctx)
1023 {
1024 	const struct macsec_rx_sc *rx_sc = ctx->sa.rx_sa->sc;
1025 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
1026 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1027 	int rxsc_idx;
1028 	int ret = 0;
1029 
1030 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, rx_sc);
1031 	if (rxsc_idx < 0)
1032 		return -EINVAL;
1033 
1034 	if (ctx->prepare)
1035 		return 0;
1036 
1037 	ret = aq_clear_rxsa(nic, &cfg->aq_rxsc[rxsc_idx], ctx->sa.assoc_num,
1038 			    AQ_CLEAR_ALL);
1039 
1040 	return ret;
1041 }
1042 
aq_mdo_get_dev_stats(struct macsec_context * ctx)1043 static int aq_mdo_get_dev_stats(struct macsec_context *ctx)
1044 {
1045 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
1046 	struct aq_macsec_common_stats *stats = &nic->macsec_cfg->stats;
1047 	struct aq_hw_s *hw = nic->aq_hw;
1048 
1049 	if (ctx->prepare)
1050 		return 0;
1051 
1052 	aq_get_macsec_common_stats(hw, stats);
1053 
1054 	ctx->stats.dev_stats->OutPktsUntagged = stats->out.untagged_pkts;
1055 	ctx->stats.dev_stats->InPktsUntagged = stats->in.untagged_pkts;
1056 	ctx->stats.dev_stats->OutPktsTooLong = stats->out.too_long;
1057 	ctx->stats.dev_stats->InPktsNoTag = stats->in.notag_pkts;
1058 	ctx->stats.dev_stats->InPktsBadTag = stats->in.bad_tag_pkts;
1059 	ctx->stats.dev_stats->InPktsUnknownSCI = stats->in.unknown_sci_pkts;
1060 	ctx->stats.dev_stats->InPktsNoSCI = stats->in.no_sci_pkts;
1061 	ctx->stats.dev_stats->InPktsOverrun = 0;
1062 
1063 	return 0;
1064 }
1065 
aq_mdo_get_tx_sc_stats(struct macsec_context * ctx)1066 static int aq_mdo_get_tx_sc_stats(struct macsec_context *ctx)
1067 {
1068 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
1069 	struct aq_macsec_tx_sc_stats *stats;
1070 	struct aq_hw_s *hw = nic->aq_hw;
1071 	struct aq_macsec_txsc *aq_txsc;
1072 	int txsc_idx;
1073 
1074 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, ctx->secy);
1075 	if (txsc_idx < 0)
1076 		return -ENOENT;
1077 
1078 	if (ctx->prepare)
1079 		return 0;
1080 
1081 	aq_txsc = &nic->macsec_cfg->aq_txsc[txsc_idx];
1082 	stats = &aq_txsc->stats;
1083 	aq_get_txsc_stats(hw, aq_txsc->hw_sc_idx, stats);
1084 
1085 	ctx->stats.tx_sc_stats->OutPktsProtected = stats->sc_protected_pkts;
1086 	ctx->stats.tx_sc_stats->OutPktsEncrypted = stats->sc_encrypted_pkts;
1087 	ctx->stats.tx_sc_stats->OutOctetsProtected = stats->sc_protected_octets;
1088 	ctx->stats.tx_sc_stats->OutOctetsEncrypted = stats->sc_encrypted_octets;
1089 
1090 	return 0;
1091 }
1092 
aq_mdo_get_tx_sa_stats(struct macsec_context * ctx)1093 static int aq_mdo_get_tx_sa_stats(struct macsec_context *ctx)
1094 {
1095 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
1096 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1097 	struct aq_macsec_tx_sa_stats *stats;
1098 	struct aq_hw_s *hw = nic->aq_hw;
1099 	const struct macsec_secy *secy;
1100 	struct aq_macsec_txsc *aq_txsc;
1101 	struct macsec_tx_sa *tx_sa;
1102 	unsigned int sa_idx;
1103 	int txsc_idx;
1104 	u32 next_pn;
1105 	int ret;
1106 
1107 	txsc_idx = aq_get_txsc_idx_from_secy(cfg, ctx->secy);
1108 	if (txsc_idx < 0)
1109 		return -EINVAL;
1110 
1111 	if (ctx->prepare)
1112 		return 0;
1113 
1114 	aq_txsc = &cfg->aq_txsc[txsc_idx];
1115 	sa_idx = aq_txsc->hw_sc_idx | ctx->sa.assoc_num;
1116 	stats = &aq_txsc->tx_sa_stats[ctx->sa.assoc_num];
1117 	ret = aq_get_txsa_stats(hw, sa_idx, stats);
1118 	if (ret)
1119 		return ret;
1120 
1121 	ctx->stats.tx_sa_stats->OutPktsProtected = stats->sa_protected_pkts;
1122 	ctx->stats.tx_sa_stats->OutPktsEncrypted = stats->sa_encrypted_pkts;
1123 
1124 	secy = aq_txsc->sw_secy;
1125 	tx_sa = rcu_dereference_bh(secy->tx_sc.sa[ctx->sa.assoc_num]);
1126 	ret = aq_get_txsa_next_pn(hw, sa_idx, &next_pn);
1127 	if (ret == 0) {
1128 		spin_lock_bh(&tx_sa->lock);
1129 		tx_sa->next_pn = next_pn;
1130 		spin_unlock_bh(&tx_sa->lock);
1131 	}
1132 
1133 	return ret;
1134 }
1135 
aq_mdo_get_rx_sc_stats(struct macsec_context * ctx)1136 static int aq_mdo_get_rx_sc_stats(struct macsec_context *ctx)
1137 {
1138 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
1139 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1140 	struct aq_macsec_rx_sa_stats *stats;
1141 	struct aq_hw_s *hw = nic->aq_hw;
1142 	struct aq_macsec_rxsc *aq_rxsc;
1143 	unsigned int sa_idx;
1144 	int rxsc_idx;
1145 	int ret = 0;
1146 	int i;
1147 
1148 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, ctx->rx_sc);
1149 	if (rxsc_idx < 0)
1150 		return -ENOENT;
1151 
1152 	if (ctx->prepare)
1153 		return 0;
1154 
1155 	aq_rxsc = &cfg->aq_rxsc[rxsc_idx];
1156 	for (i = 0; i < MACSEC_NUM_AN; i++) {
1157 		if (!test_bit(i, &aq_rxsc->rx_sa_idx_busy))
1158 			continue;
1159 
1160 		stats = &aq_rxsc->rx_sa_stats[i];
1161 		sa_idx = aq_rxsc->hw_sc_idx | i;
1162 		ret = aq_get_rxsa_stats(hw, sa_idx, stats);
1163 		if (ret)
1164 			break;
1165 
1166 		ctx->stats.rx_sc_stats->InOctetsValidated +=
1167 			stats->validated_octets;
1168 		ctx->stats.rx_sc_stats->InOctetsDecrypted +=
1169 			stats->decrypted_octets;
1170 		ctx->stats.rx_sc_stats->InPktsUnchecked +=
1171 			stats->unchecked_pkts;
1172 		ctx->stats.rx_sc_stats->InPktsDelayed += stats->delayed_pkts;
1173 		ctx->stats.rx_sc_stats->InPktsOK += stats->ok_pkts;
1174 		ctx->stats.rx_sc_stats->InPktsInvalid += stats->invalid_pkts;
1175 		ctx->stats.rx_sc_stats->InPktsLate += stats->late_pkts;
1176 		ctx->stats.rx_sc_stats->InPktsNotValid += stats->not_valid_pkts;
1177 		ctx->stats.rx_sc_stats->InPktsNotUsingSA += stats->not_using_sa;
1178 		ctx->stats.rx_sc_stats->InPktsUnusedSA += stats->unused_sa;
1179 	}
1180 
1181 	return ret;
1182 }
1183 
aq_mdo_get_rx_sa_stats(struct macsec_context * ctx)1184 static int aq_mdo_get_rx_sa_stats(struct macsec_context *ctx)
1185 {
1186 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);
1187 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1188 	struct aq_macsec_rx_sa_stats *stats;
1189 	struct aq_hw_s *hw = nic->aq_hw;
1190 	struct aq_macsec_rxsc *aq_rxsc;
1191 	struct macsec_rx_sa *rx_sa;
1192 	unsigned int sa_idx;
1193 	int rxsc_idx;
1194 	u32 next_pn;
1195 	int ret;
1196 
1197 	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, ctx->rx_sc);
1198 	if (rxsc_idx < 0)
1199 		return -EINVAL;
1200 
1201 	if (ctx->prepare)
1202 		return 0;
1203 
1204 	aq_rxsc = &cfg->aq_rxsc[rxsc_idx];
1205 	stats = &aq_rxsc->rx_sa_stats[ctx->sa.assoc_num];
1206 	sa_idx = aq_rxsc->hw_sc_idx | ctx->sa.assoc_num;
1207 	ret = aq_get_rxsa_stats(hw, sa_idx, stats);
1208 	if (ret)
1209 		return ret;
1210 
1211 	ctx->stats.rx_sa_stats->InPktsOK = stats->ok_pkts;
1212 	ctx->stats.rx_sa_stats->InPktsInvalid = stats->invalid_pkts;
1213 	ctx->stats.rx_sa_stats->InPktsNotValid = stats->not_valid_pkts;
1214 	ctx->stats.rx_sa_stats->InPktsNotUsingSA = stats->not_using_sa;
1215 	ctx->stats.rx_sa_stats->InPktsUnusedSA = stats->unused_sa;
1216 
1217 	rx_sa = rcu_dereference_bh(aq_rxsc->sw_rxsc->sa[ctx->sa.assoc_num]);
1218 	ret = aq_get_rxsa_next_pn(hw, sa_idx, &next_pn);
1219 	if (ret == 0) {
1220 		spin_lock_bh(&rx_sa->lock);
1221 		rx_sa->next_pn = next_pn;
1222 		spin_unlock_bh(&rx_sa->lock);
1223 	}
1224 
1225 	return ret;
1226 }
1227 
apply_txsc_cfg(struct aq_nic_s * nic,const int txsc_idx)1228 static int apply_txsc_cfg(struct aq_nic_s *nic, const int txsc_idx)
1229 {
1230 	struct aq_macsec_txsc *aq_txsc = &nic->macsec_cfg->aq_txsc[txsc_idx];
1231 	const struct macsec_secy *secy = aq_txsc->sw_secy;
1232 	struct macsec_tx_sa *tx_sa;
1233 	int ret = 0;
1234 	int i;
1235 
1236 	if (!netif_running(secy->netdev))
1237 		return ret;
1238 
1239 	ret = aq_set_txsc(nic, txsc_idx);
1240 	if (ret)
1241 		return ret;
1242 
1243 	for (i = 0; i < MACSEC_NUM_AN; i++) {
1244 		tx_sa = rcu_dereference_bh(secy->tx_sc.sa[i]);
1245 		if (tx_sa) {
1246 			ret = aq_update_txsa(nic, aq_txsc->hw_sc_idx, secy,
1247 					     tx_sa, aq_txsc->tx_sa_key[i], i);
1248 			if (ret)
1249 				return ret;
1250 		}
1251 	}
1252 
1253 	return ret;
1254 }
1255 
apply_rxsc_cfg(struct aq_nic_s * nic,const int rxsc_idx)1256 static int apply_rxsc_cfg(struct aq_nic_s *nic, const int rxsc_idx)
1257 {
1258 	struct aq_macsec_rxsc *aq_rxsc = &nic->macsec_cfg->aq_rxsc[rxsc_idx];
1259 	const struct macsec_secy *secy = aq_rxsc->sw_secy;
1260 	struct macsec_rx_sa *rx_sa;
1261 	int ret = 0;
1262 	int i;
1263 
1264 	if (!netif_running(secy->netdev))
1265 		return ret;
1266 
1267 	ret = aq_set_rxsc(nic, rxsc_idx);
1268 	if (ret)
1269 		return ret;
1270 
1271 	for (i = 0; i < MACSEC_NUM_AN; i++) {
1272 		rx_sa = rcu_dereference_bh(aq_rxsc->sw_rxsc->sa[i]);
1273 		if (rx_sa) {
1274 			ret = aq_update_rxsa(nic, aq_rxsc->hw_sc_idx, secy,
1275 					     rx_sa, aq_rxsc->rx_sa_key[i], i);
1276 			if (ret)
1277 				return ret;
1278 		}
1279 	}
1280 
1281 	return ret;
1282 }
1283 
aq_clear_secy(struct aq_nic_s * nic,const struct macsec_secy * secy,enum aq_clear_type clear_type)1284 static int aq_clear_secy(struct aq_nic_s *nic, const struct macsec_secy *secy,
1285 			 enum aq_clear_type clear_type)
1286 {
1287 	struct macsec_rx_sc *rx_sc;
1288 	int txsc_idx;
1289 	int rxsc_idx;
1290 	int ret = 0;
1291 
1292 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, secy);
1293 	if (txsc_idx >= 0) {
1294 		ret = aq_clear_txsc(nic, txsc_idx, clear_type);
1295 		if (ret)
1296 			return ret;
1297 	}
1298 
1299 	for (rx_sc = rcu_dereference_bh(secy->rx_sc); rx_sc;
1300 	     rx_sc = rcu_dereference_bh(rx_sc->next)) {
1301 		rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, rx_sc);
1302 		if (rxsc_idx < 0)
1303 			continue;
1304 
1305 		ret = aq_clear_rxsc(nic, rxsc_idx, clear_type);
1306 		if (ret)
1307 			return ret;
1308 	}
1309 
1310 	return ret;
1311 }
1312 
aq_apply_secy_cfg(struct aq_nic_s * nic,const struct macsec_secy * secy)1313 static int aq_apply_secy_cfg(struct aq_nic_s *nic,
1314 			     const struct macsec_secy *secy)
1315 {
1316 	struct macsec_rx_sc *rx_sc;
1317 	int txsc_idx;
1318 	int rxsc_idx;
1319 	int ret = 0;
1320 
1321 	txsc_idx = aq_get_txsc_idx_from_secy(nic->macsec_cfg, secy);
1322 	if (txsc_idx >= 0)
1323 		apply_txsc_cfg(nic, txsc_idx);
1324 
1325 	for (rx_sc = rcu_dereference_bh(secy->rx_sc); rx_sc && rx_sc->active;
1326 	     rx_sc = rcu_dereference_bh(rx_sc->next)) {
1327 		rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic->macsec_cfg, rx_sc);
1328 		if (unlikely(rxsc_idx < 0))
1329 			continue;
1330 
1331 		ret = apply_rxsc_cfg(nic, rxsc_idx);
1332 		if (ret)
1333 			return ret;
1334 	}
1335 
1336 	return ret;
1337 }
1338 
aq_apply_macsec_cfg(struct aq_nic_s * nic)1339 static int aq_apply_macsec_cfg(struct aq_nic_s *nic)
1340 {
1341 	int ret = 0;
1342 	int i;
1343 
1344 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1345 		if (nic->macsec_cfg->txsc_idx_busy & BIT(i)) {
1346 			ret = apply_txsc_cfg(nic, i);
1347 			if (ret)
1348 				return ret;
1349 		}
1350 	}
1351 
1352 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1353 		if (nic->macsec_cfg->rxsc_idx_busy & BIT(i)) {
1354 			ret = apply_rxsc_cfg(nic, i);
1355 			if (ret)
1356 				return ret;
1357 		}
1358 	}
1359 
1360 	return ret;
1361 }
1362 
aq_sa_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,const int sa_idx)1363 static int aq_sa_from_sa_idx(const enum aq_macsec_sc_sa sc_sa, const int sa_idx)
1364 {
1365 	switch (sc_sa) {
1366 	case aq_macsec_sa_sc_4sa_8sc:
1367 		return sa_idx & 3;
1368 	case aq_macsec_sa_sc_2sa_16sc:
1369 		return sa_idx & 1;
1370 	case aq_macsec_sa_sc_1sa_32sc:
1371 		return 0;
1372 	default:
1373 		WARN_ONCE(true, "Invalid sc_sa");
1374 	}
1375 	return -EINVAL;
1376 }
1377 
aq_sc_idx_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,const int sa_idx)1378 static int aq_sc_idx_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,
1379 				 const int sa_idx)
1380 {
1381 	switch (sc_sa) {
1382 	case aq_macsec_sa_sc_4sa_8sc:
1383 		return sa_idx & ~3;
1384 	case aq_macsec_sa_sc_2sa_16sc:
1385 		return sa_idx & ~1;
1386 	case aq_macsec_sa_sc_1sa_32sc:
1387 		return sa_idx;
1388 	default:
1389 		WARN_ONCE(true, "Invalid sc_sa");
1390 	}
1391 	return -EINVAL;
1392 }
1393 
aq_check_txsa_expiration(struct aq_nic_s * nic)1394 static void aq_check_txsa_expiration(struct aq_nic_s *nic)
1395 {
1396 	u32 egress_sa_expired, egress_sa_threshold_expired;
1397 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1398 	struct aq_hw_s *hw = nic->aq_hw;
1399 	struct aq_macsec_txsc *aq_txsc;
1400 	const struct macsec_secy *secy;
1401 	int sc_idx = 0, txsc_idx = 0;
1402 	enum aq_macsec_sc_sa sc_sa;
1403 	struct macsec_tx_sa *tx_sa;
1404 	unsigned char an = 0;
1405 	int ret;
1406 	int i;
1407 
1408 	sc_sa = cfg->sc_sa;
1409 
1410 	ret = aq_mss_get_egress_sa_expired(hw, &egress_sa_expired);
1411 	if (unlikely(ret))
1412 		return;
1413 
1414 	ret = aq_mss_get_egress_sa_threshold_expired(hw,
1415 		&egress_sa_threshold_expired);
1416 
1417 	for (i = 0; i < AQ_MACSEC_MAX_SA; i++) {
1418 		if (egress_sa_expired & BIT(i)) {
1419 			an = aq_sa_from_sa_idx(sc_sa, i);
1420 			sc_idx = aq_sc_idx_from_sa_idx(sc_sa, i);
1421 			txsc_idx = aq_get_txsc_idx_from_sc_idx(sc_sa, sc_idx);
1422 			if (txsc_idx < 0)
1423 				continue;
1424 
1425 			aq_txsc = &cfg->aq_txsc[txsc_idx];
1426 			if (!(cfg->txsc_idx_busy & BIT(txsc_idx))) {
1427 				netdev_warn(nic->ndev,
1428 					"PN threshold expired on invalid TX SC");
1429 				continue;
1430 			}
1431 
1432 			secy = aq_txsc->sw_secy;
1433 			if (!netif_running(secy->netdev)) {
1434 				netdev_warn(nic->ndev,
1435 					"PN threshold expired on down TX SC");
1436 				continue;
1437 			}
1438 
1439 			if (unlikely(!(aq_txsc->tx_sa_idx_busy & BIT(an)))) {
1440 				netdev_warn(nic->ndev,
1441 					"PN threshold expired on invalid TX SA");
1442 				continue;
1443 			}
1444 
1445 			tx_sa = rcu_dereference_bh(secy->tx_sc.sa[an]);
1446 			macsec_pn_wrapped((struct macsec_secy *)secy, tx_sa);
1447 		}
1448 	}
1449 
1450 	aq_mss_set_egress_sa_expired(hw, egress_sa_expired);
1451 	if (likely(!ret))
1452 		aq_mss_set_egress_sa_threshold_expired(hw,
1453 			egress_sa_threshold_expired);
1454 }
1455 
1456 #define AQ_LOCKED_MDO_DEF(mdo)						\
1457 static int aq_locked_mdo_##mdo(struct macsec_context *ctx)		\
1458 {									\
1459 	struct aq_nic_s *nic = netdev_priv(ctx->netdev);		\
1460 	int ret;							\
1461 	mutex_lock(&nic->macsec_mutex);					\
1462 	ret = aq_mdo_##mdo(ctx);					\
1463 	mutex_unlock(&nic->macsec_mutex);				\
1464 	return ret;							\
1465 }
1466 
1467 AQ_LOCKED_MDO_DEF(dev_open)
1468 AQ_LOCKED_MDO_DEF(dev_stop)
1469 AQ_LOCKED_MDO_DEF(add_secy)
1470 AQ_LOCKED_MDO_DEF(upd_secy)
1471 AQ_LOCKED_MDO_DEF(del_secy)
1472 AQ_LOCKED_MDO_DEF(add_rxsc)
1473 AQ_LOCKED_MDO_DEF(upd_rxsc)
1474 AQ_LOCKED_MDO_DEF(del_rxsc)
1475 AQ_LOCKED_MDO_DEF(add_rxsa)
1476 AQ_LOCKED_MDO_DEF(upd_rxsa)
1477 AQ_LOCKED_MDO_DEF(del_rxsa)
1478 AQ_LOCKED_MDO_DEF(add_txsa)
1479 AQ_LOCKED_MDO_DEF(upd_txsa)
1480 AQ_LOCKED_MDO_DEF(del_txsa)
1481 AQ_LOCKED_MDO_DEF(get_dev_stats)
1482 AQ_LOCKED_MDO_DEF(get_tx_sc_stats)
1483 AQ_LOCKED_MDO_DEF(get_tx_sa_stats)
1484 AQ_LOCKED_MDO_DEF(get_rx_sc_stats)
1485 AQ_LOCKED_MDO_DEF(get_rx_sa_stats)
1486 
1487 const struct macsec_ops aq_macsec_ops = {
1488 	.mdo_dev_open = aq_locked_mdo_dev_open,
1489 	.mdo_dev_stop = aq_locked_mdo_dev_stop,
1490 	.mdo_add_secy = aq_locked_mdo_add_secy,
1491 	.mdo_upd_secy = aq_locked_mdo_upd_secy,
1492 	.mdo_del_secy = aq_locked_mdo_del_secy,
1493 	.mdo_add_rxsc = aq_locked_mdo_add_rxsc,
1494 	.mdo_upd_rxsc = aq_locked_mdo_upd_rxsc,
1495 	.mdo_del_rxsc = aq_locked_mdo_del_rxsc,
1496 	.mdo_add_rxsa = aq_locked_mdo_add_rxsa,
1497 	.mdo_upd_rxsa = aq_locked_mdo_upd_rxsa,
1498 	.mdo_del_rxsa = aq_locked_mdo_del_rxsa,
1499 	.mdo_add_txsa = aq_locked_mdo_add_txsa,
1500 	.mdo_upd_txsa = aq_locked_mdo_upd_txsa,
1501 	.mdo_del_txsa = aq_locked_mdo_del_txsa,
1502 	.mdo_get_dev_stats = aq_locked_mdo_get_dev_stats,
1503 	.mdo_get_tx_sc_stats = aq_locked_mdo_get_tx_sc_stats,
1504 	.mdo_get_tx_sa_stats = aq_locked_mdo_get_tx_sa_stats,
1505 	.mdo_get_rx_sc_stats = aq_locked_mdo_get_rx_sc_stats,
1506 	.mdo_get_rx_sa_stats = aq_locked_mdo_get_rx_sa_stats,
1507 };
1508 
aq_macsec_init(struct aq_nic_s * nic)1509 int aq_macsec_init(struct aq_nic_s *nic)
1510 {
1511 	struct aq_macsec_cfg *cfg;
1512 	u32 caps_lo;
1513 
1514 	if (!nic->aq_fw_ops->get_link_capabilities)
1515 		return 0;
1516 
1517 	caps_lo = nic->aq_fw_ops->get_link_capabilities(nic->aq_hw);
1518 
1519 	if (!(caps_lo & BIT(CAPS_LO_MACSEC)))
1520 		return 0;
1521 
1522 	nic->macsec_cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
1523 	if (!nic->macsec_cfg)
1524 		return -ENOMEM;
1525 
1526 	nic->ndev->features |= NETIF_F_HW_MACSEC;
1527 	nic->ndev->macsec_ops = &aq_macsec_ops;
1528 	mutex_init(&nic->macsec_mutex);
1529 
1530 	return 0;
1531 }
1532 
aq_macsec_free(struct aq_nic_s * nic)1533 void aq_macsec_free(struct aq_nic_s *nic)
1534 {
1535 	kfree(nic->macsec_cfg);
1536 	nic->macsec_cfg = NULL;
1537 }
1538 
aq_macsec_enable(struct aq_nic_s * nic)1539 int aq_macsec_enable(struct aq_nic_s *nic)
1540 {
1541 	u32 ctl_ether_types[1] = { ETH_P_PAE };
1542 	struct macsec_msg_fw_response resp = { 0 };
1543 	struct macsec_msg_fw_request msg = { 0 };
1544 	struct aq_hw_s *hw = nic->aq_hw;
1545 	int num_ctl_ether_types = 0;
1546 	int index = 0, tbl_idx;
1547 	int ret;
1548 
1549 	if (!nic->macsec_cfg)
1550 		return 0;
1551 
1552 	mutex_lock(&nic->macsec_mutex);
1553 
1554 	if (nic->aq_fw_ops->send_macsec_req) {
1555 		struct macsec_cfg_request cfg = { 0 };
1556 
1557 		cfg.enabled = 1;
1558 		cfg.egress_threshold = 0xffffffff;
1559 		cfg.ingress_threshold = 0xffffffff;
1560 		cfg.interrupts_enabled = 1;
1561 
1562 		msg.msg_type = macsec_cfg_msg;
1563 		msg.cfg = cfg;
1564 
1565 		ret = nic->aq_fw_ops->send_macsec_req(hw, &msg, &resp);
1566 		if (ret)
1567 			goto unlock;
1568 	}
1569 
1570 	/* Init Ethertype bypass filters */
1571 	for (index = 0; index < ARRAY_SIZE(ctl_ether_types); index++) {
1572 		struct aq_mss_ingress_prectlf_record rx_prectlf_rec;
1573 		struct aq_mss_egress_ctlf_record tx_ctlf_rec;
1574 
1575 		if (ctl_ether_types[index] == 0)
1576 			continue;
1577 
1578 		memset(&tx_ctlf_rec, 0, sizeof(tx_ctlf_rec));
1579 		tx_ctlf_rec.eth_type = ctl_ether_types[index];
1580 		tx_ctlf_rec.match_type = 4; /* Match eth_type only */
1581 		tx_ctlf_rec.match_mask = 0xf; /* match for eth_type */
1582 		tx_ctlf_rec.action = 0; /* Bypass MACSEC modules */
1583 		tbl_idx = NUMROWS_EGRESSCTLFRECORD - num_ctl_ether_types - 1;
1584 		aq_mss_set_egress_ctlf_record(hw, &tx_ctlf_rec, tbl_idx);
1585 
1586 		memset(&rx_prectlf_rec, 0, sizeof(rx_prectlf_rec));
1587 		rx_prectlf_rec.eth_type = ctl_ether_types[index];
1588 		rx_prectlf_rec.match_type = 4; /* Match eth_type only */
1589 		rx_prectlf_rec.match_mask = 0xf; /* match for eth_type */
1590 		rx_prectlf_rec.action = 0; /* Bypass MACSEC modules */
1591 		tbl_idx =
1592 			NUMROWS_INGRESSPRECTLFRECORD - num_ctl_ether_types - 1;
1593 		aq_mss_set_ingress_prectlf_record(hw, &rx_prectlf_rec, tbl_idx);
1594 
1595 		num_ctl_ether_types++;
1596 	}
1597 
1598 	ret = aq_apply_macsec_cfg(nic);
1599 
1600 unlock:
1601 	mutex_unlock(&nic->macsec_mutex);
1602 	return ret;
1603 }
1604 
aq_macsec_work(struct aq_nic_s * nic)1605 void aq_macsec_work(struct aq_nic_s *nic)
1606 {
1607 	if (!nic->macsec_cfg)
1608 		return;
1609 
1610 	if (!netif_carrier_ok(nic->ndev))
1611 		return;
1612 
1613 	mutex_lock(&nic->macsec_mutex);
1614 	aq_check_txsa_expiration(nic);
1615 	mutex_unlock(&nic->macsec_mutex);
1616 }
1617 
aq_macsec_rx_sa_cnt(struct aq_nic_s * nic)1618 int aq_macsec_rx_sa_cnt(struct aq_nic_s *nic)
1619 {
1620 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1621 	int i, cnt = 0;
1622 
1623 	if (!cfg)
1624 		return 0;
1625 
1626 	mutex_lock(&nic->macsec_mutex);
1627 
1628 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1629 		if (!test_bit(i, &cfg->rxsc_idx_busy))
1630 			continue;
1631 		cnt += hweight_long(cfg->aq_rxsc[i].rx_sa_idx_busy);
1632 	}
1633 
1634 	mutex_unlock(&nic->macsec_mutex);
1635 	return cnt;
1636 }
1637 
aq_macsec_tx_sc_cnt(struct aq_nic_s * nic)1638 int aq_macsec_tx_sc_cnt(struct aq_nic_s *nic)
1639 {
1640 	int cnt;
1641 
1642 	if (!nic->macsec_cfg)
1643 		return 0;
1644 
1645 	mutex_lock(&nic->macsec_mutex);
1646 	cnt = hweight_long(nic->macsec_cfg->txsc_idx_busy);
1647 	mutex_unlock(&nic->macsec_mutex);
1648 
1649 	return cnt;
1650 }
1651 
aq_macsec_tx_sa_cnt(struct aq_nic_s * nic)1652 int aq_macsec_tx_sa_cnt(struct aq_nic_s *nic)
1653 {
1654 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1655 	int i, cnt = 0;
1656 
1657 	if (!cfg)
1658 		return 0;
1659 
1660 	mutex_lock(&nic->macsec_mutex);
1661 
1662 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1663 		if (!test_bit(i, &cfg->txsc_idx_busy))
1664 			continue;
1665 		cnt += hweight_long(cfg->aq_txsc[i].tx_sa_idx_busy);
1666 	}
1667 
1668 	mutex_unlock(&nic->macsec_mutex);
1669 	return cnt;
1670 }
1671 
aq_macsec_update_stats(struct aq_nic_s * nic)1672 static int aq_macsec_update_stats(struct aq_nic_s *nic)
1673 {
1674 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1675 	struct aq_hw_s *hw = nic->aq_hw;
1676 	struct aq_macsec_txsc *aq_txsc;
1677 	struct aq_macsec_rxsc *aq_rxsc;
1678 	int i, sa_idx, assoc_num;
1679 	int ret = 0;
1680 
1681 	aq_get_macsec_common_stats(hw, &cfg->stats);
1682 
1683 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1684 		if (!(cfg->txsc_idx_busy & BIT(i)))
1685 			continue;
1686 		aq_txsc = &cfg->aq_txsc[i];
1687 
1688 		ret = aq_get_txsc_stats(hw, aq_txsc->hw_sc_idx,
1689 					&aq_txsc->stats);
1690 		if (ret)
1691 			return ret;
1692 
1693 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1694 			if (!test_bit(assoc_num, &aq_txsc->tx_sa_idx_busy))
1695 				continue;
1696 			sa_idx = aq_txsc->hw_sc_idx | assoc_num;
1697 			ret = aq_get_txsa_stats(hw, sa_idx,
1698 					      &aq_txsc->tx_sa_stats[assoc_num]);
1699 			if (ret)
1700 				return ret;
1701 		}
1702 	}
1703 
1704 	for (i = 0; i < AQ_MACSEC_MAX_SC; i++) {
1705 		if (!(test_bit(i, &cfg->rxsc_idx_busy)))
1706 			continue;
1707 		aq_rxsc = &cfg->aq_rxsc[i];
1708 
1709 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1710 			if (!test_bit(assoc_num, &aq_rxsc->rx_sa_idx_busy))
1711 				continue;
1712 			sa_idx = aq_rxsc->hw_sc_idx | assoc_num;
1713 
1714 			ret = aq_get_rxsa_stats(hw, sa_idx,
1715 					      &aq_rxsc->rx_sa_stats[assoc_num]);
1716 			if (ret)
1717 				return ret;
1718 		}
1719 	}
1720 
1721 	return ret;
1722 }
1723 
aq_macsec_get_stats(struct aq_nic_s * nic,u64 * data)1724 u64 *aq_macsec_get_stats(struct aq_nic_s *nic, u64 *data)
1725 {
1726 	struct aq_macsec_cfg *cfg = nic->macsec_cfg;
1727 	struct aq_macsec_common_stats *common_stats;
1728 	struct aq_macsec_tx_sc_stats *txsc_stats;
1729 	struct aq_macsec_tx_sa_stats *txsa_stats;
1730 	struct aq_macsec_rx_sa_stats *rxsa_stats;
1731 	struct aq_macsec_txsc *aq_txsc;
1732 	struct aq_macsec_rxsc *aq_rxsc;
1733 	unsigned int assoc_num;
1734 	unsigned int sc_num;
1735 	unsigned int i = 0U;
1736 
1737 	if (!cfg)
1738 		return data;
1739 
1740 	mutex_lock(&nic->macsec_mutex);
1741 
1742 	aq_macsec_update_stats(nic);
1743 
1744 	common_stats = &cfg->stats;
1745 	data[i] = common_stats->in.ctl_pkts;
1746 	data[++i] = common_stats->in.tagged_miss_pkts;
1747 	data[++i] = common_stats->in.untagged_miss_pkts;
1748 	data[++i] = common_stats->in.notag_pkts;
1749 	data[++i] = common_stats->in.untagged_pkts;
1750 	data[++i] = common_stats->in.bad_tag_pkts;
1751 	data[++i] = common_stats->in.no_sci_pkts;
1752 	data[++i] = common_stats->in.unknown_sci_pkts;
1753 	data[++i] = common_stats->in.ctrl_prt_pass_pkts;
1754 	data[++i] = common_stats->in.unctrl_prt_pass_pkts;
1755 	data[++i] = common_stats->in.ctrl_prt_fail_pkts;
1756 	data[++i] = common_stats->in.unctrl_prt_fail_pkts;
1757 	data[++i] = common_stats->in.too_long_pkts;
1758 	data[++i] = common_stats->in.igpoc_ctl_pkts;
1759 	data[++i] = common_stats->in.ecc_error_pkts;
1760 	data[++i] = common_stats->in.unctrl_hit_drop_redir;
1761 	data[++i] = common_stats->out.ctl_pkts;
1762 	data[++i] = common_stats->out.unknown_sa_pkts;
1763 	data[++i] = common_stats->out.untagged_pkts;
1764 	data[++i] = common_stats->out.too_long;
1765 	data[++i] = common_stats->out.ecc_error_pkts;
1766 	data[++i] = common_stats->out.unctrl_hit_drop_redir;
1767 
1768 	for (sc_num = 0; sc_num < AQ_MACSEC_MAX_SC; sc_num++) {
1769 		if (!(test_bit(sc_num, &cfg->txsc_idx_busy)))
1770 			continue;
1771 
1772 		aq_txsc = &cfg->aq_txsc[sc_num];
1773 		txsc_stats = &aq_txsc->stats;
1774 
1775 		data[++i] = txsc_stats->sc_protected_pkts;
1776 		data[++i] = txsc_stats->sc_encrypted_pkts;
1777 		data[++i] = txsc_stats->sc_protected_octets;
1778 		data[++i] = txsc_stats->sc_encrypted_octets;
1779 
1780 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1781 			if (!test_bit(assoc_num, &aq_txsc->tx_sa_idx_busy))
1782 				continue;
1783 
1784 			txsa_stats = &aq_txsc->tx_sa_stats[assoc_num];
1785 
1786 			data[++i] = txsa_stats->sa_hit_drop_redirect;
1787 			data[++i] = txsa_stats->sa_protected2_pkts;
1788 			data[++i] = txsa_stats->sa_protected_pkts;
1789 			data[++i] = txsa_stats->sa_encrypted_pkts;
1790 		}
1791 	}
1792 
1793 	for (sc_num = 0; sc_num < AQ_MACSEC_MAX_SC; sc_num++) {
1794 		if (!(test_bit(sc_num, &cfg->rxsc_idx_busy)))
1795 			continue;
1796 
1797 		aq_rxsc = &cfg->aq_rxsc[sc_num];
1798 
1799 		for (assoc_num = 0; assoc_num < MACSEC_NUM_AN; assoc_num++) {
1800 			if (!test_bit(assoc_num, &aq_rxsc->rx_sa_idx_busy))
1801 				continue;
1802 
1803 			rxsa_stats = &aq_rxsc->rx_sa_stats[assoc_num];
1804 
1805 			data[++i] = rxsa_stats->untagged_hit_pkts;
1806 			data[++i] = rxsa_stats->ctrl_hit_drop_redir_pkts;
1807 			data[++i] = rxsa_stats->not_using_sa;
1808 			data[++i] = rxsa_stats->unused_sa;
1809 			data[++i] = rxsa_stats->not_valid_pkts;
1810 			data[++i] = rxsa_stats->invalid_pkts;
1811 			data[++i] = rxsa_stats->ok_pkts;
1812 			data[++i] = rxsa_stats->late_pkts;
1813 			data[++i] = rxsa_stats->delayed_pkts;
1814 			data[++i] = rxsa_stats->unchecked_pkts;
1815 			data[++i] = rxsa_stats->validated_octets;
1816 			data[++i] = rxsa_stats->decrypted_octets;
1817 		}
1818 	}
1819 
1820 	i++;
1821 
1822 	data += i;
1823 
1824 	mutex_unlock(&nic->macsec_mutex);
1825 
1826 	return data;
1827 }
1828