1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * KPC2000 i2c driver
4 *
5 * Adapted i2c-i801.c for use with Kadoka hardware.
6 *
7 * Copyright (C) 1998 - 2002
8 * Frodo Looijaard <frodol@dds.nl>,
9 * Philip Edelbrock <phil@netroedge.com>,
10 * Mark D. Studebaker <mdsxyz123@yahoo.com>
11 * Copyright (C) 2007 - 2012
12 * Jean Delvare <khali@linux-fr.org>
13 * Copyright (C) 2010 Intel Corporation
14 * David Woodhouse <dwmw2@infradead.org>
15 * Copyright (C) 2014-2018 Daktronics
16 * Matt Sickler <matt.sickler@daktronics.com>,
17 * Jordon Hofer <jordon.hofer@daktronics.com>
18 */
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/types.h>
22 #include <linux/io.h>
23 #include <linux/io-64-nonatomic-lo-hi.h>
24 #include <linux/export.h>
25 #include <linux/slab.h>
26 #include <linux/platform_device.h>
27 #include <linux/fs.h>
28 #include <linux/delay.h>
29 #include <linux/i2c.h>
30 #include "kpc.h"
31
32 MODULE_LICENSE("GPL");
33 MODULE_AUTHOR("Matt.Sickler@Daktronics.com");
34
35 struct kpc_i2c {
36 unsigned long smba;
37 struct i2c_adapter adapter;
38 unsigned int features;
39 };
40
41 /*****************************
42 *** Part 1 - i2c Handlers ***
43 *****************************/
44
45 #define REG_SIZE 8
46
47 /* I801 SMBus address offsets */
48 #define SMBHSTSTS(p) ((0 * REG_SIZE) + (p)->smba)
49 #define SMBHSTCNT(p) ((2 * REG_SIZE) + (p)->smba)
50 #define SMBHSTCMD(p) ((3 * REG_SIZE) + (p)->smba)
51 #define SMBHSTADD(p) ((4 * REG_SIZE) + (p)->smba)
52 #define SMBHSTDAT0(p) ((5 * REG_SIZE) + (p)->smba)
53 #define SMBHSTDAT1(p) ((6 * REG_SIZE) + (p)->smba)
54 #define SMBBLKDAT(p) ((7 * REG_SIZE) + (p)->smba)
55 #define SMBPEC(p) ((8 * REG_SIZE) + (p)->smba) /* ICH3 and later */
56 #define SMBAUXSTS(p) ((12 * REG_SIZE) + (p)->smba) /* ICH4 and later */
57 #define SMBAUXCTL(p) ((13 * REG_SIZE) + (p)->smba) /* ICH4 and later */
58
59 /* PCI Address Constants */
60 #define SMBBAR 4
61 #define SMBHSTCFG 0x040
62
63 /* Host configuration bits for SMBHSTCFG */
64 #define SMBHSTCFG_HST_EN 1
65 #define SMBHSTCFG_SMB_SMI_EN 2
66 #define SMBHSTCFG_I2C_EN 4
67
68 /* Auxiliary control register bits, ICH4+ only */
69 #define SMBAUXCTL_CRC 1
70 #define SMBAUXCTL_E32B 2
71
72 /* kill bit for SMBHSTCNT */
73 #define SMBHSTCNT_KILL 2
74
75 /* Other settings */
76 #define MAX_RETRIES 400
77 #define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
78
79 /* I801 command constants */
80 #define I801_QUICK 0x00
81 #define I801_BYTE 0x04
82 #define I801_BYTE_DATA 0x08
83 #define I801_WORD_DATA 0x0C
84 #define I801_PROC_CALL 0x10 /* unimplemented */
85 #define I801_BLOCK_DATA 0x14
86 #define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
87 #define I801_BLOCK_LAST 0x34
88 #define I801_I2C_BLOCK_LAST 0x38 /* ICH5 and later */
89 #define I801_START 0x40
90 #define I801_PEC_EN 0x80 /* ICH3 and later */
91
92 /* I801 Hosts Status register bits */
93 #define SMBHSTSTS_BYTE_DONE 0x80
94 #define SMBHSTSTS_INUSE_STS 0x40
95 #define SMBHSTSTS_SMBALERT_STS 0x20
96 #define SMBHSTSTS_FAILED 0x10
97 #define SMBHSTSTS_BUS_ERR 0x08
98 #define SMBHSTSTS_DEV_ERR 0x04
99 #define SMBHSTSTS_INTR 0x02
100 #define SMBHSTSTS_HOST_BUSY 0x01
101
102 #define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_FAILED | \
103 SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | SMBHSTSTS_INTR)
104
105 /* Older devices have their ID defined in <linux/pci_ids.h> */
106 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
107 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
108 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
109 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
110 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
111 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
112 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
113 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
114 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
115 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
116 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22
117
118 #define FEATURE_SMBUS_PEC BIT(0)
119 #define FEATURE_BLOCK_BUFFER BIT(1)
120 #define FEATURE_BLOCK_PROC BIT(2)
121 #define FEATURE_I2C_BLOCK_READ BIT(3)
122 /* Not really a feature, but it's convenient to handle it as such */
123 #define FEATURE_IDF BIT(15)
124
125 // FIXME!
126 #undef inb_p
127 #define inb_p(a) readq((void __iomem *)a)
128 #undef outb_p
129 #define outb_p(d, a) writeq(d, (void __iomem *)a)
130
131 /* Make sure the SMBus host is ready to start transmitting.
132 * Return 0 if it is, -EBUSY if it is not.
133 */
i801_check_pre(struct kpc_i2c * priv)134 static int i801_check_pre(struct kpc_i2c *priv)
135 {
136 int status;
137
138 status = inb_p(SMBHSTSTS(priv));
139 if (status & SMBHSTSTS_HOST_BUSY) {
140 dev_err(&priv->adapter.dev,
141 "SMBus is busy, can't use it! (status=%x)\n", status);
142 return -EBUSY;
143 }
144
145 status &= STATUS_FLAGS;
146 if (status) {
147 outb_p(status, SMBHSTSTS(priv));
148 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
149 if (status) {
150 dev_err(&priv->adapter.dev,
151 "Failed clearing status flags (%02x)\n", status);
152 return -EBUSY;
153 }
154 }
155 return 0;
156 }
157
158 /* Convert the status register to an error code, and clear it. */
i801_check_post(struct kpc_i2c * priv,int status,int timeout)159 static int i801_check_post(struct kpc_i2c *priv, int status, int timeout)
160 {
161 int result = 0;
162
163 /* If the SMBus is still busy, we give up */
164 if (timeout) {
165 dev_err(&priv->adapter.dev, "Transaction timeout\n");
166 /* try to stop the current command */
167 dev_dbg(&priv->adapter.dev,
168 "Terminating the current operation\n");
169 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
170 SMBHSTCNT(priv));
171 usleep_range(1000, 2000);
172 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
173 SMBHSTCNT(priv));
174
175 /* Check if it worked */
176 status = inb_p(SMBHSTSTS(priv));
177 if ((status & SMBHSTSTS_HOST_BUSY) ||
178 !(status & SMBHSTSTS_FAILED))
179 dev_err(&priv->adapter.dev,
180 "Failed terminating the transaction\n");
181 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
182 return -ETIMEDOUT;
183 }
184
185 if (status & SMBHSTSTS_FAILED) {
186 result = -EIO;
187 dev_err(&priv->adapter.dev, "Transaction failed\n");
188 }
189 if (status & SMBHSTSTS_DEV_ERR) {
190 result = -ENXIO;
191 dev_dbg(&priv->adapter.dev, "No response\n");
192 }
193 if (status & SMBHSTSTS_BUS_ERR) {
194 result = -EAGAIN;
195 dev_dbg(&priv->adapter.dev, "Lost arbitration\n");
196 }
197
198 if (result) {
199 /* Clear error flags */
200 outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
201 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
202 if (status)
203 dev_warn(&priv->adapter.dev, "Failed clearing status flags at end of transaction (%02x)\n", status);
204 }
205
206 return result;
207 }
208
i801_transaction(struct kpc_i2c * priv,int xact)209 static int i801_transaction(struct kpc_i2c *priv, int xact)
210 {
211 int status;
212 int result;
213 int timeout = 0;
214
215 result = i801_check_pre(priv);
216 if (result < 0)
217 return result;
218 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
219 * INTREN, SMBSCMD are passed in xact
220 */
221 outb_p(xact | I801_START, SMBHSTCNT(priv));
222
223 /* We will always wait for a fraction of a second! */
224 do {
225 usleep_range(250, 500);
226 status = inb_p(SMBHSTSTS(priv));
227 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_RETRIES));
228
229 result = i801_check_post(priv, status, timeout > MAX_RETRIES);
230 if (result < 0)
231 return result;
232
233 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
234 return 0;
235 }
236
237 /* wait for INTR bit as advised by Intel */
i801_wait_hwpec(struct kpc_i2c * priv)238 static void i801_wait_hwpec(struct kpc_i2c *priv)
239 {
240 int timeout = 0;
241 int status;
242
243 do {
244 usleep_range(250, 500);
245 status = inb_p(SMBHSTSTS(priv));
246 } while ((!(status & SMBHSTSTS_INTR)) && (timeout++ < MAX_RETRIES));
247
248 if (timeout > MAX_RETRIES)
249 dev_dbg(&priv->adapter.dev, "PEC Timeout!\n");
250
251 outb_p(status, SMBHSTSTS(priv));
252 }
253
i801_block_transaction_by_block(struct kpc_i2c * priv,union i2c_smbus_data * data,char read_write,int hwpec)254 static int i801_block_transaction_by_block(struct kpc_i2c *priv,
255 union i2c_smbus_data *data,
256 char read_write, int hwpec)
257 {
258 int i, len;
259 int status;
260
261 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
262
263 /* Use 32-byte buffer to process this transaction */
264 if (read_write == I2C_SMBUS_WRITE) {
265 len = data->block[0];
266 outb_p(len, SMBHSTDAT0(priv));
267 for (i = 0; i < len; i++)
268 outb_p(data->block[i + 1], SMBBLKDAT(priv));
269 }
270
271 status = i801_transaction(priv,
272 I801_BLOCK_DATA | ENABLE_INT9 | I801_PEC_EN * hwpec);
273 if (status)
274 return status;
275
276 if (read_write == I2C_SMBUS_READ) {
277 len = inb_p(SMBHSTDAT0(priv));
278 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
279 return -EPROTO;
280
281 data->block[0] = len;
282 for (i = 0; i < len; i++)
283 data->block[i + 1] = inb_p(SMBBLKDAT(priv));
284 }
285 return 0;
286 }
287
i801_block_transaction_byte_by_byte(struct kpc_i2c * priv,union i2c_smbus_data * data,char read_write,int command,int hwpec)288 static int i801_block_transaction_byte_by_byte(struct kpc_i2c *priv,
289 union i2c_smbus_data *data,
290 char read_write, int command,
291 int hwpec)
292 {
293 int i, len;
294 int smbcmd;
295 int status;
296 int result;
297 int timeout;
298
299 result = i801_check_pre(priv);
300 if (result < 0)
301 return result;
302
303 len = data->block[0];
304
305 if (read_write == I2C_SMBUS_WRITE) {
306 outb_p(len, SMBHSTDAT0(priv));
307 outb_p(data->block[1], SMBBLKDAT(priv));
308 }
309
310 for (i = 1; i <= len; i++) {
311 if (i == len && read_write == I2C_SMBUS_READ) {
312 if (command == I2C_SMBUS_I2C_BLOCK_DATA)
313 smbcmd = I801_I2C_BLOCK_LAST;
314 else
315 smbcmd = I801_BLOCK_LAST;
316 } else {
317 if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
318 read_write == I2C_SMBUS_READ)
319 smbcmd = I801_I2C_BLOCK_DATA;
320 else
321 smbcmd = I801_BLOCK_DATA;
322 }
323 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
324
325 if (i == 1)
326 outb_p(inb(SMBHSTCNT(priv)) | I801_START,
327 SMBHSTCNT(priv));
328 /* We will always wait for a fraction of a second! */
329 timeout = 0;
330 do {
331 usleep_range(250, 500);
332 status = inb_p(SMBHSTSTS(priv));
333 } while (!(status & SMBHSTSTS_BYTE_DONE) &&
334 (timeout++ < MAX_RETRIES));
335
336 result = i801_check_post(priv, status, timeout > MAX_RETRIES);
337 if (result < 0)
338 return result;
339 if (i == 1 && read_write == I2C_SMBUS_READ &&
340 command != I2C_SMBUS_I2C_BLOCK_DATA) {
341 len = inb_p(SMBHSTDAT0(priv));
342 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
343 dev_err(&priv->adapter.dev,
344 "Illegal SMBus block read size %d\n",
345 len);
346 /* Recover */
347 while (inb_p(SMBHSTSTS(priv)) &
348 SMBHSTSTS_HOST_BUSY)
349 outb_p(SMBHSTSTS_BYTE_DONE,
350 SMBHSTSTS(priv));
351 outb_p(SMBHSTSTS_INTR,
352 SMBHSTSTS(priv));
353 return -EPROTO;
354 }
355 data->block[0] = len;
356 }
357
358 /* Retrieve/store value in SMBBLKDAT */
359 if (read_write == I2C_SMBUS_READ)
360 data->block[i] = inb_p(SMBBLKDAT(priv));
361 if (read_write == I2C_SMBUS_WRITE && i + 1 <= len)
362 outb_p(data->block[i + 1], SMBBLKDAT(priv));
363 /* signals SMBBLKDAT ready */
364 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
365 }
366
367 return 0;
368 }
369
i801_set_block_buffer_mode(struct kpc_i2c * priv)370 static int i801_set_block_buffer_mode(struct kpc_i2c *priv)
371 {
372 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
373 if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
374 return -EIO;
375 return 0;
376 }
377
378 /* Block transaction function */
i801_block_transaction(struct kpc_i2c * priv,union i2c_smbus_data * data,char read_write,int command,int hwpec)379 static int i801_block_transaction(struct kpc_i2c *priv,
380 union i2c_smbus_data *data, char read_write,
381 int command, int hwpec)
382 {
383 int result = 0;
384 //unsigned char hostc;
385
386 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
387 if (read_write == I2C_SMBUS_WRITE) {
388 /* set I2C_EN bit in configuration register */
389 //TODO: Figure out the right thing to do here...
390 //pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
391 //pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc | SMBHSTCFG_I2C_EN);
392 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
393 dev_err(&priv->adapter.dev,
394 "I2C block read is unsupported!\n");
395 return -EOPNOTSUPP;
396 }
397 }
398
399 if (read_write == I2C_SMBUS_WRITE ||
400 command == I2C_SMBUS_I2C_BLOCK_DATA) {
401 if (data->block[0] < 1)
402 data->block[0] = 1;
403 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
404 data->block[0] = I2C_SMBUS_BLOCK_MAX;
405 } else {
406 data->block[0] = 32; /* max for SMBus block reads */
407 }
408
409 /* Experience has shown that the block buffer can only be used for
410 * SMBus (not I2C) block transactions, even though the datasheet
411 * doesn't mention this limitation.
412 */
413 if ((priv->features & FEATURE_BLOCK_BUFFER) &&
414 command != I2C_SMBUS_I2C_BLOCK_DATA &&
415 i801_set_block_buffer_mode(priv) == 0) {
416 result = i801_block_transaction_by_block(priv, data,
417 read_write, hwpec);
418 } else {
419 result = i801_block_transaction_byte_by_byte(priv, data,
420 read_write,
421 command, hwpec);
422 }
423
424 if (result == 0 && hwpec)
425 i801_wait_hwpec(priv);
426 if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
427 read_write == I2C_SMBUS_WRITE) {
428 /* restore saved configuration register value */
429 //TODO: Figure out the right thing to do here...
430 //pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
431 }
432 return result;
433 }
434
435 /* Return negative errno on error. */
i801_access(struct i2c_adapter * adap,u16 addr,unsigned short flags,char read_write,u8 command,int size,union i2c_smbus_data * data)436 static s32 i801_access(struct i2c_adapter *adap, u16 addr,
437 unsigned short flags, char read_write, u8 command,
438 int size, union i2c_smbus_data *data)
439 {
440 int hwpec;
441 int block = 0;
442 int ret, xact = 0;
443 struct kpc_i2c *priv = i2c_get_adapdata(adap);
444
445 hwpec = (priv->features & FEATURE_SMBUS_PEC) &&
446 (flags & I2C_CLIENT_PEC) &&
447 size != I2C_SMBUS_QUICK && size != I2C_SMBUS_I2C_BLOCK_DATA;
448
449 switch (size) {
450 case I2C_SMBUS_QUICK:
451 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_QUICK\n");
452 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
453 SMBHSTADD(priv));
454
455 xact = I801_QUICK;
456 break;
457 case I2C_SMBUS_BYTE:
458 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_BYTE\n");
459
460 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
461 SMBHSTADD(priv));
462 if (read_write == I2C_SMBUS_WRITE)
463 outb_p(command, SMBHSTCMD(priv));
464 xact = I801_BYTE;
465 break;
466 case I2C_SMBUS_BYTE_DATA:
467 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_BYTE_DATA\n");
468 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
469 SMBHSTADD(priv));
470
471 outb_p(command, SMBHSTCMD(priv));
472 if (read_write == I2C_SMBUS_WRITE)
473 outb_p(data->byte, SMBHSTDAT0(priv));
474 xact = I801_BYTE_DATA;
475 break;
476 case I2C_SMBUS_WORD_DATA:
477 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_WORD_DATA\n");
478 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
479 SMBHSTADD(priv));
480
481 outb_p(command, SMBHSTCMD(priv));
482 if (read_write == I2C_SMBUS_WRITE) {
483 outb_p(data->word & 0xff, SMBHSTDAT0(priv));
484 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
485 }
486 xact = I801_WORD_DATA;
487 break;
488 case I2C_SMBUS_BLOCK_DATA:
489 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_BLOCK_DATA\n");
490 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
491 SMBHSTADD(priv));
492
493 outb_p(command, SMBHSTCMD(priv));
494 block = 1;
495 break;
496 case I2C_SMBUS_I2C_BLOCK_DATA:
497 dev_dbg(&priv->adapter.dev, " [acc] SMBUS_I2C_BLOCK_DATA\n");
498 /* NB: page 240 of ICH5 datasheet shows that the R/#W
499 * bit should be cleared here, even when reading
500 */
501 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
502 if (read_write == I2C_SMBUS_READ) {
503 /* NB: page 240 of ICH5 datasheet also shows
504 * that DATA1 is the cmd field when reading
505 */
506 outb_p(command, SMBHSTDAT1(priv));
507 } else {
508 outb_p(command, SMBHSTCMD(priv));
509 }
510 block = 1;
511 break;
512 default:
513 dev_dbg(&priv->adapter.dev,
514 " [acc] Unsupported transaction %d\n", size);
515 return -EOPNOTSUPP;
516 }
517
518 if (hwpec) { /* enable/disable hardware PEC */
519 dev_dbg(&priv->adapter.dev, " [acc] hwpec: yes\n");
520 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
521 } else {
522 dev_dbg(&priv->adapter.dev, " [acc] hwpec: no\n");
523 outb_p(inb_p(SMBAUXCTL(priv)) &
524 (~SMBAUXCTL_CRC), SMBAUXCTL(priv));
525 }
526
527 if (block) {
528 dev_dbg(&priv->adapter.dev, " [acc] block: yes\n");
529 ret = i801_block_transaction(priv, data, read_write, size,
530 hwpec);
531 } else {
532 dev_dbg(&priv->adapter.dev, " [acc] block: no\n");
533 ret = i801_transaction(priv, xact | ENABLE_INT9);
534 }
535
536 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
537 * time, so we forcibly disable it after every transaction. Turn off
538 * E32B for the same reason.
539 */
540 if (hwpec || block) {
541 dev_dbg(&priv->adapter.dev, " [acc] hwpec || block\n");
542 outb_p(inb_p(SMBAUXCTL(priv)) & ~(SMBAUXCTL_CRC |
543 SMBAUXCTL_E32B), SMBAUXCTL(priv));
544 }
545 if (block) {
546 dev_dbg(&priv->adapter.dev, " [acc] block\n");
547 return ret;
548 }
549 if (ret) {
550 dev_dbg(&priv->adapter.dev, " [acc] ret %d\n", ret);
551 return ret;
552 }
553 if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) {
554 dev_dbg(&priv->adapter.dev,
555 " [acc] I2C_SMBUS_WRITE || I801_QUICK -> ret 0\n");
556 return 0;
557 }
558
559 switch (xact & 0x7f) {
560 case I801_BYTE: /* Result put in SMBHSTDAT0 */
561 case I801_BYTE_DATA:
562 dev_dbg(&priv->adapter.dev,
563 " [acc] I801_BYTE or I801_BYTE_DATA\n");
564 data->byte = inb_p(SMBHSTDAT0(priv));
565 break;
566 case I801_WORD_DATA:
567 dev_dbg(&priv->adapter.dev, " [acc] I801_WORD_DATA\n");
568 data->word = inb_p(SMBHSTDAT0(priv)) +
569 (inb_p(SMBHSTDAT1(priv)) << 8);
570 break;
571 }
572 return 0;
573 }
574
575 #define enable_flag(x) (x)
576 #define disable_flag(x) 0
577 #define enable_flag_if(x, cond) ((cond) ? (x) : 0)
578
i801_func(struct i2c_adapter * adapter)579 static u32 i801_func(struct i2c_adapter *adapter)
580 {
581 struct kpc_i2c *priv = i2c_get_adapdata(adapter);
582
583 /* original settings
584 * u32 f = I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
585 * I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
586 * I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
587 * ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
588 * ((priv->features & FEATURE_I2C_BLOCK_READ) ?
589 * I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
590 */
591
592 // http://lxr.free-electrons.com/source/include/uapi/linux/i2c.h#L85
593
594 u32 f =
595 enable_flag(I2C_FUNC_I2C) | /* 0x00000001(I enabled this one) */
596 disable_flag(I2C_FUNC_10BIT_ADDR) | /* 0x00000002 */
597 disable_flag(I2C_FUNC_PROTOCOL_MANGLING) | /* 0x00000004 */
598 enable_flag_if(I2C_FUNC_SMBUS_PEC,
599 priv->features & FEATURE_SMBUS_PEC) |
600 /* 0x00000008 */
601 disable_flag(I2C_FUNC_SMBUS_BLOCK_PROC_CALL) | /* 0x00008000 */
602 enable_flag(I2C_FUNC_SMBUS_QUICK) | /* 0x00010000 */
603 disable_flag(I2C_FUNC_SMBUS_READ_BYTE) | /* 0x00020000 */
604 disable_flag(I2C_FUNC_SMBUS_WRITE_BYTE) | /* 0x00040000 */
605 disable_flag(I2C_FUNC_SMBUS_READ_BYTE_DATA) | /* 0x00080000 */
606 disable_flag(I2C_FUNC_SMBUS_WRITE_BYTE_DATA) | /* 0x00100000 */
607 disable_flag(I2C_FUNC_SMBUS_READ_WORD_DATA) | /* 0x00200000 */
608 disable_flag(I2C_FUNC_SMBUS_WRITE_WORD_DATA) | /* 0x00400000 */
609 disable_flag(I2C_FUNC_SMBUS_PROC_CALL) | /* 0x00800000 */
610 disable_flag(I2C_FUNC_SMBUS_READ_BLOCK_DATA) | /* 0x01000000 */
611 disable_flag(I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) | /* 0x02000000 */
612 enable_flag_if(I2C_FUNC_SMBUS_READ_I2C_BLOCK,
613 priv->features & FEATURE_I2C_BLOCK_READ) |
614 /* 0x04000000 */
615 enable_flag(I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) | /* 0x08000000 */
616
617 enable_flag(I2C_FUNC_SMBUS_BYTE) | /* _READ_BYTE _WRITE_BYTE */
618 enable_flag(I2C_FUNC_SMBUS_BYTE_DATA) | /* _READ_BYTE_DATA
619 * _WRITE_BYTE_DATA
620 */
621 enable_flag(I2C_FUNC_SMBUS_WORD_DATA) | /* _READ_WORD_DATA
622 * _WRITE_WORD_DATA
623 */
624 enable_flag(I2C_FUNC_SMBUS_BLOCK_DATA) | /* _READ_BLOCK_DATA
625 * _WRITE_BLOCK_DATA
626 */
627 disable_flag(I2C_FUNC_SMBUS_I2C_BLOCK) | /* _READ_I2C_BLOCK
628 * _WRITE_I2C_BLOCK
629 */
630 disable_flag(I2C_FUNC_SMBUS_EMUL); /* _QUICK _BYTE
631 * _BYTE_DATA _WORD_DATA
632 * _PROC_CALL
633 * _WRITE_BLOCK_DATA
634 * _I2C_BLOCK _PEC
635 */
636 return f;
637 }
638
639 #undef enable_flag
640 #undef disable_flag
641 #undef enable_flag_if
642
643 static const struct i2c_algorithm smbus_algorithm = {
644 .smbus_xfer = i801_access,
645 .functionality = i801_func,
646 };
647
648 /********************************
649 *** Part 2 - Driver Handlers ***
650 ********************************/
kpc_i2c_probe(struct platform_device * pldev)651 static int kpc_i2c_probe(struct platform_device *pldev)
652 {
653 int err;
654 struct kpc_i2c *priv;
655 struct resource *res;
656
657 priv = devm_kzalloc(&pldev->dev, sizeof(*priv), GFP_KERNEL);
658 if (!priv)
659 return -ENOMEM;
660
661 i2c_set_adapdata(&priv->adapter, priv);
662 priv->adapter.owner = THIS_MODULE;
663 priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
664 priv->adapter.algo = &smbus_algorithm;
665
666 res = platform_get_resource(pldev, IORESOURCE_MEM, 0);
667 if (!res)
668 return -ENXIO;
669
670 priv->smba = (unsigned long)devm_ioremap(&pldev->dev,
671 res->start,
672 resource_size(res));
673 if (!priv->smba)
674 return -ENOMEM;
675
676 platform_set_drvdata(pldev, priv);
677
678 priv->features |= FEATURE_IDF;
679 priv->features |= FEATURE_I2C_BLOCK_READ;
680 priv->features |= FEATURE_SMBUS_PEC;
681 priv->features |= FEATURE_BLOCK_BUFFER;
682
683 //init_MUTEX(&lddata->sem);
684
685 /* set up the sysfs linkage to our parent device */
686 priv->adapter.dev.parent = &pldev->dev;
687
688 /* Retry up to 3 times on lost arbitration */
689 priv->adapter.retries = 3;
690
691 snprintf(priv->adapter.name, sizeof(priv->adapter.name),
692 "Fake SMBus I801 adapter");
693
694 err = i2c_add_adapter(&priv->adapter);
695 if (err) {
696 dev_err(&priv->adapter.dev, "Failed to add SMBus adapter\n");
697 return err;
698 }
699
700 return 0;
701 }
702
kpc_i2c_remove(struct platform_device * pldev)703 static int kpc_i2c_remove(struct platform_device *pldev)
704 {
705 struct kpc_i2c *lddev;
706
707 lddev = (struct kpc_i2c *)platform_get_drvdata(pldev);
708
709 i2c_del_adapter(&lddev->adapter);
710
711 //TODO: Figure out the right thing to do here...
712 //pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
713 //pci_release_region(dev, SMBBAR);
714 //pci_set_drvdata(dev, NULL);
715
716 //cdev_del(&lddev->cdev);
717
718 return 0;
719 }
720
721 static struct platform_driver kpc_i2c_driver = {
722 .probe = kpc_i2c_probe,
723 .remove = kpc_i2c_remove,
724 .driver = {
725 .name = KP_DRIVER_NAME_I2C,
726 },
727 };
728
729 module_platform_driver(kpc_i2c_driver);
730