• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
4  * All rights reserved.
5  *
6  * File: baseband.c
7  *
8  * Purpose: Implement functions to access baseband
9  *
10  * Author: Kyle Hsu
11  *
12  * Date: Aug.22, 2002
13  *
14  * Functions:
15  *      bb_get_frame_time	 - Calculate data frame transmitting time
16  *      bb_read_embedded	 - Embedded read baseband register via MAC
17  *      bb_write_embedded	 - Embedded write baseband register via MAC
18  *      bb_vt3253_init		 - VIA VT3253 baseband chip init code
19  *
20  * Revision History:
21  *      06-10-2003 Bryan YC Fan:  Re-write codes to support VT3253 spec.
22  *      08-07-2003 Bryan YC Fan:  Add MAXIM2827/2825 and RFMD2959 support.
23  *      08-26-2003 Kyle Hsu    :  Modify BBuGetFrameTime() and
24  *				  BBvCalculateParameter().
25  *                                cancel the setting of MAC_REG_SOFTPWRCTL on
26  *				  BBbVT3253Init().
27  *                                Add the comments.
28  *      09-01-2003 Bryan YC Fan:  RF & BB tables updated.
29  *                                Modified BBvLoopbackOn & BBvLoopbackOff().
30  *
31  *
32  */
33 
34 #include "tmacro.h"
35 #include "mac.h"
36 #include "baseband.h"
37 #include "srom.h"
38 #include "rf.h"
39 
40 /*---------------------  Static Classes  ----------------------------*/
41 
42 /*---------------------  Static Variables  --------------------------*/
43 
44 /*---------------------  Static Functions  --------------------------*/
45 
46 /*---------------------  Export Variables  --------------------------*/
47 
48 /*---------------------  Static Definitions -------------------------*/
49 
50 /*---------------------  Static Classes  ----------------------------*/
51 
52 /*---------------------  Static Variables  --------------------------*/
53 
54 #define CB_VT3253_INIT_FOR_RFMD 446
55 static const unsigned char byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
56 	{0x00, 0x30},
57 	{0x01, 0x00},
58 	{0x02, 0x00},
59 	{0x03, 0x00},
60 	{0x04, 0x00},
61 	{0x05, 0x00},
62 	{0x06, 0x00},
63 	{0x07, 0x00},
64 	{0x08, 0x70},
65 	{0x09, 0x45},
66 	{0x0a, 0x2a},
67 	{0x0b, 0x76},
68 	{0x0c, 0x00},
69 	{0x0d, 0x01},
70 	{0x0e, 0x80},
71 	{0x0f, 0x00},
72 	{0x10, 0x00},
73 	{0x11, 0x00},
74 	{0x12, 0x00},
75 	{0x13, 0x00},
76 	{0x14, 0x00},
77 	{0x15, 0x00},
78 	{0x16, 0x00},
79 	{0x17, 0x00},
80 	{0x18, 0x00},
81 	{0x19, 0x00},
82 	{0x1a, 0x00},
83 	{0x1b, 0x9d},
84 	{0x1c, 0x05},
85 	{0x1d, 0x00},
86 	{0x1e, 0x00},
87 	{0x1f, 0x00},
88 	{0x20, 0x00},
89 	{0x21, 0x00},
90 	{0x22, 0x00},
91 	{0x23, 0x00},
92 	{0x24, 0x00},
93 	{0x25, 0x4a},
94 	{0x26, 0x00},
95 	{0x27, 0x00},
96 	{0x28, 0x00},
97 	{0x29, 0x00},
98 	{0x2a, 0x00},
99 	{0x2b, 0x00},
100 	{0x2c, 0x00},
101 	{0x2d, 0xa8},
102 	{0x2e, 0x1a},
103 	{0x2f, 0x0c},
104 	{0x30, 0x26},
105 	{0x31, 0x5b},
106 	{0x32, 0x00},
107 	{0x33, 0x00},
108 	{0x34, 0x00},
109 	{0x35, 0x00},
110 	{0x36, 0xaa},
111 	{0x37, 0xaa},
112 	{0x38, 0xff},
113 	{0x39, 0xff},
114 	{0x3a, 0x00},
115 	{0x3b, 0x00},
116 	{0x3c, 0x00},
117 	{0x3d, 0x0d},
118 	{0x3e, 0x51},
119 	{0x3f, 0x04},
120 	{0x40, 0x00},
121 	{0x41, 0x08},
122 	{0x42, 0x00},
123 	{0x43, 0x08},
124 	{0x44, 0x06},
125 	{0x45, 0x14},
126 	{0x46, 0x05},
127 	{0x47, 0x08},
128 	{0x48, 0x00},
129 	{0x49, 0x00},
130 	{0x4a, 0x00},
131 	{0x4b, 0x00},
132 	{0x4c, 0x09},
133 	{0x4d, 0x80},
134 	{0x4e, 0x00},
135 	{0x4f, 0xc5},
136 	{0x50, 0x14},
137 	{0x51, 0x19},
138 	{0x52, 0x00},
139 	{0x53, 0x00},
140 	{0x54, 0x00},
141 	{0x55, 0x00},
142 	{0x56, 0x00},
143 	{0x57, 0x00},
144 	{0x58, 0x00},
145 	{0x59, 0xb0},
146 	{0x5a, 0x00},
147 	{0x5b, 0x00},
148 	{0x5c, 0x00},
149 	{0x5d, 0x00},
150 	{0x5e, 0x00},
151 	{0x5f, 0x00},
152 	{0x60, 0x44},
153 	{0x61, 0x04},
154 	{0x62, 0x00},
155 	{0x63, 0x00},
156 	{0x64, 0x00},
157 	{0x65, 0x00},
158 	{0x66, 0x04},
159 	{0x67, 0xb7},
160 	{0x68, 0x00},
161 	{0x69, 0x00},
162 	{0x6a, 0x00},
163 	{0x6b, 0x00},
164 	{0x6c, 0x00},
165 	{0x6d, 0x03},
166 	{0x6e, 0x01},
167 	{0x6f, 0x00},
168 	{0x70, 0x00},
169 	{0x71, 0x00},
170 	{0x72, 0x00},
171 	{0x73, 0x00},
172 	{0x74, 0x00},
173 	{0x75, 0x00},
174 	{0x76, 0x00},
175 	{0x77, 0x00},
176 	{0x78, 0x00},
177 	{0x79, 0x00},
178 	{0x7a, 0x00},
179 	{0x7b, 0x00},
180 	{0x7c, 0x00},
181 	{0x7d, 0x00},
182 	{0x7e, 0x00},
183 	{0x7f, 0x00},
184 	{0x80, 0x0b},
185 	{0x81, 0x00},
186 	{0x82, 0x3c},
187 	{0x83, 0x00},
188 	{0x84, 0x00},
189 	{0x85, 0x00},
190 	{0x86, 0x00},
191 	{0x87, 0x00},
192 	{0x88, 0x08},
193 	{0x89, 0x00},
194 	{0x8a, 0x08},
195 	{0x8b, 0xa6},
196 	{0x8c, 0x84},
197 	{0x8d, 0x47},
198 	{0x8e, 0xbb},
199 	{0x8f, 0x02},
200 	{0x90, 0x21},
201 	{0x91, 0x0c},
202 	{0x92, 0x04},
203 	{0x93, 0x22},
204 	{0x94, 0x00},
205 	{0x95, 0x00},
206 	{0x96, 0x00},
207 	{0x97, 0xeb},
208 	{0x98, 0x00},
209 	{0x99, 0x00},
210 	{0x9a, 0x00},
211 	{0x9b, 0x00},
212 	{0x9c, 0x00},
213 	{0x9d, 0x00},
214 	{0x9e, 0x00},
215 	{0x9f, 0x00},
216 	{0xa0, 0x00},
217 	{0xa1, 0x00},
218 	{0xa2, 0x00},
219 	{0xa3, 0x00},
220 	{0xa4, 0x00},
221 	{0xa5, 0x00},
222 	{0xa6, 0x10},
223 	{0xa7, 0x04},
224 	{0xa8, 0x10},
225 	{0xa9, 0x00},
226 	{0xaa, 0x8f},
227 	{0xab, 0x00},
228 	{0xac, 0x00},
229 	{0xad, 0x00},
230 	{0xae, 0x00},
231 	{0xaf, 0x80},
232 	{0xb0, 0x38},
233 	{0xb1, 0x00},
234 	{0xb2, 0x00},
235 	{0xb3, 0x00},
236 	{0xb4, 0xee},
237 	{0xb5, 0xff},
238 	{0xb6, 0x10},
239 	{0xb7, 0x00},
240 	{0xb8, 0x00},
241 	{0xb9, 0x00},
242 	{0xba, 0x00},
243 	{0xbb, 0x03},
244 	{0xbc, 0x00},
245 	{0xbd, 0x00},
246 	{0xbe, 0x00},
247 	{0xbf, 0x00},
248 	{0xc0, 0x10},
249 	{0xc1, 0x10},
250 	{0xc2, 0x18},
251 	{0xc3, 0x20},
252 	{0xc4, 0x10},
253 	{0xc5, 0x00},
254 	{0xc6, 0x22},
255 	{0xc7, 0x14},
256 	{0xc8, 0x0f},
257 	{0xc9, 0x08},
258 	{0xca, 0xa4},
259 	{0xcb, 0xa7},
260 	{0xcc, 0x3c},
261 	{0xcd, 0x10},
262 	{0xce, 0x20},
263 	{0xcf, 0x00},
264 	{0xd0, 0x00},
265 	{0xd1, 0x10},
266 	{0xd2, 0x00},
267 	{0xd3, 0x00},
268 	{0xd4, 0x10},
269 	{0xd5, 0x33},
270 	{0xd6, 0x70},
271 	{0xd7, 0x01},
272 	{0xd8, 0x00},
273 	{0xd9, 0x00},
274 	{0xda, 0x00},
275 	{0xdb, 0x00},
276 	{0xdc, 0x00},
277 	{0xdd, 0x00},
278 	{0xde, 0x00},
279 	{0xdf, 0x00},
280 	{0xe0, 0x00},
281 	{0xe1, 0x00},
282 	{0xe2, 0xcc},
283 	{0xe3, 0x04},
284 	{0xe4, 0x08},
285 	{0xe5, 0x10},
286 	{0xe6, 0x00},
287 	{0xe7, 0x0e},
288 	{0xe8, 0x88},
289 	{0xe9, 0xd4},
290 	{0xea, 0x05},
291 	{0xeb, 0xf0},
292 	{0xec, 0x79},
293 	{0xed, 0x0f},
294 	{0xee, 0x04},
295 	{0xef, 0x04},
296 	{0xf0, 0x00},
297 	{0xf1, 0x00},
298 	{0xf2, 0x00},
299 	{0xf3, 0x00},
300 	{0xf4, 0x00},
301 	{0xf5, 0x00},
302 	{0xf6, 0x00},
303 	{0xf7, 0x00},
304 	{0xf8, 0x00},
305 	{0xf9, 0x00},
306 	{0xF0, 0x00},
307 	{0xF1, 0xF8},
308 	{0xF0, 0x80},
309 	{0xF0, 0x00},
310 	{0xF1, 0xF4},
311 	{0xF0, 0x81},
312 	{0xF0, 0x01},
313 	{0xF1, 0xF0},
314 	{0xF0, 0x82},
315 	{0xF0, 0x02},
316 	{0xF1, 0xEC},
317 	{0xF0, 0x83},
318 	{0xF0, 0x03},
319 	{0xF1, 0xE8},
320 	{0xF0, 0x84},
321 	{0xF0, 0x04},
322 	{0xF1, 0xE4},
323 	{0xF0, 0x85},
324 	{0xF0, 0x05},
325 	{0xF1, 0xE0},
326 	{0xF0, 0x86},
327 	{0xF0, 0x06},
328 	{0xF1, 0xDC},
329 	{0xF0, 0x87},
330 	{0xF0, 0x07},
331 	{0xF1, 0xD8},
332 	{0xF0, 0x88},
333 	{0xF0, 0x08},
334 	{0xF1, 0xD4},
335 	{0xF0, 0x89},
336 	{0xF0, 0x09},
337 	{0xF1, 0xD0},
338 	{0xF0, 0x8A},
339 	{0xF0, 0x0A},
340 	{0xF1, 0xCC},
341 	{0xF0, 0x8B},
342 	{0xF0, 0x0B},
343 	{0xF1, 0xC8},
344 	{0xF0, 0x8C},
345 	{0xF0, 0x0C},
346 	{0xF1, 0xC4},
347 	{0xF0, 0x8D},
348 	{0xF0, 0x0D},
349 	{0xF1, 0xC0},
350 	{0xF0, 0x8E},
351 	{0xF0, 0x0E},
352 	{0xF1, 0xBC},
353 	{0xF0, 0x8F},
354 	{0xF0, 0x0F},
355 	{0xF1, 0xB8},
356 	{0xF0, 0x90},
357 	{0xF0, 0x10},
358 	{0xF1, 0xB4},
359 	{0xF0, 0x91},
360 	{0xF0, 0x11},
361 	{0xF1, 0xB0},
362 	{0xF0, 0x92},
363 	{0xF0, 0x12},
364 	{0xF1, 0xAC},
365 	{0xF0, 0x93},
366 	{0xF0, 0x13},
367 	{0xF1, 0xA8},
368 	{0xF0, 0x94},
369 	{0xF0, 0x14},
370 	{0xF1, 0xA4},
371 	{0xF0, 0x95},
372 	{0xF0, 0x15},
373 	{0xF1, 0xA0},
374 	{0xF0, 0x96},
375 	{0xF0, 0x16},
376 	{0xF1, 0x9C},
377 	{0xF0, 0x97},
378 	{0xF0, 0x17},
379 	{0xF1, 0x98},
380 	{0xF0, 0x98},
381 	{0xF0, 0x18},
382 	{0xF1, 0x94},
383 	{0xF0, 0x99},
384 	{0xF0, 0x19},
385 	{0xF1, 0x90},
386 	{0xF0, 0x9A},
387 	{0xF0, 0x1A},
388 	{0xF1, 0x8C},
389 	{0xF0, 0x9B},
390 	{0xF0, 0x1B},
391 	{0xF1, 0x88},
392 	{0xF0, 0x9C},
393 	{0xF0, 0x1C},
394 	{0xF1, 0x84},
395 	{0xF0, 0x9D},
396 	{0xF0, 0x1D},
397 	{0xF1, 0x80},
398 	{0xF0, 0x9E},
399 	{0xF0, 0x1E},
400 	{0xF1, 0x7C},
401 	{0xF0, 0x9F},
402 	{0xF0, 0x1F},
403 	{0xF1, 0x78},
404 	{0xF0, 0xA0},
405 	{0xF0, 0x20},
406 	{0xF1, 0x74},
407 	{0xF0, 0xA1},
408 	{0xF0, 0x21},
409 	{0xF1, 0x70},
410 	{0xF0, 0xA2},
411 	{0xF0, 0x22},
412 	{0xF1, 0x6C},
413 	{0xF0, 0xA3},
414 	{0xF0, 0x23},
415 	{0xF1, 0x68},
416 	{0xF0, 0xA4},
417 	{0xF0, 0x24},
418 	{0xF1, 0x64},
419 	{0xF0, 0xA5},
420 	{0xF0, 0x25},
421 	{0xF1, 0x60},
422 	{0xF0, 0xA6},
423 	{0xF0, 0x26},
424 	{0xF1, 0x5C},
425 	{0xF0, 0xA7},
426 	{0xF0, 0x27},
427 	{0xF1, 0x58},
428 	{0xF0, 0xA8},
429 	{0xF0, 0x28},
430 	{0xF1, 0x54},
431 	{0xF0, 0xA9},
432 	{0xF0, 0x29},
433 	{0xF1, 0x50},
434 	{0xF0, 0xAA},
435 	{0xF0, 0x2A},
436 	{0xF1, 0x4C},
437 	{0xF0, 0xAB},
438 	{0xF0, 0x2B},
439 	{0xF1, 0x48},
440 	{0xF0, 0xAC},
441 	{0xF0, 0x2C},
442 	{0xF1, 0x44},
443 	{0xF0, 0xAD},
444 	{0xF0, 0x2D},
445 	{0xF1, 0x40},
446 	{0xF0, 0xAE},
447 	{0xF0, 0x2E},
448 	{0xF1, 0x3C},
449 	{0xF0, 0xAF},
450 	{0xF0, 0x2F},
451 	{0xF1, 0x38},
452 	{0xF0, 0xB0},
453 	{0xF0, 0x30},
454 	{0xF1, 0x34},
455 	{0xF0, 0xB1},
456 	{0xF0, 0x31},
457 	{0xF1, 0x30},
458 	{0xF0, 0xB2},
459 	{0xF0, 0x32},
460 	{0xF1, 0x2C},
461 	{0xF0, 0xB3},
462 	{0xF0, 0x33},
463 	{0xF1, 0x28},
464 	{0xF0, 0xB4},
465 	{0xF0, 0x34},
466 	{0xF1, 0x24},
467 	{0xF0, 0xB5},
468 	{0xF0, 0x35},
469 	{0xF1, 0x20},
470 	{0xF0, 0xB6},
471 	{0xF0, 0x36},
472 	{0xF1, 0x1C},
473 	{0xF0, 0xB7},
474 	{0xF0, 0x37},
475 	{0xF1, 0x18},
476 	{0xF0, 0xB8},
477 	{0xF0, 0x38},
478 	{0xF1, 0x14},
479 	{0xF0, 0xB9},
480 	{0xF0, 0x39},
481 	{0xF1, 0x10},
482 	{0xF0, 0xBA},
483 	{0xF0, 0x3A},
484 	{0xF1, 0x0C},
485 	{0xF0, 0xBB},
486 	{0xF0, 0x3B},
487 	{0xF1, 0x08},
488 	{0xF0, 0x00},
489 	{0xF0, 0x3C},
490 	{0xF1, 0x04},
491 	{0xF0, 0xBD},
492 	{0xF0, 0x3D},
493 	{0xF1, 0x00},
494 	{0xF0, 0xBE},
495 	{0xF0, 0x3E},
496 	{0xF1, 0x00},
497 	{0xF0, 0xBF},
498 	{0xF0, 0x3F},
499 	{0xF1, 0x00},
500 	{0xF0, 0xC0},
501 	{0xF0, 0x00},
502 };
503 
504 #define CB_VT3253B0_INIT_FOR_RFMD 256
505 static const unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
506 	{0x00, 0x31},
507 	{0x01, 0x00},
508 	{0x02, 0x00},
509 	{0x03, 0x00},
510 	{0x04, 0x00},
511 	{0x05, 0x81},
512 	{0x06, 0x00},
513 	{0x07, 0x00},
514 	{0x08, 0x38},
515 	{0x09, 0x45},
516 	{0x0a, 0x2a},
517 	{0x0b, 0x76},
518 	{0x0c, 0x00},
519 	{0x0d, 0x00},
520 	{0x0e, 0x80},
521 	{0x0f, 0x00},
522 	{0x10, 0x00},
523 	{0x11, 0x00},
524 	{0x12, 0x00},
525 	{0x13, 0x00},
526 	{0x14, 0x00},
527 	{0x15, 0x00},
528 	{0x16, 0x00},
529 	{0x17, 0x00},
530 	{0x18, 0x00},
531 	{0x19, 0x00},
532 	{0x1a, 0x00},
533 	{0x1b, 0x8e},
534 	{0x1c, 0x06},
535 	{0x1d, 0x00},
536 	{0x1e, 0x00},
537 	{0x1f, 0x00},
538 	{0x20, 0x00},
539 	{0x21, 0x00},
540 	{0x22, 0x00},
541 	{0x23, 0x00},
542 	{0x24, 0x00},
543 	{0x25, 0x4a},
544 	{0x26, 0x00},
545 	{0x27, 0x00},
546 	{0x28, 0x00},
547 	{0x29, 0x00},
548 	{0x2a, 0x00},
549 	{0x2b, 0x00},
550 	{0x2c, 0x00},
551 	{0x2d, 0x34},
552 	{0x2e, 0x18},
553 	{0x2f, 0x0c},
554 	{0x30, 0x26},
555 	{0x31, 0x5b},
556 	{0x32, 0x00},
557 	{0x33, 0x00},
558 	{0x34, 0x00},
559 	{0x35, 0x00},
560 	{0x36, 0xaa},
561 	{0x37, 0xaa},
562 	{0x38, 0xff},
563 	{0x39, 0xff},
564 	{0x3a, 0xf8},
565 	{0x3b, 0x00},
566 	{0x3c, 0x00},
567 	{0x3d, 0x09},
568 	{0x3e, 0x0d},
569 	{0x3f, 0x04},
570 	{0x40, 0x00},
571 	{0x41, 0x08},
572 	{0x42, 0x00},
573 	{0x43, 0x08},
574 	{0x44, 0x08},
575 	{0x45, 0x14},
576 	{0x46, 0x05},
577 	{0x47, 0x08},
578 	{0x48, 0x00},
579 	{0x49, 0x00},
580 	{0x4a, 0x00},
581 	{0x4b, 0x00},
582 	{0x4c, 0x09},
583 	{0x4d, 0x80},
584 	{0x4e, 0x00},
585 	{0x4f, 0xc5},
586 	{0x50, 0x14},
587 	{0x51, 0x19},
588 	{0x52, 0x00},
589 	{0x53, 0x00},
590 	{0x54, 0x00},
591 	{0x55, 0x00},
592 	{0x56, 0x00},
593 	{0x57, 0x00},
594 	{0x58, 0x00},
595 	{0x59, 0xb0},
596 	{0x5a, 0x00},
597 	{0x5b, 0x00},
598 	{0x5c, 0x00},
599 	{0x5d, 0x00},
600 	{0x5e, 0x00},
601 	{0x5f, 0x00},
602 	{0x60, 0x39},
603 	{0x61, 0x83},
604 	{0x62, 0x00},
605 	{0x63, 0x00},
606 	{0x64, 0x00},
607 	{0x65, 0x00},
608 	{0x66, 0xc0},
609 	{0x67, 0x49},
610 	{0x68, 0x00},
611 	{0x69, 0x00},
612 	{0x6a, 0x00},
613 	{0x6b, 0x00},
614 	{0x6c, 0x00},
615 	{0x6d, 0x03},
616 	{0x6e, 0x01},
617 	{0x6f, 0x00},
618 	{0x70, 0x00},
619 	{0x71, 0x00},
620 	{0x72, 0x00},
621 	{0x73, 0x00},
622 	{0x74, 0x00},
623 	{0x75, 0x00},
624 	{0x76, 0x00},
625 	{0x77, 0x00},
626 	{0x78, 0x00},
627 	{0x79, 0x00},
628 	{0x7a, 0x00},
629 	{0x7b, 0x00},
630 	{0x7c, 0x00},
631 	{0x7d, 0x00},
632 	{0x7e, 0x00},
633 	{0x7f, 0x00},
634 	{0x80, 0x89},
635 	{0x81, 0x00},
636 	{0x82, 0x0e},
637 	{0x83, 0x00},
638 	{0x84, 0x00},
639 	{0x85, 0x00},
640 	{0x86, 0x00},
641 	{0x87, 0x00},
642 	{0x88, 0x08},
643 	{0x89, 0x00},
644 	{0x8a, 0x0e},
645 	{0x8b, 0xa7},
646 	{0x8c, 0x88},
647 	{0x8d, 0x47},
648 	{0x8e, 0xaa},
649 	{0x8f, 0x02},
650 	{0x90, 0x23},
651 	{0x91, 0x0c},
652 	{0x92, 0x06},
653 	{0x93, 0x08},
654 	{0x94, 0x00},
655 	{0x95, 0x00},
656 	{0x96, 0x00},
657 	{0x97, 0xeb},
658 	{0x98, 0x00},
659 	{0x99, 0x00},
660 	{0x9a, 0x00},
661 	{0x9b, 0x00},
662 	{0x9c, 0x00},
663 	{0x9d, 0x00},
664 	{0x9e, 0x00},
665 	{0x9f, 0x00},
666 	{0xa0, 0x00},
667 	{0xa1, 0x00},
668 	{0xa2, 0x00},
669 	{0xa3, 0xcd},
670 	{0xa4, 0x07},
671 	{0xa5, 0x33},
672 	{0xa6, 0x18},
673 	{0xa7, 0x00},
674 	{0xa8, 0x18},
675 	{0xa9, 0x00},
676 	{0xaa, 0x28},
677 	{0xab, 0x00},
678 	{0xac, 0x00},
679 	{0xad, 0x00},
680 	{0xae, 0x00},
681 	{0xaf, 0x18},
682 	{0xb0, 0x38},
683 	{0xb1, 0x30},
684 	{0xb2, 0x00},
685 	{0xb3, 0x00},
686 	{0xb4, 0x00},
687 	{0xb5, 0x00},
688 	{0xb6, 0x84},
689 	{0xb7, 0xfd},
690 	{0xb8, 0x00},
691 	{0xb9, 0x00},
692 	{0xba, 0x00},
693 	{0xbb, 0x03},
694 	{0xbc, 0x00},
695 	{0xbd, 0x00},
696 	{0xbe, 0x00},
697 	{0xbf, 0x00},
698 	{0xc0, 0x10},
699 	{0xc1, 0x20},
700 	{0xc2, 0x18},
701 	{0xc3, 0x20},
702 	{0xc4, 0x10},
703 	{0xc5, 0x2c},
704 	{0xc6, 0x1e},
705 	{0xc7, 0x10},
706 	{0xc8, 0x12},
707 	{0xc9, 0x01},
708 	{0xca, 0x6f},
709 	{0xcb, 0xa7},
710 	{0xcc, 0x3c},
711 	{0xcd, 0x10},
712 	{0xce, 0x00},
713 	{0xcf, 0x22},
714 	{0xd0, 0x00},
715 	{0xd1, 0x10},
716 	{0xd2, 0x00},
717 	{0xd3, 0x00},
718 	{0xd4, 0x10},
719 	{0xd5, 0x33},
720 	{0xd6, 0x80},
721 	{0xd7, 0x21},
722 	{0xd8, 0x00},
723 	{0xd9, 0x00},
724 	{0xda, 0x00},
725 	{0xdb, 0x00},
726 	{0xdc, 0x00},
727 	{0xdd, 0x00},
728 	{0xde, 0x00},
729 	{0xdf, 0x00},
730 	{0xe0, 0x00},
731 	{0xe1, 0xB3},
732 	{0xe2, 0x00},
733 	{0xe3, 0x00},
734 	{0xe4, 0x00},
735 	{0xe5, 0x10},
736 	{0xe6, 0x00},
737 	{0xe7, 0x18},
738 	{0xe8, 0x08},
739 	{0xe9, 0xd4},
740 	{0xea, 0x00},
741 	{0xeb, 0xff},
742 	{0xec, 0x79},
743 	{0xed, 0x10},
744 	{0xee, 0x30},
745 	{0xef, 0x02},
746 	{0xf0, 0x00},
747 	{0xf1, 0x09},
748 	{0xf2, 0x00},
749 	{0xf3, 0x00},
750 	{0xf4, 0x00},
751 	{0xf5, 0x00},
752 	{0xf6, 0x00},
753 	{0xf7, 0x00},
754 	{0xf8, 0x00},
755 	{0xf9, 0x00},
756 	{0xfa, 0x00},
757 	{0xfb, 0x00},
758 	{0xfc, 0x00},
759 	{0xfd, 0x00},
760 	{0xfe, 0x00},
761 	{0xff, 0x00},
762 };
763 
764 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
765 /* For RFMD2959 */
766 static
767 unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
768 	{0xF0, 0x00},
769 	{0xF1, 0x3E},
770 	{0xF0, 0x80},
771 	{0xF0, 0x00},
772 	{0xF1, 0x3E},
773 	{0xF0, 0x81},
774 	{0xF0, 0x01},
775 	{0xF1, 0x3E},
776 	{0xF0, 0x82},
777 	{0xF0, 0x02},
778 	{0xF1, 0x3E},
779 	{0xF0, 0x83},
780 	{0xF0, 0x03},
781 	{0xF1, 0x3B},
782 	{0xF0, 0x84},
783 	{0xF0, 0x04},
784 	{0xF1, 0x39},
785 	{0xF0, 0x85},
786 	{0xF0, 0x05},
787 	{0xF1, 0x38},
788 	{0xF0, 0x86},
789 	{0xF0, 0x06},
790 	{0xF1, 0x37},
791 	{0xF0, 0x87},
792 	{0xF0, 0x07},
793 	{0xF1, 0x36},
794 	{0xF0, 0x88},
795 	{0xF0, 0x08},
796 	{0xF1, 0x35},
797 	{0xF0, 0x89},
798 	{0xF0, 0x09},
799 	{0xF1, 0x35},
800 	{0xF0, 0x8A},
801 	{0xF0, 0x0A},
802 	{0xF1, 0x34},
803 	{0xF0, 0x8B},
804 	{0xF0, 0x0B},
805 	{0xF1, 0x34},
806 	{0xF0, 0x8C},
807 	{0xF0, 0x0C},
808 	{0xF1, 0x33},
809 	{0xF0, 0x8D},
810 	{0xF0, 0x0D},
811 	{0xF1, 0x32},
812 	{0xF0, 0x8E},
813 	{0xF0, 0x0E},
814 	{0xF1, 0x31},
815 	{0xF0, 0x8F},
816 	{0xF0, 0x0F},
817 	{0xF1, 0x30},
818 	{0xF0, 0x90},
819 	{0xF0, 0x10},
820 	{0xF1, 0x2F},
821 	{0xF0, 0x91},
822 	{0xF0, 0x11},
823 	{0xF1, 0x2F},
824 	{0xF0, 0x92},
825 	{0xF0, 0x12},
826 	{0xF1, 0x2E},
827 	{0xF0, 0x93},
828 	{0xF0, 0x13},
829 	{0xF1, 0x2D},
830 	{0xF0, 0x94},
831 	{0xF0, 0x14},
832 	{0xF1, 0x2C},
833 	{0xF0, 0x95},
834 	{0xF0, 0x15},
835 	{0xF1, 0x2B},
836 	{0xF0, 0x96},
837 	{0xF0, 0x16},
838 	{0xF1, 0x2B},
839 	{0xF0, 0x97},
840 	{0xF0, 0x17},
841 	{0xF1, 0x2A},
842 	{0xF0, 0x98},
843 	{0xF0, 0x18},
844 	{0xF1, 0x29},
845 	{0xF0, 0x99},
846 	{0xF0, 0x19},
847 	{0xF1, 0x28},
848 	{0xF0, 0x9A},
849 	{0xF0, 0x1A},
850 	{0xF1, 0x27},
851 	{0xF0, 0x9B},
852 	{0xF0, 0x1B},
853 	{0xF1, 0x26},
854 	{0xF0, 0x9C},
855 	{0xF0, 0x1C},
856 	{0xF1, 0x25},
857 	{0xF0, 0x9D},
858 	{0xF0, 0x1D},
859 	{0xF1, 0x24},
860 	{0xF0, 0x9E},
861 	{0xF0, 0x1E},
862 	{0xF1, 0x24},
863 	{0xF0, 0x9F},
864 	{0xF0, 0x1F},
865 	{0xF1, 0x23},
866 	{0xF0, 0xA0},
867 	{0xF0, 0x20},
868 	{0xF1, 0x22},
869 	{0xF0, 0xA1},
870 	{0xF0, 0x21},
871 	{0xF1, 0x21},
872 	{0xF0, 0xA2},
873 	{0xF0, 0x22},
874 	{0xF1, 0x20},
875 	{0xF0, 0xA3},
876 	{0xF0, 0x23},
877 	{0xF1, 0x20},
878 	{0xF0, 0xA4},
879 	{0xF0, 0x24},
880 	{0xF1, 0x1F},
881 	{0xF0, 0xA5},
882 	{0xF0, 0x25},
883 	{0xF1, 0x1E},
884 	{0xF0, 0xA6},
885 	{0xF0, 0x26},
886 	{0xF1, 0x1D},
887 	{0xF0, 0xA7},
888 	{0xF0, 0x27},
889 	{0xF1, 0x1C},
890 	{0xF0, 0xA8},
891 	{0xF0, 0x28},
892 	{0xF1, 0x1B},
893 	{0xF0, 0xA9},
894 	{0xF0, 0x29},
895 	{0xF1, 0x1B},
896 	{0xF0, 0xAA},
897 	{0xF0, 0x2A},
898 	{0xF1, 0x1A},
899 	{0xF0, 0xAB},
900 	{0xF0, 0x2B},
901 	{0xF1, 0x1A},
902 	{0xF0, 0xAC},
903 	{0xF0, 0x2C},
904 	{0xF1, 0x19},
905 	{0xF0, 0xAD},
906 	{0xF0, 0x2D},
907 	{0xF1, 0x18},
908 	{0xF0, 0xAE},
909 	{0xF0, 0x2E},
910 	{0xF1, 0x17},
911 	{0xF0, 0xAF},
912 	{0xF0, 0x2F},
913 	{0xF1, 0x16},
914 	{0xF0, 0xB0},
915 	{0xF0, 0x30},
916 	{0xF1, 0x15},
917 	{0xF0, 0xB1},
918 	{0xF0, 0x31},
919 	{0xF1, 0x15},
920 	{0xF0, 0xB2},
921 	{0xF0, 0x32},
922 	{0xF1, 0x15},
923 	{0xF0, 0xB3},
924 	{0xF0, 0x33},
925 	{0xF1, 0x14},
926 	{0xF0, 0xB4},
927 	{0xF0, 0x34},
928 	{0xF1, 0x13},
929 	{0xF0, 0xB5},
930 	{0xF0, 0x35},
931 	{0xF1, 0x12},
932 	{0xF0, 0xB6},
933 	{0xF0, 0x36},
934 	{0xF1, 0x11},
935 	{0xF0, 0xB7},
936 	{0xF0, 0x37},
937 	{0xF1, 0x10},
938 	{0xF0, 0xB8},
939 	{0xF0, 0x38},
940 	{0xF1, 0x0F},
941 	{0xF0, 0xB9},
942 	{0xF0, 0x39},
943 	{0xF1, 0x0E},
944 	{0xF0, 0xBA},
945 	{0xF0, 0x3A},
946 	{0xF1, 0x0D},
947 	{0xF0, 0xBB},
948 	{0xF0, 0x3B},
949 	{0xF1, 0x0C},
950 	{0xF0, 0xBC},
951 	{0xF0, 0x3C},
952 	{0xF1, 0x0B},
953 	{0xF0, 0xBD},
954 	{0xF0, 0x3D},
955 	{0xF1, 0x0B},
956 	{0xF0, 0xBE},
957 	{0xF0, 0x3E},
958 	{0xF1, 0x0A},
959 	{0xF0, 0xBF},
960 	{0xF0, 0x3F},
961 	{0xF1, 0x09},
962 	{0xF0, 0x00},
963 };
964 
965 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
966 /* For AIROHA */
967 static
968 unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
969 	{0x00, 0x31},
970 	{0x01, 0x00},
971 	{0x02, 0x00},
972 	{0x03, 0x00},
973 	{0x04, 0x00},
974 	{0x05, 0x80},
975 	{0x06, 0x00},
976 	{0x07, 0x00},
977 	{0x08, 0x70},
978 	{0x09, 0x41},
979 	{0x0a, 0x2A},
980 	{0x0b, 0x76},
981 	{0x0c, 0x00},
982 	{0x0d, 0x00},
983 	{0x0e, 0x80},
984 	{0x0f, 0x00},
985 	{0x10, 0x00},
986 	{0x11, 0x00},
987 	{0x12, 0x00},
988 	{0x13, 0x00},
989 	{0x14, 0x00},
990 	{0x15, 0x00},
991 	{0x16, 0x00},
992 	{0x17, 0x00},
993 	{0x18, 0x00},
994 	{0x19, 0x00},
995 	{0x1a, 0x00},
996 	{0x1b, 0x8f},
997 	{0x1c, 0x09},
998 	{0x1d, 0x00},
999 	{0x1e, 0x00},
1000 	{0x1f, 0x00},
1001 	{0x20, 0x00},
1002 	{0x21, 0x00},
1003 	{0x22, 0x00},
1004 	{0x23, 0x00},
1005 	{0x24, 0x00},
1006 	{0x25, 0x4a},
1007 	{0x26, 0x00},
1008 	{0x27, 0x00},
1009 	{0x28, 0x00},
1010 	{0x29, 0x00},
1011 	{0x2a, 0x00},
1012 	{0x2b, 0x00},
1013 	{0x2c, 0x00},
1014 	{0x2d, 0x4a},
1015 	{0x2e, 0x00},
1016 	{0x2f, 0x0a},
1017 	{0x30, 0x26},
1018 	{0x31, 0x5b},
1019 	{0x32, 0x00},
1020 	{0x33, 0x00},
1021 	{0x34, 0x00},
1022 	{0x35, 0x00},
1023 	{0x36, 0xaa},
1024 	{0x37, 0xaa},
1025 	{0x38, 0xff},
1026 	{0x39, 0xff},
1027 	{0x3a, 0x79},
1028 	{0x3b, 0x00},
1029 	{0x3c, 0x00},
1030 	{0x3d, 0x0b},
1031 	{0x3e, 0x48},
1032 	{0x3f, 0x04},
1033 	{0x40, 0x00},
1034 	{0x41, 0x08},
1035 	{0x42, 0x00},
1036 	{0x43, 0x08},
1037 	{0x44, 0x08},
1038 	{0x45, 0x14},
1039 	{0x46, 0x05},
1040 	{0x47, 0x09},
1041 	{0x48, 0x00},
1042 	{0x49, 0x00},
1043 	{0x4a, 0x00},
1044 	{0x4b, 0x00},
1045 	{0x4c, 0x09},
1046 	{0x4d, 0x73},
1047 	{0x4e, 0x00},
1048 	{0x4f, 0xc5},
1049 	{0x50, 0x15},
1050 	{0x51, 0x19},
1051 	{0x52, 0x00},
1052 	{0x53, 0x00},
1053 	{0x54, 0x00},
1054 	{0x55, 0x00},
1055 	{0x56, 0x00},
1056 	{0x57, 0x00},
1057 	{0x58, 0x00},
1058 	{0x59, 0xb0},
1059 	{0x5a, 0x00},
1060 	{0x5b, 0x00},
1061 	{0x5c, 0x00},
1062 	{0x5d, 0x00},
1063 	{0x5e, 0x00},
1064 	{0x5f, 0x00},
1065 	{0x60, 0xe4},
1066 	{0x61, 0x80},
1067 	{0x62, 0x00},
1068 	{0x63, 0x00},
1069 	{0x64, 0x00},
1070 	{0x65, 0x00},
1071 	{0x66, 0x98},
1072 	{0x67, 0x0a},
1073 	{0x68, 0x00},
1074 	{0x69, 0x00},
1075 	{0x6a, 0x00},
1076 	{0x6b, 0x00},
1077 	{0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1078 	{0x6d, 0x03},
1079 	{0x6e, 0x01},
1080 	{0x6f, 0x00},
1081 	{0x70, 0x00},
1082 	{0x71, 0x00},
1083 	{0x72, 0x00},
1084 	{0x73, 0x00},
1085 	{0x74, 0x00},
1086 	{0x75, 0x00},
1087 	{0x76, 0x00},
1088 	{0x77, 0x00},
1089 	{0x78, 0x00},
1090 	{0x79, 0x00},
1091 	{0x7a, 0x00},
1092 	{0x7b, 0x00},
1093 	{0x7c, 0x00},
1094 	{0x7d, 0x00},
1095 	{0x7e, 0x00},
1096 	{0x7f, 0x00},
1097 	{0x80, 0x8c},
1098 	{0x81, 0x01},
1099 	{0x82, 0x09},
1100 	{0x83, 0x00},
1101 	{0x84, 0x00},
1102 	{0x85, 0x00},
1103 	{0x86, 0x00},
1104 	{0x87, 0x00},
1105 	{0x88, 0x08},
1106 	{0x89, 0x00},
1107 	{0x8a, 0x0f},
1108 	{0x8b, 0xb7},
1109 	{0x8c, 0x88},
1110 	{0x8d, 0x47},
1111 	{0x8e, 0xaa},
1112 	{0x8f, 0x02},
1113 	{0x90, 0x22},
1114 	{0x91, 0x00},
1115 	{0x92, 0x00},
1116 	{0x93, 0x00},
1117 	{0x94, 0x00},
1118 	{0x95, 0x00},
1119 	{0x96, 0x00},
1120 	{0x97, 0xeb},
1121 	{0x98, 0x00},
1122 	{0x99, 0x00},
1123 	{0x9a, 0x00},
1124 	{0x9b, 0x00},
1125 	{0x9c, 0x00},
1126 	{0x9d, 0x00},
1127 	{0x9e, 0x00},
1128 	{0x9f, 0x01},
1129 	{0xa0, 0x00},
1130 	{0xa1, 0x00},
1131 	{0xa2, 0x00},
1132 	{0xa3, 0x00},
1133 	{0xa4, 0x00},
1134 	{0xa5, 0x00},
1135 	{0xa6, 0x10},
1136 	{0xa7, 0x00},
1137 	{0xa8, 0x18},
1138 	{0xa9, 0x00},
1139 	{0xaa, 0x00},
1140 	{0xab, 0x00},
1141 	{0xac, 0x00},
1142 	{0xad, 0x00},
1143 	{0xae, 0x00},
1144 	{0xaf, 0x18},
1145 	{0xb0, 0x38},
1146 	{0xb1, 0x30},
1147 	{0xb2, 0x00},
1148 	{0xb3, 0x00},
1149 	{0xb4, 0xff},
1150 	{0xb5, 0x0f},
1151 	{0xb6, 0xe4},
1152 	{0xb7, 0xe2},
1153 	{0xb8, 0x00},
1154 	{0xb9, 0x00},
1155 	{0xba, 0x00},
1156 	{0xbb, 0x03},
1157 	{0xbc, 0x01},
1158 	{0xbd, 0x00},
1159 	{0xbe, 0x00},
1160 	{0xbf, 0x00},
1161 	{0xc0, 0x18},
1162 	{0xc1, 0x20},
1163 	{0xc2, 0x07},
1164 	{0xc3, 0x18},
1165 	{0xc4, 0xff},
1166 	{0xc5, 0x2c},
1167 	{0xc6, 0x0c},
1168 	{0xc7, 0x0a},
1169 	{0xc8, 0x0e},
1170 	{0xc9, 0x01},
1171 	{0xca, 0x68},
1172 	{0xcb, 0xa7},
1173 	{0xcc, 0x3c},
1174 	{0xcd, 0x10},
1175 	{0xce, 0x00},
1176 	{0xcf, 0x25},
1177 	{0xd0, 0x40},
1178 	{0xd1, 0x12},
1179 	{0xd2, 0x00},
1180 	{0xd3, 0x00},
1181 	{0xd4, 0x10},
1182 	{0xd5, 0x28},
1183 	{0xd6, 0x80},
1184 	{0xd7, 0x2A},
1185 	{0xd8, 0x00},
1186 	{0xd9, 0x00},
1187 	{0xda, 0x00},
1188 	{0xdb, 0x00},
1189 	{0xdc, 0x00},
1190 	{0xdd, 0x00},
1191 	{0xde, 0x00},
1192 	{0xdf, 0x00},
1193 	{0xe0, 0x00},
1194 	{0xe1, 0xB3},
1195 	{0xe2, 0x00},
1196 	{0xe3, 0x00},
1197 	{0xe4, 0x00},
1198 	{0xe5, 0x10},
1199 	{0xe6, 0x00},
1200 	{0xe7, 0x1C},
1201 	{0xe8, 0x00},
1202 	{0xe9, 0xf4},
1203 	{0xea, 0x00},
1204 	{0xeb, 0xff},
1205 	{0xec, 0x79},
1206 	{0xed, 0x20},
1207 	{0xee, 0x30},
1208 	{0xef, 0x01},
1209 	{0xf0, 0x00},
1210 	{0xf1, 0x3e},
1211 	{0xf2, 0x00},
1212 	{0xf3, 0x00},
1213 	{0xf4, 0x00},
1214 	{0xf5, 0x00},
1215 	{0xf6, 0x00},
1216 	{0xf7, 0x00},
1217 	{0xf8, 0x00},
1218 	{0xf9, 0x00},
1219 	{0xfa, 0x00},
1220 	{0xfb, 0x00},
1221 	{0xfc, 0x00},
1222 	{0xfd, 0x00},
1223 	{0xfe, 0x00},
1224 	{0xff, 0x00},
1225 };
1226 
1227 #define CB_VT3253B0_INIT_FOR_UW2451 256
1228 /* For UW2451 */
1229 static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
1230 	{0x00, 0x31},
1231 	{0x01, 0x00},
1232 	{0x02, 0x00},
1233 	{0x03, 0x00},
1234 	{0x04, 0x00},
1235 	{0x05, 0x81},
1236 	{0x06, 0x00},
1237 	{0x07, 0x00},
1238 	{0x08, 0x38},
1239 	{0x09, 0x45},
1240 	{0x0a, 0x28},
1241 	{0x0b, 0x76},
1242 	{0x0c, 0x00},
1243 	{0x0d, 0x00},
1244 	{0x0e, 0x80},
1245 	{0x0f, 0x00},
1246 	{0x10, 0x00},
1247 	{0x11, 0x00},
1248 	{0x12, 0x00},
1249 	{0x13, 0x00},
1250 	{0x14, 0x00},
1251 	{0x15, 0x00},
1252 	{0x16, 0x00},
1253 	{0x17, 0x00},
1254 	{0x18, 0x00},
1255 	{0x19, 0x00},
1256 	{0x1a, 0x00},
1257 	{0x1b, 0x8f},
1258 	{0x1c, 0x0f},
1259 	{0x1d, 0x00},
1260 	{0x1e, 0x00},
1261 	{0x1f, 0x00},
1262 	{0x20, 0x00},
1263 	{0x21, 0x00},
1264 	{0x22, 0x00},
1265 	{0x23, 0x00},
1266 	{0x24, 0x00},
1267 	{0x25, 0x4a},
1268 	{0x26, 0x00},
1269 	{0x27, 0x00},
1270 	{0x28, 0x00},
1271 	{0x29, 0x00},
1272 	{0x2a, 0x00},
1273 	{0x2b, 0x00},
1274 	{0x2c, 0x00},
1275 	{0x2d, 0x18},
1276 	{0x2e, 0x00},
1277 	{0x2f, 0x0a},
1278 	{0x30, 0x26},
1279 	{0x31, 0x5b},
1280 	{0x32, 0x00},
1281 	{0x33, 0x00},
1282 	{0x34, 0x00},
1283 	{0x35, 0x00},
1284 	{0x36, 0xaa},
1285 	{0x37, 0xaa},
1286 	{0x38, 0xff},
1287 	{0x39, 0xff},
1288 	{0x3a, 0x00},
1289 	{0x3b, 0x00},
1290 	{0x3c, 0x00},
1291 	{0x3d, 0x03},
1292 	{0x3e, 0x1d},
1293 	{0x3f, 0x04},
1294 	{0x40, 0x00},
1295 	{0x41, 0x08},
1296 	{0x42, 0x00},
1297 	{0x43, 0x08},
1298 	{0x44, 0x08},
1299 	{0x45, 0x14},
1300 	{0x46, 0x05},
1301 	{0x47, 0x09},
1302 	{0x48, 0x00},
1303 	{0x49, 0x00},
1304 	{0x4a, 0x00},
1305 	{0x4b, 0x00},
1306 	{0x4c, 0x09},
1307 	{0x4d, 0x90},
1308 	{0x4e, 0x00},
1309 	{0x4f, 0xc5},
1310 	{0x50, 0x15},
1311 	{0x51, 0x19},
1312 	{0x52, 0x00},
1313 	{0x53, 0x00},
1314 	{0x54, 0x00},
1315 	{0x55, 0x00},
1316 	{0x56, 0x00},
1317 	{0x57, 0x00},
1318 	{0x58, 0x00},
1319 	{0x59, 0xb0},
1320 	{0x5a, 0x00},
1321 	{0x5b, 0x00},
1322 	{0x5c, 0x00},
1323 	{0x5d, 0x00},
1324 	{0x5e, 0x00},
1325 	{0x5f, 0x00},
1326 	{0x60, 0xb3},
1327 	{0x61, 0x81},
1328 	{0x62, 0x00},
1329 	{0x63, 0x00},
1330 	{0x64, 0x00},
1331 	{0x65, 0x00},
1332 	{0x66, 0x57},
1333 	{0x67, 0x6c},
1334 	{0x68, 0x00},
1335 	{0x69, 0x00},
1336 	{0x6a, 0x00},
1337 	{0x6b, 0x00},
1338 	{0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1339 	{0x6d, 0x03},
1340 	{0x6e, 0x01},
1341 	{0x6f, 0x00},
1342 	{0x70, 0x00},
1343 	{0x71, 0x00},
1344 	{0x72, 0x00},
1345 	{0x73, 0x00},
1346 	{0x74, 0x00},
1347 	{0x75, 0x00},
1348 	{0x76, 0x00},
1349 	{0x77, 0x00},
1350 	{0x78, 0x00},
1351 	{0x79, 0x00},
1352 	{0x7a, 0x00},
1353 	{0x7b, 0x00},
1354 	{0x7c, 0x00},
1355 	{0x7d, 0x00},
1356 	{0x7e, 0x00},
1357 	{0x7f, 0x00},
1358 	{0x80, 0x8c},
1359 	{0x81, 0x00},
1360 	{0x82, 0x0e},
1361 	{0x83, 0x00},
1362 	{0x84, 0x00},
1363 	{0x85, 0x00},
1364 	{0x86, 0x00},
1365 	{0x87, 0x00},
1366 	{0x88, 0x08},
1367 	{0x89, 0x00},
1368 	{0x8a, 0x0e},
1369 	{0x8b, 0xa7},
1370 	{0x8c, 0x88},
1371 	{0x8d, 0x47},
1372 	{0x8e, 0xaa},
1373 	{0x8f, 0x02},
1374 	{0x90, 0x00},
1375 	{0x91, 0x00},
1376 	{0x92, 0x00},
1377 	{0x93, 0x00},
1378 	{0x94, 0x00},
1379 	{0x95, 0x00},
1380 	{0x96, 0x00},
1381 	{0x97, 0xe3},
1382 	{0x98, 0x00},
1383 	{0x99, 0x00},
1384 	{0x9a, 0x00},
1385 	{0x9b, 0x00},
1386 	{0x9c, 0x00},
1387 	{0x9d, 0x00},
1388 	{0x9e, 0x00},
1389 	{0x9f, 0x00},
1390 	{0xa0, 0x00},
1391 	{0xa1, 0x00},
1392 	{0xa2, 0x00},
1393 	{0xa3, 0x00},
1394 	{0xa4, 0x00},
1395 	{0xa5, 0x00},
1396 	{0xa6, 0x10},
1397 	{0xa7, 0x00},
1398 	{0xa8, 0x18},
1399 	{0xa9, 0x00},
1400 	{0xaa, 0x00},
1401 	{0xab, 0x00},
1402 	{0xac, 0x00},
1403 	{0xad, 0x00},
1404 	{0xae, 0x00},
1405 	{0xaf, 0x18},
1406 	{0xb0, 0x18},
1407 	{0xb1, 0x30},
1408 	{0xb2, 0x00},
1409 	{0xb3, 0x00},
1410 	{0xb4, 0x00},
1411 	{0xb5, 0x00},
1412 	{0xb6, 0x00},
1413 	{0xb7, 0x00},
1414 	{0xb8, 0x00},
1415 	{0xb9, 0x00},
1416 	{0xba, 0x00},
1417 	{0xbb, 0x03},
1418 	{0xbc, 0x01},
1419 	{0xbd, 0x00},
1420 	{0xbe, 0x00},
1421 	{0xbf, 0x00},
1422 	{0xc0, 0x10},
1423 	{0xc1, 0x20},
1424 	{0xc2, 0x00},
1425 	{0xc3, 0x20},
1426 	{0xc4, 0x00},
1427 	{0xc5, 0x2c},
1428 	{0xc6, 0x1c},
1429 	{0xc7, 0x10},
1430 	{0xc8, 0x10},
1431 	{0xc9, 0x01},
1432 	{0xca, 0x68},
1433 	{0xcb, 0xa7},
1434 	{0xcc, 0x3c},
1435 	{0xcd, 0x09},
1436 	{0xce, 0x00},
1437 	{0xcf, 0x20},
1438 	{0xd0, 0x40},
1439 	{0xd1, 0x10},
1440 	{0xd2, 0x00},
1441 	{0xd3, 0x00},
1442 	{0xd4, 0x20},
1443 	{0xd5, 0x28},
1444 	{0xd6, 0xa0},
1445 	{0xd7, 0x2a},
1446 	{0xd8, 0x00},
1447 	{0xd9, 0x00},
1448 	{0xda, 0x00},
1449 	{0xdb, 0x00},
1450 	{0xdc, 0x00},
1451 	{0xdd, 0x00},
1452 	{0xde, 0x00},
1453 	{0xdf, 0x00},
1454 	{0xe0, 0x00},
1455 	{0xe1, 0xd3},
1456 	{0xe2, 0xc0},
1457 	{0xe3, 0x00},
1458 	{0xe4, 0x00},
1459 	{0xe5, 0x10},
1460 	{0xe6, 0x00},
1461 	{0xe7, 0x12},
1462 	{0xe8, 0x12},
1463 	{0xe9, 0x34},
1464 	{0xea, 0x00},
1465 	{0xeb, 0xff},
1466 	{0xec, 0x79},
1467 	{0xed, 0x20},
1468 	{0xee, 0x30},
1469 	{0xef, 0x01},
1470 	{0xf0, 0x00},
1471 	{0xf1, 0x3e},
1472 	{0xf2, 0x00},
1473 	{0xf3, 0x00},
1474 	{0xf4, 0x00},
1475 	{0xf5, 0x00},
1476 	{0xf6, 0x00},
1477 	{0xf7, 0x00},
1478 	{0xf8, 0x00},
1479 	{0xf9, 0x00},
1480 	{0xfa, 0x00},
1481 	{0xfb, 0x00},
1482 	{0xfc, 0x00},
1483 	{0xfd, 0x00},
1484 	{0xfe, 0x00},
1485 	{0xff, 0x00},
1486 };
1487 
1488 #define CB_VT3253B0_AGC 193
1489 /* For AIROHA */
1490 static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
1491 	{0xF0, 0x00},
1492 	{0xF1, 0x00},
1493 	{0xF0, 0x80},
1494 	{0xF0, 0x01},
1495 	{0xF1, 0x00},
1496 	{0xF0, 0x81},
1497 	{0xF0, 0x02},
1498 	{0xF1, 0x02},
1499 	{0xF0, 0x82},
1500 	{0xF0, 0x03},
1501 	{0xF1, 0x04},
1502 	{0xF0, 0x83},
1503 	{0xF0, 0x03},
1504 	{0xF1, 0x04},
1505 	{0xF0, 0x84},
1506 	{0xF0, 0x04},
1507 	{0xF1, 0x06},
1508 	{0xF0, 0x85},
1509 	{0xF0, 0x05},
1510 	{0xF1, 0x06},
1511 	{0xF0, 0x86},
1512 	{0xF0, 0x06},
1513 	{0xF1, 0x06},
1514 	{0xF0, 0x87},
1515 	{0xF0, 0x07},
1516 	{0xF1, 0x08},
1517 	{0xF0, 0x88},
1518 	{0xF0, 0x08},
1519 	{0xF1, 0x08},
1520 	{0xF0, 0x89},
1521 	{0xF0, 0x09},
1522 	{0xF1, 0x0A},
1523 	{0xF0, 0x8A},
1524 	{0xF0, 0x0A},
1525 	{0xF1, 0x0A},
1526 	{0xF0, 0x8B},
1527 	{0xF0, 0x0B},
1528 	{0xF1, 0x0C},
1529 	{0xF0, 0x8C},
1530 	{0xF0, 0x0C},
1531 	{0xF1, 0x0C},
1532 	{0xF0, 0x8D},
1533 	{0xF0, 0x0D},
1534 	{0xF1, 0x0E},
1535 	{0xF0, 0x8E},
1536 	{0xF0, 0x0E},
1537 	{0xF1, 0x0E},
1538 	{0xF0, 0x8F},
1539 	{0xF0, 0x0F},
1540 	{0xF1, 0x10},
1541 	{0xF0, 0x90},
1542 	{0xF0, 0x10},
1543 	{0xF1, 0x10},
1544 	{0xF0, 0x91},
1545 	{0xF0, 0x11},
1546 	{0xF1, 0x12},
1547 	{0xF0, 0x92},
1548 	{0xF0, 0x12},
1549 	{0xF1, 0x12},
1550 	{0xF0, 0x93},
1551 	{0xF0, 0x13},
1552 	{0xF1, 0x14},
1553 	{0xF0, 0x94},
1554 	{0xF0, 0x14},
1555 	{0xF1, 0x14},
1556 	{0xF0, 0x95},
1557 	{0xF0, 0x15},
1558 	{0xF1, 0x16},
1559 	{0xF0, 0x96},
1560 	{0xF0, 0x16},
1561 	{0xF1, 0x16},
1562 	{0xF0, 0x97},
1563 	{0xF0, 0x17},
1564 	{0xF1, 0x18},
1565 	{0xF0, 0x98},
1566 	{0xF0, 0x18},
1567 	{0xF1, 0x18},
1568 	{0xF0, 0x99},
1569 	{0xF0, 0x19},
1570 	{0xF1, 0x1A},
1571 	{0xF0, 0x9A},
1572 	{0xF0, 0x1A},
1573 	{0xF1, 0x1A},
1574 	{0xF0, 0x9B},
1575 	{0xF0, 0x1B},
1576 	{0xF1, 0x1C},
1577 	{0xF0, 0x9C},
1578 	{0xF0, 0x1C},
1579 	{0xF1, 0x1C},
1580 	{0xF0, 0x9D},
1581 	{0xF0, 0x1D},
1582 	{0xF1, 0x1E},
1583 	{0xF0, 0x9E},
1584 	{0xF0, 0x1E},
1585 	{0xF1, 0x1E},
1586 	{0xF0, 0x9F},
1587 	{0xF0, 0x1F},
1588 	{0xF1, 0x20},
1589 	{0xF0, 0xA0},
1590 	{0xF0, 0x20},
1591 	{0xF1, 0x20},
1592 	{0xF0, 0xA1},
1593 	{0xF0, 0x21},
1594 	{0xF1, 0x22},
1595 	{0xF0, 0xA2},
1596 	{0xF0, 0x22},
1597 	{0xF1, 0x22},
1598 	{0xF0, 0xA3},
1599 	{0xF0, 0x23},
1600 	{0xF1, 0x24},
1601 	{0xF0, 0xA4},
1602 	{0xF0, 0x24},
1603 	{0xF1, 0x24},
1604 	{0xF0, 0xA5},
1605 	{0xF0, 0x25},
1606 	{0xF1, 0x26},
1607 	{0xF0, 0xA6},
1608 	{0xF0, 0x26},
1609 	{0xF1, 0x26},
1610 	{0xF0, 0xA7},
1611 	{0xF0, 0x27},
1612 	{0xF1, 0x28},
1613 	{0xF0, 0xA8},
1614 	{0xF0, 0x28},
1615 	{0xF1, 0x28},
1616 	{0xF0, 0xA9},
1617 	{0xF0, 0x29},
1618 	{0xF1, 0x2A},
1619 	{0xF0, 0xAA},
1620 	{0xF0, 0x2A},
1621 	{0xF1, 0x2A},
1622 	{0xF0, 0xAB},
1623 	{0xF0, 0x2B},
1624 	{0xF1, 0x2C},
1625 	{0xF0, 0xAC},
1626 	{0xF0, 0x2C},
1627 	{0xF1, 0x2C},
1628 	{0xF0, 0xAD},
1629 	{0xF0, 0x2D},
1630 	{0xF1, 0x2E},
1631 	{0xF0, 0xAE},
1632 	{0xF0, 0x2E},
1633 	{0xF1, 0x2E},
1634 	{0xF0, 0xAF},
1635 	{0xF0, 0x2F},
1636 	{0xF1, 0x30},
1637 	{0xF0, 0xB0},
1638 	{0xF0, 0x30},
1639 	{0xF1, 0x30},
1640 	{0xF0, 0xB1},
1641 	{0xF0, 0x31},
1642 	{0xF1, 0x32},
1643 	{0xF0, 0xB2},
1644 	{0xF0, 0x32},
1645 	{0xF1, 0x32},
1646 	{0xF0, 0xB3},
1647 	{0xF0, 0x33},
1648 	{0xF1, 0x34},
1649 	{0xF0, 0xB4},
1650 	{0xF0, 0x34},
1651 	{0xF1, 0x34},
1652 	{0xF0, 0xB5},
1653 	{0xF0, 0x35},
1654 	{0xF1, 0x36},
1655 	{0xF0, 0xB6},
1656 	{0xF0, 0x36},
1657 	{0xF1, 0x36},
1658 	{0xF0, 0xB7},
1659 	{0xF0, 0x37},
1660 	{0xF1, 0x38},
1661 	{0xF0, 0xB8},
1662 	{0xF0, 0x38},
1663 	{0xF1, 0x38},
1664 	{0xF0, 0xB9},
1665 	{0xF0, 0x39},
1666 	{0xF1, 0x3A},
1667 	{0xF0, 0xBA},
1668 	{0xF0, 0x3A},
1669 	{0xF1, 0x3A},
1670 	{0xF0, 0xBB},
1671 	{0xF0, 0x3B},
1672 	{0xF1, 0x3C},
1673 	{0xF0, 0xBC},
1674 	{0xF0, 0x3C},
1675 	{0xF1, 0x3C},
1676 	{0xF0, 0xBD},
1677 	{0xF0, 0x3D},
1678 	{0xF1, 0x3E},
1679 	{0xF0, 0xBE},
1680 	{0xF0, 0x3E},
1681 	{0xF1, 0x3E},
1682 	{0xF0, 0xBF},
1683 	{0xF0, 0x00},
1684 };
1685 
1686 static const unsigned short awcFrameTime[MAX_RATE] = {
1687 		10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
1688 };
1689 
1690 /*---------------------  Export Variables  --------------------------*/
1691 /*
1692  * Description: Calculate data frame transmitting time
1693  *
1694  * Parameters:
1695  *  In:
1696  *      by_preamble_type  - Preamble Type
1697  *      by_pkt_type        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1698  *      cb_frame_length   - Baseband Type
1699  *      tx_rate           - Tx Rate
1700  *  Out:
1701  *
1702  * Return Value: FrameTime
1703  *
1704  */
bb_get_frame_time(unsigned char by_preamble_type,unsigned char by_pkt_type,unsigned int cb_frame_length,unsigned short tx_rate)1705 unsigned int bb_get_frame_time(unsigned char by_preamble_type,
1706 			       unsigned char by_pkt_type,
1707 			       unsigned int cb_frame_length,
1708 			       unsigned short tx_rate)
1709 {
1710 	unsigned int frame_time;
1711 	unsigned int preamble;
1712 	unsigned int tmp;
1713 	unsigned int rate_idx = (unsigned int)tx_rate;
1714 	unsigned int rate = 0;
1715 
1716 	if (rate_idx > RATE_54M)
1717 		return 0;
1718 
1719 	rate = (unsigned int)awcFrameTime[rate_idx];
1720 
1721 	if (rate_idx <= 3) {		    /* CCK mode */
1722 		if (by_preamble_type == 1) /* Short */
1723 			preamble = 96;
1724 		else
1725 			preamble = 192;
1726 		frame_time = (cb_frame_length * 80) / rate;  /* ????? */
1727 		tmp = (frame_time * rate) / 80;
1728 		if (cb_frame_length != tmp)
1729 			frame_time++;
1730 
1731 		return preamble + frame_time;
1732 	}
1733 	frame_time = (cb_frame_length * 8 + 22) / rate; /* ???????? */
1734 	tmp = ((frame_time * rate) - 22) / 8;
1735 	if (cb_frame_length != tmp)
1736 		frame_time++;
1737 
1738 	frame_time = frame_time * 4;    /* ??????? */
1739 	if (by_pkt_type != PK_TYPE_11A)
1740 		frame_time += 6;     /* ?????? */
1741 
1742 	return 20 + frame_time; /* ?????? */
1743 }
1744 
1745 /*
1746  * Description: Calculate Length, Service, and Signal fields of Phy for Tx
1747  *
1748  * Parameters:
1749  *  In:
1750  *      priv         - Device Structure
1751  *      frame_length   - Tx Frame Length
1752  *      tx_rate           - Tx Rate
1753  *  Out:
1754  *	struct vnt_phy_field *phy
1755  *		- pointer to Phy Length field
1756  *		- pointer to Phy Service field
1757  *		- pointer to Phy Signal field
1758  *
1759  * Return Value: none
1760  *
1761  */
vnt_get_phy_field(struct vnt_private * priv,u32 frame_length,u16 tx_rate,u8 pkt_type,struct vnt_phy_field * phy)1762 void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,
1763 		       u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
1764 {
1765 	u32 bit_count;
1766 	u32 count = 0;
1767 	u32 tmp;
1768 	int ext_bit;
1769 	u8 preamble_type = priv->byPreambleType;
1770 
1771 	bit_count = frame_length * 8;
1772 	ext_bit = false;
1773 
1774 	switch (tx_rate) {
1775 	case RATE_1M:
1776 		count = bit_count;
1777 
1778 		phy->signal = 0x00;
1779 
1780 		break;
1781 	case RATE_2M:
1782 		count = bit_count / 2;
1783 
1784 		if (preamble_type == 1)
1785 			phy->signal = 0x09;
1786 		else
1787 			phy->signal = 0x01;
1788 
1789 		break;
1790 	case RATE_5M:
1791 		count = (bit_count * 10) / 55;
1792 		tmp = (count * 55) / 10;
1793 
1794 		if (tmp != bit_count)
1795 			count++;
1796 
1797 		if (preamble_type == 1)
1798 			phy->signal = 0x0a;
1799 		else
1800 			phy->signal = 0x02;
1801 
1802 		break;
1803 	case RATE_11M:
1804 		count = bit_count / 11;
1805 		tmp = count * 11;
1806 
1807 		if (tmp != bit_count) {
1808 			count++;
1809 
1810 			if ((bit_count - tmp) <= 3)
1811 				ext_bit = true;
1812 		}
1813 
1814 		if (preamble_type == 1)
1815 			phy->signal = 0x0b;
1816 		else
1817 			phy->signal = 0x03;
1818 
1819 		break;
1820 	case RATE_6M:
1821 		if (pkt_type == PK_TYPE_11A)
1822 			phy->signal = 0x9b;
1823 		else
1824 			phy->signal = 0x8b;
1825 
1826 		break;
1827 	case RATE_9M:
1828 		if (pkt_type == PK_TYPE_11A)
1829 			phy->signal = 0x9f;
1830 		else
1831 			phy->signal = 0x8f;
1832 
1833 		break;
1834 	case RATE_12M:
1835 		if (pkt_type == PK_TYPE_11A)
1836 			phy->signal = 0x9a;
1837 		else
1838 			phy->signal = 0x8a;
1839 
1840 		break;
1841 	case RATE_18M:
1842 		if (pkt_type == PK_TYPE_11A)
1843 			phy->signal = 0x9e;
1844 		else
1845 			phy->signal = 0x8e;
1846 
1847 		break;
1848 	case RATE_24M:
1849 		if (pkt_type == PK_TYPE_11A)
1850 			phy->signal = 0x99;
1851 		else
1852 			phy->signal = 0x89;
1853 
1854 		break;
1855 	case RATE_36M:
1856 		if (pkt_type == PK_TYPE_11A)
1857 			phy->signal = 0x9d;
1858 		else
1859 			phy->signal = 0x8d;
1860 
1861 		break;
1862 	case RATE_48M:
1863 		if (pkt_type == PK_TYPE_11A)
1864 			phy->signal = 0x98;
1865 		else
1866 			phy->signal = 0x88;
1867 
1868 		break;
1869 	case RATE_54M:
1870 		if (pkt_type == PK_TYPE_11A)
1871 			phy->signal = 0x9c;
1872 		else
1873 			phy->signal = 0x8c;
1874 		break;
1875 	default:
1876 		if (pkt_type == PK_TYPE_11A)
1877 			phy->signal = 0x9c;
1878 		else
1879 			phy->signal = 0x8c;
1880 		break;
1881 	}
1882 
1883 	if (pkt_type == PK_TYPE_11B) {
1884 		phy->service = 0x00;
1885 		if (ext_bit)
1886 			phy->service |= 0x80;
1887 		phy->len = cpu_to_le16((u16)count);
1888 	} else {
1889 		phy->service = 0x00;
1890 		phy->len = cpu_to_le16((u16)frame_length);
1891 	}
1892 }
1893 
1894 /*
1895  * Description: Read a byte from BASEBAND, by embedded programming
1896  *
1897  * Parameters:
1898  *  In:
1899  *      iobase      - I/O base address
1900  *      by_bb_addr  - address of register in Baseband
1901  *  Out:
1902  *      pby_data    - data read
1903  *
1904  * Return Value: true if succeeded; false if failed.
1905  *
1906  */
bb_read_embedded(struct vnt_private * priv,unsigned char by_bb_addr,unsigned char * pby_data)1907 bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
1908 		      unsigned char *pby_data)
1909 {
1910 	void __iomem *iobase = priv->PortOffset;
1911 	unsigned short ww;
1912 	unsigned char by_value;
1913 
1914 	/* BB reg offset */
1915 	VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr);
1916 
1917 	/* turn on REGR */
1918 	MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
1919 	/* W_MAX_TIMEOUT is the timeout period */
1920 	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1921 		VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value);
1922 		if (by_value & BBREGCTL_DONE)
1923 			break;
1924 	}
1925 
1926 	/* get BB data */
1927 	VNSvInPortB(iobase + MAC_REG_BBREGDATA, pby_data);
1928 
1929 	if (ww == W_MAX_TIMEOUT) {
1930 		pr_debug(" DBG_PORT80(0x30)\n");
1931 		return false;
1932 	}
1933 	return true;
1934 }
1935 
1936 /*
1937  * Description: Write a Byte to BASEBAND, by embedded programming
1938  *
1939  * Parameters:
1940  *  In:
1941  *      iobase      - I/O base address
1942  *      by_bb_addr  - address of register in Baseband
1943  *      by_data     - data to write
1944  *  Out:
1945  *      none
1946  *
1947  * Return Value: true if succeeded; false if failed.
1948  *
1949  */
bb_write_embedded(struct vnt_private * priv,unsigned char by_bb_addr,unsigned char by_data)1950 bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
1951 		       unsigned char by_data)
1952 {
1953 	void __iomem *iobase = priv->PortOffset;
1954 	unsigned short ww;
1955 	unsigned char by_value;
1956 
1957 	/* BB reg offset */
1958 	VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr);
1959 	/* set BB data */
1960 	VNSvOutPortB(iobase + MAC_REG_BBREGDATA, by_data);
1961 
1962 	/* turn on BBREGCTL_REGW */
1963 	MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
1964 	/* W_MAX_TIMEOUT is the timeout period */
1965 	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1966 		VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value);
1967 		if (by_value & BBREGCTL_DONE)
1968 			break;
1969 	}
1970 
1971 	if (ww == W_MAX_TIMEOUT) {
1972 		pr_debug(" DBG_PORT80(0x31)\n");
1973 		return false;
1974 	}
1975 	return true;
1976 }
1977 
1978 /*
1979  * Description: VIA VT3253 Baseband chip init function
1980  *
1981  * Parameters:
1982  *  In:
1983  *      iobase      - I/O base address
1984  *      byRevId     - Revision ID
1985  *      byRFType    - RF type
1986  *  Out:
1987  *      none
1988  *
1989  * Return Value: true if succeeded; false if failed.
1990  *
1991  */
1992 
bb_vt3253_init(struct vnt_private * priv)1993 bool bb_vt3253_init(struct vnt_private *priv)
1994 {
1995 	bool result = true;
1996 	int        ii;
1997 	void __iomem *iobase = priv->PortOffset;
1998 	unsigned char by_rf_type = priv->byRFType;
1999 	unsigned char by_local_id = priv->byLocalID;
2000 
2001 	if (by_rf_type == RF_RFMD2959) {
2002 		if (by_local_id <= REV_ID_VT3253_A1) {
2003 			for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
2004 				result &= bb_write_embedded(priv,
2005 					byVT3253InitTab_RFMD[ii][0],
2006 					byVT3253InitTab_RFMD[ii][1]);
2007 
2008 		} else {
2009 			for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
2010 				result &= bb_write_embedded(priv,
2011 					byVT3253B0_RFMD[ii][0],
2012 					byVT3253B0_RFMD[ii][1]);
2013 
2014 			for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
2015 				result &= bb_write_embedded(priv,
2016 					byVT3253B0_AGC4_RFMD2959[ii][0],
2017 					byVT3253B0_AGC4_RFMD2959[ii][1]);
2018 
2019 			VNSvOutPortD(iobase + MAC_REG_ITRTMSET, 0x23);
2020 			MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
2021 		}
2022 		priv->abyBBVGA[0] = 0x18;
2023 		priv->abyBBVGA[1] = 0x0A;
2024 		priv->abyBBVGA[2] = 0x0;
2025 		priv->abyBBVGA[3] = 0x0;
2026 		priv->ldBmThreshold[0] = -70;
2027 		priv->ldBmThreshold[1] = -50;
2028 		priv->ldBmThreshold[2] = 0;
2029 		priv->ldBmThreshold[3] = 0;
2030 	} else if ((by_rf_type == RF_AIROHA) || (by_rf_type == RF_AL2230S)) {
2031 		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2032 			result &= bb_write_embedded(priv,
2033 				byVT3253B0_AIROHA2230[ii][0],
2034 				byVT3253B0_AIROHA2230[ii][1]);
2035 
2036 		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2037 			result &= bb_write_embedded(priv,
2038 				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2039 
2040 		priv->abyBBVGA[0] = 0x1C;
2041 		priv->abyBBVGA[1] = 0x10;
2042 		priv->abyBBVGA[2] = 0x0;
2043 		priv->abyBBVGA[3] = 0x0;
2044 		priv->ldBmThreshold[0] = -70;
2045 		priv->ldBmThreshold[1] = -48;
2046 		priv->ldBmThreshold[2] = 0;
2047 		priv->ldBmThreshold[3] = 0;
2048 	} else if (by_rf_type == RF_UW2451) {
2049 		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2050 			result &= bb_write_embedded(priv,
2051 				byVT3253B0_UW2451[ii][0],
2052 				byVT3253B0_UW2451[ii][1]);
2053 
2054 		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2055 			result &= bb_write_embedded(priv,
2056 				byVT3253B0_AGC[ii][0],
2057 				byVT3253B0_AGC[ii][1]);
2058 
2059 		VNSvOutPortB(iobase + MAC_REG_ITRTMSET, 0x23);
2060 		MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0));
2061 
2062 		priv->abyBBVGA[0] = 0x14;
2063 		priv->abyBBVGA[1] = 0x0A;
2064 		priv->abyBBVGA[2] = 0x0;
2065 		priv->abyBBVGA[3] = 0x0;
2066 		priv->ldBmThreshold[0] = -60;
2067 		priv->ldBmThreshold[1] = -50;
2068 		priv->ldBmThreshold[2] = 0;
2069 		priv->ldBmThreshold[3] = 0;
2070 	} else if (by_rf_type == RF_UW2452) {
2071 		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2072 			result &= bb_write_embedded(priv,
2073 				byVT3253B0_UW2451[ii][0],
2074 				byVT3253B0_UW2451[ii][1]);
2075 
2076 		/* Init ANT B select,
2077 		 * TX Config CR09 = 0x61->0x45,
2078 		 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2079 		 */
2080 
2081 		/*bResult &= bb_write_embedded(iobase,0x09,0x41);*/
2082 
2083 		/* Init ANT B select,
2084 		 * RX Config CR10 = 0x28->0x2A,
2085 		 * 0x2A->0x28(VC1/VC2 define,
2086 		 * make the ANT_A, ANT_B inverted)
2087 		 */
2088 
2089 		/*bResult &= bb_write_embedded(iobase,0x0a,0x28);*/
2090 		/* Select VC1/VC2, CR215 = 0x02->0x06 */
2091 		result &= bb_write_embedded(priv, 0xd7, 0x06);
2092 
2093 		/* {{RobertYu:20050125, request by Jack */
2094 		result &= bb_write_embedded(priv, 0x90, 0x20);
2095 		result &= bb_write_embedded(priv, 0x97, 0xeb);
2096 		/* }} */
2097 
2098 		/* {{RobertYu:20050221, request by Jack */
2099 		result &= bb_write_embedded(priv, 0xa6, 0x00);
2100 		result &= bb_write_embedded(priv, 0xa8, 0x30);
2101 		/* }} */
2102 		result &= bb_write_embedded(priv, 0xb0, 0x58);
2103 
2104 		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2105 			result &= bb_write_embedded(priv,
2106 				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2107 
2108 		priv->abyBBVGA[0] = 0x14;
2109 		priv->abyBBVGA[1] = 0x0A;
2110 		priv->abyBBVGA[2] = 0x0;
2111 		priv->abyBBVGA[3] = 0x0;
2112 		priv->ldBmThreshold[0] = -60;
2113 		priv->ldBmThreshold[1] = -50;
2114 		priv->ldBmThreshold[2] = 0;
2115 		priv->ldBmThreshold[3] = 0;
2116 		/* }} RobertYu */
2117 
2118 	} else if (by_rf_type == RF_VT3226) {
2119 		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2120 			result &= bb_write_embedded(priv,
2121 				byVT3253B0_AIROHA2230[ii][0],
2122 				byVT3253B0_AIROHA2230[ii][1]);
2123 
2124 		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2125 			result &= bb_write_embedded(priv,
2126 				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2127 
2128 		priv->abyBBVGA[0] = 0x1C;
2129 		priv->abyBBVGA[1] = 0x10;
2130 		priv->abyBBVGA[2] = 0x0;
2131 		priv->abyBBVGA[3] = 0x0;
2132 		priv->ldBmThreshold[0] = -70;
2133 		priv->ldBmThreshold[1] = -48;
2134 		priv->ldBmThreshold[2] = 0;
2135 		priv->ldBmThreshold[3] = 0;
2136 		/* Fix VT3226 DFC system timing issue */
2137 		MACvSetRFLE_LatchBase(iobase);
2138 		/* {{ RobertYu: 20050104 */
2139 	} else if (by_rf_type == RF_AIROHA7230) {
2140 		for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2141 			result &= bb_write_embedded(priv,
2142 				byVT3253B0_AIROHA2230[ii][0],
2143 				byVT3253B0_AIROHA2230[ii][1]);
2144 
2145 		/* {{ RobertYu:20050223, request by JerryChung */
2146 		/* Init ANT B select,TX Config CR09 = 0x61->0x45,
2147 		 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2148 		 */
2149 		/* bResult &= bb_write_embedded(iobase,0x09,0x41);*/
2150 		/* Init ANT B select,RX Config CR10 = 0x28->0x2A,
2151 		 * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2152 		 */
2153 		/* bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/
2154 		/* Select VC1/VC2, CR215 = 0x02->0x06 */
2155 		result &= bb_write_embedded(priv, 0xd7, 0x06);
2156 		/* }} */
2157 
2158 		for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2159 			result &= bb_write_embedded(priv,
2160 				byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2161 
2162 		priv->abyBBVGA[0] = 0x1C;
2163 		priv->abyBBVGA[1] = 0x10;
2164 		priv->abyBBVGA[2] = 0x0;
2165 		priv->abyBBVGA[3] = 0x0;
2166 		priv->ldBmThreshold[0] = -70;
2167 		priv->ldBmThreshold[1] = -48;
2168 		priv->ldBmThreshold[2] = 0;
2169 		priv->ldBmThreshold[3] = 0;
2170 		/* }} RobertYu */
2171 	} else {
2172 		/* No VGA Table now */
2173 		priv->bUpdateBBVGA = false;
2174 		priv->abyBBVGA[0] = 0x1C;
2175 	}
2176 
2177 	if (by_local_id > REV_ID_VT3253_A1) {
2178 		bb_write_embedded(priv, 0x04, 0x7F);
2179 		bb_write_embedded(priv, 0x0D, 0x01);
2180 	}
2181 
2182 	return result;
2183 }
2184 
2185 /*
2186  * Description: Set ShortSlotTime mode
2187  *
2188  * Parameters:
2189  *  In:
2190  *      priv     - Device Structure
2191  *  Out:
2192  *      none
2193  *
2194  * Return Value: none
2195  *
2196  */
2197 void
bb_set_short_slot_time(struct vnt_private * priv)2198 bb_set_short_slot_time(struct vnt_private *priv)
2199 {
2200 	unsigned char by_bb_rx_conf = 0;
2201 	unsigned char by_bb_vga = 0;
2202 
2203 	bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */
2204 
2205 	if (priv->bShortSlotTime)
2206 		by_bb_rx_conf &= 0xDF; /* 1101 1111 */
2207 	else
2208 		by_bb_rx_conf |= 0x20; /* 0010 0000 */
2209 
2210 	/* patch for 3253B0 Baseband with Cardbus module */
2211 	bb_read_embedded(priv, 0xE7, &by_bb_vga);
2212 	if (by_bb_vga == priv->abyBBVGA[0])
2213 		by_bb_rx_conf |= 0x20; /* 0010 0000 */
2214 
2215 	bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */
2216 }
2217 
bb_set_vga_gain_offset(struct vnt_private * priv,unsigned char by_data)2218 void bb_set_vga_gain_offset(struct vnt_private *priv, unsigned char by_data)
2219 {
2220 	unsigned char by_bb_rx_conf = 0;
2221 
2222 	bb_write_embedded(priv, 0xE7, by_data);
2223 
2224 	bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */
2225 	/* patch for 3253B0 Baseband with Cardbus module */
2226 	if (by_data == priv->abyBBVGA[0])
2227 		by_bb_rx_conf |= 0x20; /* 0010 0000 */
2228 	else if (priv->bShortSlotTime)
2229 		by_bb_rx_conf &= 0xDF; /* 1101 1111 */
2230 	else
2231 		by_bb_rx_conf |= 0x20; /* 0010 0000 */
2232 	priv->byBBVGACurrent = by_data;
2233 	bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */
2234 }
2235 
2236 /*
2237  * Description: Baseband SoftwareReset
2238  *
2239  * Parameters:
2240  *  In:
2241  *      iobase      - I/O base address
2242  *  Out:
2243  *      none
2244  *
2245  * Return Value: none
2246  *
2247  */
2248 void
bb_software_reset(struct vnt_private * priv)2249 bb_software_reset(struct vnt_private *priv)
2250 {
2251 	bb_write_embedded(priv, 0x50, 0x40);
2252 	bb_write_embedded(priv, 0x50, 0);
2253 	bb_write_embedded(priv, 0x9C, 0x01);
2254 	bb_write_embedded(priv, 0x9C, 0);
2255 }
2256 
2257 /*
2258  * Description: Baseband Power Save Mode ON
2259  *
2260  * Parameters:
2261  *  In:
2262  *      iobase      - I/O base address
2263  *  Out:
2264  *      none
2265  *
2266  * Return Value: none
2267  *
2268  */
2269 void
bb_power_save_mode_on(struct vnt_private * priv)2270 bb_power_save_mode_on(struct vnt_private *priv)
2271 {
2272 	unsigned char by_org_data;
2273 
2274 	bb_read_embedded(priv, 0x0D, &by_org_data);
2275 	by_org_data |= BIT(0);
2276 	bb_write_embedded(priv, 0x0D, by_org_data);
2277 }
2278 
2279 /*
2280  * Description: Baseband Power Save Mode OFF
2281  *
2282  * Parameters:
2283  *  In:
2284  *      iobase      - I/O base address
2285  *  Out:
2286  *      none
2287  *
2288  * Return Value: none
2289  *
2290  */
2291 void
bb_power_save_mode_off(struct vnt_private * priv)2292 bb_power_save_mode_off(struct vnt_private *priv)
2293 {
2294 	unsigned char by_org_data;
2295 
2296 	bb_read_embedded(priv, 0x0D, &by_org_data);
2297 	by_org_data &= ~(BIT(0));
2298 	bb_write_embedded(priv, 0x0D, by_org_data);
2299 }
2300 
2301 /*
2302  * Description: Set Tx Antenna mode
2303  *
2304  * Parameters:
2305  *  In:
2306  *      priv          - Device Structure
2307  *      by_antenna_mode    - Antenna Mode
2308  *  Out:
2309  *      none
2310  *
2311  * Return Value: none
2312  *
2313  */
2314 
2315 void
bb_set_tx_antenna_mode(struct vnt_private * priv,unsigned char by_antenna_mode)2316 bb_set_tx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode)
2317 {
2318 	unsigned char by_bb_tx_conf;
2319 
2320 	bb_read_embedded(priv, 0x09, &by_bb_tx_conf); /* CR09 */
2321 	if (by_antenna_mode == ANT_DIVERSITY) {
2322 		/* bit 1 is diversity */
2323 		by_bb_tx_conf |= 0x02;
2324 	} else if (by_antenna_mode == ANT_A) {
2325 		/* bit 2 is ANTSEL */
2326 		by_bb_tx_conf &= 0xF9; /* 1111 1001 */
2327 	} else if (by_antenna_mode == ANT_B) {
2328 		by_bb_tx_conf &= 0xFD; /* 1111 1101 */
2329 		by_bb_tx_conf |= 0x04;
2330 	}
2331 	bb_write_embedded(priv, 0x09, by_bb_tx_conf); /* CR09 */
2332 }
2333 
2334 /*
2335  * Description: Set Rx Antenna mode
2336  *
2337  * Parameters:
2338  *  In:
2339  *      priv          - Device Structure
2340  *      by_antenna_mode   - Antenna Mode
2341  *  Out:
2342  *      none
2343  *
2344  * Return Value: none
2345  *
2346  */
2347 
2348 void
bb_set_rx_antenna_mode(struct vnt_private * priv,unsigned char by_antenna_mode)2349 bb_set_rx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode)
2350 {
2351 	unsigned char by_bb_rx_conf;
2352 
2353 	bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */
2354 	if (by_antenna_mode == ANT_DIVERSITY) {
2355 		by_bb_rx_conf |= 0x01;
2356 
2357 	} else if (by_antenna_mode == ANT_A) {
2358 		by_bb_rx_conf &= 0xFC; /* 1111 1100 */
2359 	} else if (by_antenna_mode == ANT_B) {
2360 		by_bb_rx_conf &= 0xFE; /* 1111 1110 */
2361 		by_bb_rx_conf |= 0x02;
2362 	}
2363 	bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */
2364 }
2365 
2366 /*
2367  * Description: bb_set_deep_sleep
2368  *
2369  * Parameters:
2370  *  In:
2371  *      priv          - Device Structure
2372  *  Out:
2373  *      none
2374  *
2375  * Return Value: none
2376  *
2377  */
2378 void
bb_set_deep_sleep(struct vnt_private * priv,unsigned char by_local_id)2379 bb_set_deep_sleep(struct vnt_private *priv, unsigned char by_local_id)
2380 {
2381 	bb_write_embedded(priv, 0x0C, 0x17); /* CR12 */
2382 	bb_write_embedded(priv, 0x0D, 0xB9); /* CR13 */
2383 }
2384 
2385