1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * st-asc.c: ST Asynchronous serial controller (ASC) driver
4 *
5 * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited
6 */
7
8 #include <linux/module.h>
9 #include <linux/serial.h>
10 #include <linux/console.h>
11 #include <linux/sysrq.h>
12 #include <linux/pinctrl/consumer.h>
13 #include <linux/platform_device.h>
14 #include <linux/io.h>
15 #include <linux/irq.h>
16 #include <linux/tty.h>
17 #include <linux/tty_flip.h>
18 #include <linux/delay.h>
19 #include <linux/spinlock.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/of.h>
22 #include <linux/of_platform.h>
23 #include <linux/serial_core.h>
24 #include <linux/clk.h>
25 #include <linux/gpio/consumer.h>
26
27 #define DRIVER_NAME "st-asc"
28 #define ASC_SERIAL_NAME "ttyAS"
29 #define ASC_FIFO_SIZE 16
30 #define ASC_MAX_PORTS 8
31
32 /* Pinctrl states */
33 #define DEFAULT 0
34 #define NO_HW_FLOWCTRL 1
35
36 struct asc_port {
37 struct uart_port port;
38 struct gpio_desc *rts;
39 struct clk *clk;
40 struct pinctrl *pinctrl;
41 struct pinctrl_state *states[2];
42 unsigned int hw_flow_control:1;
43 unsigned int force_m1:1;
44 };
45
46 static struct asc_port asc_ports[ASC_MAX_PORTS];
47 static struct uart_driver asc_uart_driver;
48
49 /*---- UART Register definitions ------------------------------*/
50
51 /* Register offsets */
52
53 #define ASC_BAUDRATE 0x00
54 #define ASC_TXBUF 0x04
55 #define ASC_RXBUF 0x08
56 #define ASC_CTL 0x0C
57 #define ASC_INTEN 0x10
58 #define ASC_STA 0x14
59 #define ASC_GUARDTIME 0x18
60 #define ASC_TIMEOUT 0x1C
61 #define ASC_TXRESET 0x20
62 #define ASC_RXRESET 0x24
63 #define ASC_RETRIES 0x28
64
65 /* ASC_RXBUF */
66 #define ASC_RXBUF_PE 0x100
67 #define ASC_RXBUF_FE 0x200
68 /**
69 * Some of status comes from higher bits of the character and some come from
70 * the status register. Combining both of them in to single status using dummy
71 * bits.
72 */
73 #define ASC_RXBUF_DUMMY_RX 0x10000
74 #define ASC_RXBUF_DUMMY_BE 0x20000
75 #define ASC_RXBUF_DUMMY_OE 0x40000
76
77 /* ASC_CTL */
78
79 #define ASC_CTL_MODE_MSK 0x0007
80 #define ASC_CTL_MODE_8BIT 0x0001
81 #define ASC_CTL_MODE_7BIT_PAR 0x0003
82 #define ASC_CTL_MODE_9BIT 0x0004
83 #define ASC_CTL_MODE_8BIT_WKUP 0x0005
84 #define ASC_CTL_MODE_8BIT_PAR 0x0007
85 #define ASC_CTL_STOP_MSK 0x0018
86 #define ASC_CTL_STOP_HALFBIT 0x0000
87 #define ASC_CTL_STOP_1BIT 0x0008
88 #define ASC_CTL_STOP_1_HALFBIT 0x0010
89 #define ASC_CTL_STOP_2BIT 0x0018
90 #define ASC_CTL_PARITYODD 0x0020
91 #define ASC_CTL_LOOPBACK 0x0040
92 #define ASC_CTL_RUN 0x0080
93 #define ASC_CTL_RXENABLE 0x0100
94 #define ASC_CTL_SCENABLE 0x0200
95 #define ASC_CTL_FIFOENABLE 0x0400
96 #define ASC_CTL_CTSENABLE 0x0800
97 #define ASC_CTL_BAUDMODE 0x1000
98
99 /* ASC_GUARDTIME */
100
101 #define ASC_GUARDTIME_MSK 0x00FF
102
103 /* ASC_INTEN */
104
105 #define ASC_INTEN_RBE 0x0001
106 #define ASC_INTEN_TE 0x0002
107 #define ASC_INTEN_THE 0x0004
108 #define ASC_INTEN_PE 0x0008
109 #define ASC_INTEN_FE 0x0010
110 #define ASC_INTEN_OE 0x0020
111 #define ASC_INTEN_TNE 0x0040
112 #define ASC_INTEN_TOI 0x0080
113 #define ASC_INTEN_RHF 0x0100
114
115 /* ASC_RETRIES */
116
117 #define ASC_RETRIES_MSK 0x00FF
118
119 /* ASC_RXBUF */
120
121 #define ASC_RXBUF_MSK 0x03FF
122
123 /* ASC_STA */
124
125 #define ASC_STA_RBF 0x0001
126 #define ASC_STA_TE 0x0002
127 #define ASC_STA_THE 0x0004
128 #define ASC_STA_PE 0x0008
129 #define ASC_STA_FE 0x0010
130 #define ASC_STA_OE 0x0020
131 #define ASC_STA_TNE 0x0040
132 #define ASC_STA_TOI 0x0080
133 #define ASC_STA_RHF 0x0100
134 #define ASC_STA_TF 0x0200
135 #define ASC_STA_NKD 0x0400
136
137 /* ASC_TIMEOUT */
138
139 #define ASC_TIMEOUT_MSK 0x00FF
140
141 /* ASC_TXBUF */
142
143 #define ASC_TXBUF_MSK 0x01FF
144
145 /*---- Inline function definitions ---------------------------*/
146
to_asc_port(struct uart_port * port)147 static inline struct asc_port *to_asc_port(struct uart_port *port)
148 {
149 return container_of(port, struct asc_port, port);
150 }
151
asc_in(struct uart_port * port,u32 offset)152 static inline u32 asc_in(struct uart_port *port, u32 offset)
153 {
154 #ifdef readl_relaxed
155 return readl_relaxed(port->membase + offset);
156 #else
157 return readl(port->membase + offset);
158 #endif
159 }
160
asc_out(struct uart_port * port,u32 offset,u32 value)161 static inline void asc_out(struct uart_port *port, u32 offset, u32 value)
162 {
163 #ifdef writel_relaxed
164 writel_relaxed(value, port->membase + offset);
165 #else
166 writel(value, port->membase + offset);
167 #endif
168 }
169
170 /*
171 * Some simple utility functions to enable and disable interrupts.
172 * Note that these need to be called with interrupts disabled.
173 */
asc_disable_tx_interrupts(struct uart_port * port)174 static inline void asc_disable_tx_interrupts(struct uart_port *port)
175 {
176 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_THE;
177 asc_out(port, ASC_INTEN, intenable);
178 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
179 }
180
asc_enable_tx_interrupts(struct uart_port * port)181 static inline void asc_enable_tx_interrupts(struct uart_port *port)
182 {
183 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_THE;
184 asc_out(port, ASC_INTEN, intenable);
185 }
186
asc_disable_rx_interrupts(struct uart_port * port)187 static inline void asc_disable_rx_interrupts(struct uart_port *port)
188 {
189 u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_RBE;
190 asc_out(port, ASC_INTEN, intenable);
191 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
192 }
193
asc_enable_rx_interrupts(struct uart_port * port)194 static inline void asc_enable_rx_interrupts(struct uart_port *port)
195 {
196 u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_RBE;
197 asc_out(port, ASC_INTEN, intenable);
198 }
199
asc_txfifo_is_empty(struct uart_port * port)200 static inline u32 asc_txfifo_is_empty(struct uart_port *port)
201 {
202 return asc_in(port, ASC_STA) & ASC_STA_TE;
203 }
204
asc_txfifo_is_half_empty(struct uart_port * port)205 static inline u32 asc_txfifo_is_half_empty(struct uart_port *port)
206 {
207 return asc_in(port, ASC_STA) & ASC_STA_THE;
208 }
209
asc_port_name(struct uart_port * port)210 static inline const char *asc_port_name(struct uart_port *port)
211 {
212 return to_platform_device(port->dev)->name;
213 }
214
215 /*----------------------------------------------------------------------*/
216
217 /*
218 * This section contains code to support the use of the ASC as a
219 * generic serial port.
220 */
221
asc_hw_txroom(struct uart_port * port)222 static inline unsigned asc_hw_txroom(struct uart_port *port)
223 {
224 u32 status = asc_in(port, ASC_STA);
225
226 if (status & ASC_STA_THE)
227 return port->fifosize / 2;
228 else if (!(status & ASC_STA_TF))
229 return 1;
230
231 return 0;
232 }
233
234 /*
235 * Start transmitting chars.
236 * This is called from both interrupt and task level.
237 * Either way interrupts are disabled.
238 */
asc_transmit_chars(struct uart_port * port)239 static void asc_transmit_chars(struct uart_port *port)
240 {
241 struct circ_buf *xmit = &port->state->xmit;
242 int txroom;
243 unsigned char c;
244
245 txroom = asc_hw_txroom(port);
246
247 if ((txroom != 0) && port->x_char) {
248 c = port->x_char;
249 port->x_char = 0;
250 asc_out(port, ASC_TXBUF, c);
251 port->icount.tx++;
252 txroom = asc_hw_txroom(port);
253 }
254
255 if (uart_tx_stopped(port)) {
256 /*
257 * We should try and stop the hardware here, but I
258 * don't think the ASC has any way to do that.
259 */
260 asc_disable_tx_interrupts(port);
261 return;
262 }
263
264 if (uart_circ_empty(xmit)) {
265 asc_disable_tx_interrupts(port);
266 return;
267 }
268
269 if (txroom == 0)
270 return;
271
272 do {
273 c = xmit->buf[xmit->tail];
274 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
275 asc_out(port, ASC_TXBUF, c);
276 port->icount.tx++;
277 txroom--;
278 } while ((txroom > 0) && (!uart_circ_empty(xmit)));
279
280 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
281 uart_write_wakeup(port);
282
283 if (uart_circ_empty(xmit))
284 asc_disable_tx_interrupts(port);
285 }
286
asc_receive_chars(struct uart_port * port)287 static void asc_receive_chars(struct uart_port *port)
288 {
289 struct tty_port *tport = &port->state->port;
290 unsigned long status, mode;
291 unsigned long c = 0;
292 char flag;
293 bool ignore_pe = false;
294
295 /*
296 * Datasheet states: If the MODE field selects an 8-bit frame then
297 * this [parity error] bit is undefined. Software should ignore this
298 * bit when reading 8-bit frames.
299 */
300 mode = asc_in(port, ASC_CTL) & ASC_CTL_MODE_MSK;
301 if (mode == ASC_CTL_MODE_8BIT || mode == ASC_CTL_MODE_8BIT_PAR)
302 ignore_pe = true;
303
304 if (irqd_is_wakeup_set(irq_get_irq_data(port->irq)))
305 pm_wakeup_event(tport->tty->dev, 0);
306
307 while ((status = asc_in(port, ASC_STA)) & ASC_STA_RBF) {
308 c = asc_in(port, ASC_RXBUF) | ASC_RXBUF_DUMMY_RX;
309 flag = TTY_NORMAL;
310 port->icount.rx++;
311
312 if (status & ASC_STA_OE || c & ASC_RXBUF_FE ||
313 (c & ASC_RXBUF_PE && !ignore_pe)) {
314
315 if (c & ASC_RXBUF_FE) {
316 if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) {
317 port->icount.brk++;
318 if (uart_handle_break(port))
319 continue;
320 c |= ASC_RXBUF_DUMMY_BE;
321 } else {
322 port->icount.frame++;
323 }
324 } else if (c & ASC_RXBUF_PE) {
325 port->icount.parity++;
326 }
327 /*
328 * Reading any data from the RX FIFO clears the
329 * overflow error condition.
330 */
331 if (status & ASC_STA_OE) {
332 port->icount.overrun++;
333 c |= ASC_RXBUF_DUMMY_OE;
334 }
335
336 c &= port->read_status_mask;
337
338 if (c & ASC_RXBUF_DUMMY_BE)
339 flag = TTY_BREAK;
340 else if (c & ASC_RXBUF_PE)
341 flag = TTY_PARITY;
342 else if (c & ASC_RXBUF_FE)
343 flag = TTY_FRAME;
344 }
345
346 if (uart_handle_sysrq_char(port, c & 0xff))
347 continue;
348
349 uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag);
350 }
351
352 /* Tell the rest of the system the news. New characters! */
353 tty_flip_buffer_push(tport);
354 }
355
asc_interrupt(int irq,void * ptr)356 static irqreturn_t asc_interrupt(int irq, void *ptr)
357 {
358 struct uart_port *port = ptr;
359 u32 status;
360
361 spin_lock(&port->lock);
362
363 status = asc_in(port, ASC_STA);
364
365 if (status & ASC_STA_RBF) {
366 /* Receive FIFO not empty */
367 asc_receive_chars(port);
368 }
369
370 if ((status & ASC_STA_THE) &&
371 (asc_in(port, ASC_INTEN) & ASC_INTEN_THE)) {
372 /* Transmitter FIFO at least half empty */
373 asc_transmit_chars(port);
374 }
375
376 spin_unlock(&port->lock);
377
378 return IRQ_HANDLED;
379 }
380
381 /*----------------------------------------------------------------------*/
382
383 /*
384 * UART Functions
385 */
386
asc_tx_empty(struct uart_port * port)387 static unsigned int asc_tx_empty(struct uart_port *port)
388 {
389 return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0;
390 }
391
asc_set_mctrl(struct uart_port * port,unsigned int mctrl)392 static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl)
393 {
394 struct asc_port *ascport = to_asc_port(port);
395
396 /*
397 * This routine is used for seting signals of: DTR, DCD, CTS and RTS.
398 * We use ASC's hardware for CTS/RTS when hardware flow-control is
399 * enabled, however if the RTS line is required for another purpose,
400 * commonly controlled using HUP from userspace, then we need to toggle
401 * it manually, using GPIO.
402 *
403 * Some boards also have DTR and DCD implemented using PIO pins, code to
404 * do this should be hooked in here.
405 */
406
407 if (!ascport->rts)
408 return;
409
410 /* If HW flow-control is enabled, we can't fiddle with the RTS line */
411 if (asc_in(port, ASC_CTL) & ASC_CTL_CTSENABLE)
412 return;
413
414 gpiod_set_value(ascport->rts, mctrl & TIOCM_RTS);
415 }
416
asc_get_mctrl(struct uart_port * port)417 static unsigned int asc_get_mctrl(struct uart_port *port)
418 {
419 /*
420 * This routine is used for geting signals of: DTR, DCD, DSR, RI,
421 * and CTS/RTS
422 */
423 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
424 }
425
426 /* There are probably characters waiting to be transmitted. */
asc_start_tx(struct uart_port * port)427 static void asc_start_tx(struct uart_port *port)
428 {
429 struct circ_buf *xmit = &port->state->xmit;
430
431 if (!uart_circ_empty(xmit))
432 asc_enable_tx_interrupts(port);
433 }
434
435 /* Transmit stop */
asc_stop_tx(struct uart_port * port)436 static void asc_stop_tx(struct uart_port *port)
437 {
438 asc_disable_tx_interrupts(port);
439 }
440
441 /* Receive stop */
asc_stop_rx(struct uart_port * port)442 static void asc_stop_rx(struct uart_port *port)
443 {
444 asc_disable_rx_interrupts(port);
445 }
446
447 /* Handle breaks - ignored by us */
asc_break_ctl(struct uart_port * port,int break_state)448 static void asc_break_ctl(struct uart_port *port, int break_state)
449 {
450 /* Nothing here yet .. */
451 }
452
453 /*
454 * Enable port for reception.
455 */
asc_startup(struct uart_port * port)456 static int asc_startup(struct uart_port *port)
457 {
458 if (request_irq(port->irq, asc_interrupt, 0,
459 asc_port_name(port), port)) {
460 dev_err(port->dev, "cannot allocate irq.\n");
461 return -ENODEV;
462 }
463
464 asc_transmit_chars(port);
465 asc_enable_rx_interrupts(port);
466
467 return 0;
468 }
469
asc_shutdown(struct uart_port * port)470 static void asc_shutdown(struct uart_port *port)
471 {
472 asc_disable_tx_interrupts(port);
473 asc_disable_rx_interrupts(port);
474 free_irq(port->irq, port);
475 }
476
asc_pm(struct uart_port * port,unsigned int state,unsigned int oldstate)477 static void asc_pm(struct uart_port *port, unsigned int state,
478 unsigned int oldstate)
479 {
480 struct asc_port *ascport = to_asc_port(port);
481 unsigned long flags = 0;
482 u32 ctl;
483
484 switch (state) {
485 case UART_PM_STATE_ON:
486 clk_prepare_enable(ascport->clk);
487 break;
488 case UART_PM_STATE_OFF:
489 /*
490 * Disable the ASC baud rate generator, which is as close as
491 * we can come to turning it off. Note this is not called with
492 * the port spinlock held.
493 */
494 spin_lock_irqsave(&port->lock, flags);
495 ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN;
496 asc_out(port, ASC_CTL, ctl);
497 spin_unlock_irqrestore(&port->lock, flags);
498 clk_disable_unprepare(ascport->clk);
499 break;
500 }
501 }
502
asc_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)503 static void asc_set_termios(struct uart_port *port, struct ktermios *termios,
504 struct ktermios *old)
505 {
506 struct asc_port *ascport = to_asc_port(port);
507 struct gpio_desc *gpiod;
508 unsigned int baud;
509 u32 ctrl_val;
510 tcflag_t cflag;
511 unsigned long flags;
512
513 /* Update termios to reflect hardware capabilities */
514 termios->c_cflag &= ~(CMSPAR |
515 (ascport->hw_flow_control ? 0 : CRTSCTS));
516
517 port->uartclk = clk_get_rate(ascport->clk);
518
519 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
520 cflag = termios->c_cflag;
521
522 spin_lock_irqsave(&port->lock, flags);
523
524 /* read control register */
525 ctrl_val = asc_in(port, ASC_CTL);
526
527 /* stop serial port and reset value */
528 asc_out(port, ASC_CTL, (ctrl_val & ~ASC_CTL_RUN));
529 ctrl_val = ASC_CTL_RXENABLE | ASC_CTL_FIFOENABLE;
530
531 /* reset fifo rx & tx */
532 asc_out(port, ASC_TXRESET, 1);
533 asc_out(port, ASC_RXRESET, 1);
534
535 /* set character length */
536 if ((cflag & CSIZE) == CS7) {
537 ctrl_val |= ASC_CTL_MODE_7BIT_PAR;
538 cflag |= PARENB;
539 } else {
540 ctrl_val |= (cflag & PARENB) ? ASC_CTL_MODE_8BIT_PAR :
541 ASC_CTL_MODE_8BIT;
542 cflag &= ~CSIZE;
543 cflag |= CS8;
544 }
545 termios->c_cflag = cflag;
546
547 /* set stop bit */
548 ctrl_val |= (cflag & CSTOPB) ? ASC_CTL_STOP_2BIT : ASC_CTL_STOP_1BIT;
549
550 /* odd parity */
551 if (cflag & PARODD)
552 ctrl_val |= ASC_CTL_PARITYODD;
553
554 /* hardware flow control */
555 if ((cflag & CRTSCTS)) {
556 ctrl_val |= ASC_CTL_CTSENABLE;
557
558 /* If flow-control selected, stop handling RTS manually */
559 if (ascport->rts) {
560 devm_gpiod_put(port->dev, ascport->rts);
561 ascport->rts = NULL;
562
563 pinctrl_select_state(ascport->pinctrl,
564 ascport->states[DEFAULT]);
565 }
566 } else {
567 /* If flow-control disabled, it's safe to handle RTS manually */
568 if (!ascport->rts && ascport->states[NO_HW_FLOWCTRL]) {
569 pinctrl_select_state(ascport->pinctrl,
570 ascport->states[NO_HW_FLOWCTRL]);
571
572 gpiod = devm_gpiod_get(port->dev, "rts", GPIOD_OUT_LOW);
573 if (!IS_ERR(gpiod)) {
574 gpiod_set_consumer_name(gpiod,
575 port->dev->of_node->name);
576 ascport->rts = gpiod;
577 }
578 }
579 }
580
581 if ((baud < 19200) && !ascport->force_m1) {
582 asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud)));
583 } else {
584 /*
585 * MODE 1: recommended for high bit rates (above 19.2K)
586 *
587 * baudrate * 16 * 2^16
588 * ASCBaudRate = ------------------------
589 * inputclock
590 *
591 * To keep maths inside 64bits, we divide inputclock by 16.
592 */
593 u64 dividend = (u64)baud * (1 << 16);
594
595 do_div(dividend, port->uartclk / 16);
596 asc_out(port, ASC_BAUDRATE, dividend);
597 ctrl_val |= ASC_CTL_BAUDMODE;
598 }
599
600 uart_update_timeout(port, cflag, baud);
601
602 ascport->port.read_status_mask = ASC_RXBUF_DUMMY_OE;
603 if (termios->c_iflag & INPCK)
604 ascport->port.read_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE;
605 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
606 ascport->port.read_status_mask |= ASC_RXBUF_DUMMY_BE;
607
608 /*
609 * Characters to ignore
610 */
611 ascport->port.ignore_status_mask = 0;
612 if (termios->c_iflag & IGNPAR)
613 ascport->port.ignore_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE;
614 if (termios->c_iflag & IGNBRK) {
615 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_BE;
616 /*
617 * If we're ignoring parity and break indicators,
618 * ignore overruns too (for real raw support).
619 */
620 if (termios->c_iflag & IGNPAR)
621 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_OE;
622 }
623
624 /*
625 * Ignore all characters if CREAD is not set.
626 */
627 if (!(termios->c_cflag & CREAD))
628 ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_RX;
629
630 /* Set the timeout */
631 asc_out(port, ASC_TIMEOUT, 20);
632
633 /* write final value and enable port */
634 asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN));
635
636 spin_unlock_irqrestore(&port->lock, flags);
637 }
638
asc_type(struct uart_port * port)639 static const char *asc_type(struct uart_port *port)
640 {
641 return (port->type == PORT_ASC) ? DRIVER_NAME : NULL;
642 }
643
asc_release_port(struct uart_port * port)644 static void asc_release_port(struct uart_port *port)
645 {
646 }
647
asc_request_port(struct uart_port * port)648 static int asc_request_port(struct uart_port *port)
649 {
650 return 0;
651 }
652
653 /*
654 * Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set
655 * Set type field if successful
656 */
asc_config_port(struct uart_port * port,int flags)657 static void asc_config_port(struct uart_port *port, int flags)
658 {
659 if ((flags & UART_CONFIG_TYPE))
660 port->type = PORT_ASC;
661 }
662
663 static int
asc_verify_port(struct uart_port * port,struct serial_struct * ser)664 asc_verify_port(struct uart_port *port, struct serial_struct *ser)
665 {
666 /* No user changeable parameters */
667 return -EINVAL;
668 }
669
670 #ifdef CONFIG_CONSOLE_POLL
671 /*
672 * Console polling routines for writing and reading from the uart while
673 * in an interrupt or debug context (i.e. kgdb).
674 */
675
asc_get_poll_char(struct uart_port * port)676 static int asc_get_poll_char(struct uart_port *port)
677 {
678 if (!(asc_in(port, ASC_STA) & ASC_STA_RBF))
679 return NO_POLL_CHAR;
680
681 return asc_in(port, ASC_RXBUF);
682 }
683
asc_put_poll_char(struct uart_port * port,unsigned char c)684 static void asc_put_poll_char(struct uart_port *port, unsigned char c)
685 {
686 while (!asc_txfifo_is_half_empty(port))
687 cpu_relax();
688 asc_out(port, ASC_TXBUF, c);
689 }
690
691 #endif /* CONFIG_CONSOLE_POLL */
692
693 /*---------------------------------------------------------------------*/
694
695 static const struct uart_ops asc_uart_ops = {
696 .tx_empty = asc_tx_empty,
697 .set_mctrl = asc_set_mctrl,
698 .get_mctrl = asc_get_mctrl,
699 .start_tx = asc_start_tx,
700 .stop_tx = asc_stop_tx,
701 .stop_rx = asc_stop_rx,
702 .break_ctl = asc_break_ctl,
703 .startup = asc_startup,
704 .shutdown = asc_shutdown,
705 .set_termios = asc_set_termios,
706 .type = asc_type,
707 .release_port = asc_release_port,
708 .request_port = asc_request_port,
709 .config_port = asc_config_port,
710 .verify_port = asc_verify_port,
711 .pm = asc_pm,
712 #ifdef CONFIG_CONSOLE_POLL
713 .poll_get_char = asc_get_poll_char,
714 .poll_put_char = asc_put_poll_char,
715 #endif /* CONFIG_CONSOLE_POLL */
716 };
717
asc_init_port(struct asc_port * ascport,struct platform_device * pdev)718 static int asc_init_port(struct asc_port *ascport,
719 struct platform_device *pdev)
720 {
721 struct uart_port *port = &ascport->port;
722 struct resource *res;
723 int ret;
724
725 port->iotype = UPIO_MEM;
726 port->flags = UPF_BOOT_AUTOCONF;
727 port->ops = &asc_uart_ops;
728 port->fifosize = ASC_FIFO_SIZE;
729 port->dev = &pdev->dev;
730 port->irq = platform_get_irq(pdev, 0);
731 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ST_ASC_CONSOLE);
732
733 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
734 port->membase = devm_ioremap_resource(&pdev->dev, res);
735 if (IS_ERR(port->membase))
736 return PTR_ERR(port->membase);
737 port->mapbase = res->start;
738
739 spin_lock_init(&port->lock);
740
741 ascport->clk = devm_clk_get(&pdev->dev, NULL);
742
743 if (WARN_ON(IS_ERR(ascport->clk)))
744 return -EINVAL;
745 /* ensure that clk rate is correct by enabling the clk */
746 clk_prepare_enable(ascport->clk);
747 ascport->port.uartclk = clk_get_rate(ascport->clk);
748 WARN_ON(ascport->port.uartclk == 0);
749 clk_disable_unprepare(ascport->clk);
750
751 ascport->pinctrl = devm_pinctrl_get(&pdev->dev);
752 if (IS_ERR(ascport->pinctrl)) {
753 ret = PTR_ERR(ascport->pinctrl);
754 dev_err(&pdev->dev, "Failed to get Pinctrl: %d\n", ret);
755 return ret;
756 }
757
758 ascport->states[DEFAULT] =
759 pinctrl_lookup_state(ascport->pinctrl, "default");
760 if (IS_ERR(ascport->states[DEFAULT])) {
761 ret = PTR_ERR(ascport->states[DEFAULT]);
762 dev_err(&pdev->dev,
763 "Failed to look up Pinctrl state 'default': %d\n", ret);
764 return ret;
765 }
766
767 /* "no-hw-flowctrl" state is optional */
768 ascport->states[NO_HW_FLOWCTRL] =
769 pinctrl_lookup_state(ascport->pinctrl, "no-hw-flowctrl");
770 if (IS_ERR(ascport->states[NO_HW_FLOWCTRL]))
771 ascport->states[NO_HW_FLOWCTRL] = NULL;
772
773 return 0;
774 }
775
asc_of_get_asc_port(struct platform_device * pdev)776 static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev)
777 {
778 struct device_node *np = pdev->dev.of_node;
779 int id;
780
781 if (!np)
782 return NULL;
783
784 id = of_alias_get_id(np, "serial");
785 if (id < 0)
786 id = of_alias_get_id(np, ASC_SERIAL_NAME);
787
788 if (id < 0)
789 id = 0;
790
791 if (WARN_ON(id >= ASC_MAX_PORTS))
792 return NULL;
793
794 asc_ports[id].hw_flow_control = of_property_read_bool(np,
795 "uart-has-rtscts");
796 asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1");
797 asc_ports[id].port.line = id;
798 asc_ports[id].rts = NULL;
799
800 return &asc_ports[id];
801 }
802
803 #ifdef CONFIG_OF
804 static const struct of_device_id asc_match[] = {
805 { .compatible = "st,asc", },
806 {},
807 };
808
809 MODULE_DEVICE_TABLE(of, asc_match);
810 #endif
811
asc_serial_probe(struct platform_device * pdev)812 static int asc_serial_probe(struct platform_device *pdev)
813 {
814 int ret;
815 struct asc_port *ascport;
816
817 ascport = asc_of_get_asc_port(pdev);
818 if (!ascport)
819 return -ENODEV;
820
821 ret = asc_init_port(ascport, pdev);
822 if (ret)
823 return ret;
824
825 ret = uart_add_one_port(&asc_uart_driver, &ascport->port);
826 if (ret)
827 return ret;
828
829 platform_set_drvdata(pdev, &ascport->port);
830
831 return 0;
832 }
833
asc_serial_remove(struct platform_device * pdev)834 static int asc_serial_remove(struct platform_device *pdev)
835 {
836 struct uart_port *port = platform_get_drvdata(pdev);
837
838 return uart_remove_one_port(&asc_uart_driver, port);
839 }
840
841 #ifdef CONFIG_PM_SLEEP
asc_serial_suspend(struct device * dev)842 static int asc_serial_suspend(struct device *dev)
843 {
844 struct uart_port *port = dev_get_drvdata(dev);
845
846 return uart_suspend_port(&asc_uart_driver, port);
847 }
848
asc_serial_resume(struct device * dev)849 static int asc_serial_resume(struct device *dev)
850 {
851 struct uart_port *port = dev_get_drvdata(dev);
852
853 return uart_resume_port(&asc_uart_driver, port);
854 }
855
856 #endif /* CONFIG_PM_SLEEP */
857
858 /*----------------------------------------------------------------------*/
859
860 #ifdef CONFIG_SERIAL_ST_ASC_CONSOLE
asc_console_putchar(struct uart_port * port,int ch)861 static void asc_console_putchar(struct uart_port *port, int ch)
862 {
863 unsigned int timeout = 1000000;
864
865 /* Wait for upto 1 second in case flow control is stopping us. */
866 while (--timeout && !asc_txfifo_is_half_empty(port))
867 udelay(1);
868
869 asc_out(port, ASC_TXBUF, ch);
870 }
871
872 /*
873 * Print a string to the serial port trying not to disturb
874 * any possible real use of the port...
875 */
876
asc_console_write(struct console * co,const char * s,unsigned count)877 static void asc_console_write(struct console *co, const char *s, unsigned count)
878 {
879 struct uart_port *port = &asc_ports[co->index].port;
880 unsigned long flags;
881 unsigned long timeout = 1000000;
882 int locked = 1;
883 u32 intenable;
884
885 if (port->sysrq)
886 locked = 0; /* asc_interrupt has already claimed the lock */
887 else if (oops_in_progress)
888 locked = spin_trylock_irqsave(&port->lock, flags);
889 else
890 spin_lock_irqsave(&port->lock, flags);
891
892 /*
893 * Disable interrupts so we don't get the IRQ line bouncing
894 * up and down while interrupts are disabled.
895 */
896 intenable = asc_in(port, ASC_INTEN);
897 asc_out(port, ASC_INTEN, 0);
898 (void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
899
900 uart_console_write(port, s, count, asc_console_putchar);
901
902 while (--timeout && !asc_txfifo_is_empty(port))
903 udelay(1);
904
905 asc_out(port, ASC_INTEN, intenable);
906
907 if (locked)
908 spin_unlock_irqrestore(&port->lock, flags);
909 }
910
asc_console_setup(struct console * co,char * options)911 static int asc_console_setup(struct console *co, char *options)
912 {
913 struct asc_port *ascport;
914 int baud = 115200;
915 int bits = 8;
916 int parity = 'n';
917 int flow = 'n';
918
919 if (co->index >= ASC_MAX_PORTS)
920 return -ENODEV;
921
922 ascport = &asc_ports[co->index];
923
924 /*
925 * This driver does not support early console initialization
926 * (use ARM early printk support instead), so we only expect
927 * this to be called during the uart port registration when the
928 * driver gets probed and the port should be mapped at that point.
929 */
930 if (ascport->port.mapbase == 0 || ascport->port.membase == NULL)
931 return -ENXIO;
932
933 if (options)
934 uart_parse_options(options, &baud, &parity, &bits, &flow);
935
936 return uart_set_options(&ascport->port, co, baud, parity, bits, flow);
937 }
938
939 static struct console asc_console = {
940 .name = ASC_SERIAL_NAME,
941 .device = uart_console_device,
942 .write = asc_console_write,
943 .setup = asc_console_setup,
944 .flags = CON_PRINTBUFFER,
945 .index = -1,
946 .data = &asc_uart_driver,
947 };
948
949 #define ASC_SERIAL_CONSOLE (&asc_console)
950
951 #else
952 #define ASC_SERIAL_CONSOLE NULL
953 #endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */
954
955 static struct uart_driver asc_uart_driver = {
956 .owner = THIS_MODULE,
957 .driver_name = DRIVER_NAME,
958 .dev_name = ASC_SERIAL_NAME,
959 .major = 0,
960 .minor = 0,
961 .nr = ASC_MAX_PORTS,
962 .cons = ASC_SERIAL_CONSOLE,
963 };
964
965 static const struct dev_pm_ops asc_serial_pm_ops = {
966 SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend, asc_serial_resume)
967 };
968
969 static struct platform_driver asc_serial_driver = {
970 .probe = asc_serial_probe,
971 .remove = asc_serial_remove,
972 .driver = {
973 .name = DRIVER_NAME,
974 .pm = &asc_serial_pm_ops,
975 .of_match_table = of_match_ptr(asc_match),
976 },
977 };
978
asc_init(void)979 static int __init asc_init(void)
980 {
981 int ret;
982 static const char banner[] __initconst =
983 KERN_INFO "STMicroelectronics ASC driver initialized\n";
984
985 printk(banner);
986
987 ret = uart_register_driver(&asc_uart_driver);
988 if (ret)
989 return ret;
990
991 ret = platform_driver_register(&asc_serial_driver);
992 if (ret)
993 uart_unregister_driver(&asc_uart_driver);
994
995 return ret;
996 }
997
asc_exit(void)998 static void __exit asc_exit(void)
999 {
1000 platform_driver_unregister(&asc_serial_driver);
1001 uart_unregister_driver(&asc_uart_driver);
1002 }
1003
1004 module_init(asc_init);
1005 module_exit(asc_exit);
1006
1007 MODULE_ALIAS("platform:" DRIVER_NAME);
1008 MODULE_AUTHOR("STMicroelectronics (R&D) Limited");
1009 MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver");
1010 MODULE_LICENSE("GPL");
1011