Lines Matching refs:hw
12 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
13 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
14 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
15 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
16 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
17 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
18 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
19 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
20 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
21 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
22 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
23 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);
25 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
26 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw);
35 static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) in ixgbe_out_i2c_byte_ack() argument
39 status = ixgbe_clock_out_i2c_byte(hw, byte); in ixgbe_out_i2c_byte_ack()
42 return ixgbe_get_i2c_ack(hw); in ixgbe_out_i2c_byte_ack()
52 static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) in ixgbe_in_i2c_byte_ack() argument
56 status = ixgbe_clock_in_i2c_byte(hw, byte); in ixgbe_in_i2c_byte_ack()
60 return ixgbe_clock_out_i2c_bit(hw, false); in ixgbe_in_i2c_byte_ack()
88 s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_read_i2c_combined_generic_int() argument
91 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
104 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
106 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
108 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_read_i2c_combined_generic_int()
111 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_read_i2c_combined_generic_int()
114 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_read_i2c_combined_generic_int()
117 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_read_i2c_combined_generic_int()
120 ixgbe_i2c_start(hw); in ixgbe_read_i2c_combined_generic_int()
122 if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) in ixgbe_read_i2c_combined_generic_int()
125 if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) in ixgbe_read_i2c_combined_generic_int()
128 if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) in ixgbe_read_i2c_combined_generic_int()
131 if (ixgbe_clock_in_i2c_byte(hw, &csum_byte)) in ixgbe_read_i2c_combined_generic_int()
134 if (ixgbe_clock_out_i2c_bit(hw, false)) in ixgbe_read_i2c_combined_generic_int()
136 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_combined_generic_int()
138 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
143 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_combined_generic_int()
145 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
148 hw_dbg(hw, "I2C byte read combined error - Retry.\n"); in ixgbe_read_i2c_combined_generic_int()
150 hw_dbg(hw, "I2C byte read combined error.\n"); in ixgbe_read_i2c_combined_generic_int()
166 s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, in ixgbe_write_i2c_combined_generic_int() argument
169 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
181 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_combined_generic_int()
183 ixgbe_i2c_start(hw); in ixgbe_write_i2c_combined_generic_int()
185 if (ixgbe_out_i2c_byte_ack(hw, addr)) in ixgbe_write_i2c_combined_generic_int()
188 if (ixgbe_out_i2c_byte_ack(hw, reg_high)) in ixgbe_write_i2c_combined_generic_int()
191 if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
194 if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) in ixgbe_write_i2c_combined_generic_int()
197 if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) in ixgbe_write_i2c_combined_generic_int()
200 if (ixgbe_out_i2c_byte_ack(hw, csum)) in ixgbe_write_i2c_combined_generic_int()
202 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_combined_generic_int()
204 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
208 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_combined_generic_int()
210 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
213 hw_dbg(hw, "I2C byte write combined error - Retry.\n"); in ixgbe_write_i2c_combined_generic_int()
215 hw_dbg(hw, "I2C byte write combined error.\n"); in ixgbe_write_i2c_combined_generic_int()
228 static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr) in ixgbe_probe_phy() argument
232 hw->phy.mdio.prtad = phy_addr; in ixgbe_probe_phy()
233 if (mdio45_probe(&hw->phy.mdio, phy_addr) != 0) in ixgbe_probe_phy()
236 if (ixgbe_get_phy_id(hw)) in ixgbe_probe_phy()
239 hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_probe_phy()
241 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_probe_phy()
242 hw->phy.ops.read_reg(hw, in ixgbe_probe_phy()
249 hw->phy.type = ixgbe_phy_cu_unknown; in ixgbe_probe_phy()
251 hw->phy.type = ixgbe_phy_generic; in ixgbe_probe_phy()
263 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) in ixgbe_identify_phy_generic() argument
268 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
269 if (hw->bus.lan_id) in ixgbe_identify_phy_generic()
270 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
272 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
275 if (hw->phy.type != ixgbe_phy_unknown) in ixgbe_identify_phy_generic()
278 if (hw->phy.nw_mng_if_sel) { in ixgbe_identify_phy_generic()
279 phy_addr = (hw->phy.nw_mng_if_sel & in ixgbe_identify_phy_generic()
282 if (ixgbe_probe_phy(hw, phy_addr)) in ixgbe_identify_phy_generic()
289 if (ixgbe_probe_phy(hw, phy_addr)) { in ixgbe_identify_phy_generic()
300 hw->phy.mdio.prtad = MDIO_PRTAD_NONE; in ixgbe_identify_phy_generic()
314 bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw) in ixgbe_check_reset_blocked() argument
319 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
322 mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); in ixgbe_check_reset_blocked()
324 hw_dbg(hw, "MNG_VETO bit detected.\n"); in ixgbe_check_reset_blocked()
336 static s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) in ixgbe_get_phy_id() argument
342 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
346 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
347 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
349 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
350 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
398 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) in ixgbe_reset_phy_generic() argument
404 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
405 status = ixgbe_identify_phy_generic(hw); in ixgbe_reset_phy_generic()
407 if (status != 0 || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
411 if (!hw->phy.reset_if_overtemp && hw->phy.ops.check_overtemp(hw)) in ixgbe_reset_phy_generic()
415 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_generic()
422 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
433 if (hw->phy.type == ixgbe_phy_x550em_ext_t) { in ixgbe_reset_phy_generic()
434 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
445 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
458 hw_dbg(hw, "PHY reset polling failed to complete.\n"); in ixgbe_reset_phy_generic()
474 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
482 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
485 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
494 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
501 hw_dbg(hw, "PHY address command did not complete.\n"); in ixgbe_read_phy_reg_mdi()
510 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
513 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
522 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_read_phy_reg_mdi()
528 hw_dbg(hw, "PHY read command didn't complete\n"); in ixgbe_read_phy_reg_mdi()
535 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_read_phy_reg_mdi()
550 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
554 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
556 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_read_phy_reg_generic()
557 status = ixgbe_read_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_read_phy_reg_generic()
559 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
575 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
581 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
586 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
589 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
599 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
605 hw_dbg(hw, "PHY address cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
615 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
618 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
627 command = IXGBE_READ_REG(hw, IXGBE_MSCA); in ixgbe_write_phy_reg_mdi()
633 hw_dbg(hw, "PHY write cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
648 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
652 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_write_phy_reg_generic()
654 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_write_phy_reg_generic()
655 status = ixgbe_write_phy_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
657 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
665 #define IXGBE_HW_READ_REG(addr) IXGBE_READ_REG(hw, addr)
672 static s32 ixgbe_msca_cmd(struct ixgbe_hw *hw, u32 cmd) in ixgbe_msca_cmd() argument
674 IXGBE_WRITE_REG(hw, IXGBE_MSCA, cmd); in ixgbe_msca_cmd()
688 static s32 ixgbe_mii_bus_read_generic(struct ixgbe_hw *hw, int addr, in ixgbe_mii_bus_read_generic() argument
694 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_read_generic()
707 data = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_read_generic()
718 data = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_read_generic()
723 data = IXGBE_READ_REG(hw, IXGBE_MSRWD); in ixgbe_mii_bus_read_generic()
727 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_read_generic()
739 static s32 ixgbe_mii_bus_write_generic(struct ixgbe_hw *hw, int addr, in ixgbe_mii_bus_write_generic() argument
745 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_write_generic()
748 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)val); in ixgbe_mii_bus_write_generic()
763 err = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_write_generic()
768 err = ixgbe_msca_cmd(hw, cmd); in ixgbe_mii_bus_write_generic()
771 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_write_generic()
784 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_read() local
785 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_read()
787 return ixgbe_mii_bus_read_generic(hw, addr, regnum, gssr); in ixgbe_mii_bus_read()
801 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_write() local
802 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_write()
804 return ixgbe_mii_bus_write_generic(hw, addr, regnum, val, gssr); in ixgbe_mii_bus_write()
817 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_read() local
818 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_read()
821 return ixgbe_mii_bus_read_generic(hw, addr, regnum, gssr); in ixgbe_x550em_a_mii_bus_read()
835 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_write() local
836 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_write()
839 return ixgbe_mii_bus_write_generic(hw, addr, regnum, val, gssr); in ixgbe_x550em_a_mii_bus_write()
873 static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw) in ixgbe_x550em_a_has_mii() argument
875 struct ixgbe_adapter *adapter = hw->back; in ixgbe_x550em_a_has_mii()
909 s32 ixgbe_mii_bus_init(struct ixgbe_hw *hw) in ixgbe_mii_bus_init() argument
913 struct ixgbe_adapter *adapter = hw->back; in ixgbe_mii_bus_init()
918 switch (hw->device_id) { in ixgbe_mii_bus_init()
929 if (!ixgbe_x550em_a_has_mii(hw)) in ixgbe_mii_bus_init()
960 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22; in ixgbe_mii_bus_init()
972 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_generic() argument
979 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_generic()
982 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
985 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) && in ixgbe_setup_phy_link_generic()
989 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
991 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
994 if (hw->mac.type == ixgbe_mac_X550) { in ixgbe_setup_phy_link_generic()
997 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) && in ixgbe_setup_phy_link_generic()
1003 if ((hw->phy.autoneg_advertised & in ixgbe_setup_phy_link_generic()
1011 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) && in ixgbe_setup_phy_link_generic()
1015 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
1019 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
1022 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) && in ixgbe_setup_phy_link_generic()
1026 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
1029 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_generic()
1033 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1038 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1050 s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, in ixgbe_setup_phy_link_speed_generic() argument
1057 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
1060 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1063 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1066 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1069 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1072 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
1075 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL; in ixgbe_setup_phy_link_speed_generic()
1078 if (hw->phy.ops.setup_link) in ixgbe_setup_phy_link_speed_generic()
1079 hw->phy.ops.setup_link(hw); in ixgbe_setup_phy_link_speed_generic()
1091 static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw) in ixgbe_get_copper_speeds_supported() argument
1096 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_speeds_supported()
1102 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_get_copper_speeds_supported()
1104 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_get_copper_speeds_supported()
1106 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1108 switch (hw->mac.type) { in ixgbe_get_copper_speeds_supported()
1110 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1111 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1115 hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1130 s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, in ixgbe_get_copper_link_capabilities_generic() argument
1137 if (!hw->phy.speeds_supported) in ixgbe_get_copper_link_capabilities_generic()
1138 status = ixgbe_get_copper_speeds_supported(hw); in ixgbe_get_copper_link_capabilities_generic()
1140 *speed = hw->phy.speeds_supported; in ixgbe_get_copper_link_capabilities_generic()
1153 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, in ixgbe_check_phy_link_tnx() argument
1174 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
1203 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) in ixgbe_setup_phy_link_tnx() argument
1209 ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); in ixgbe_setup_phy_link_tnx()
1213 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1218 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
1221 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1228 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1233 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
1236 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1243 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1249 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
1252 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1258 if (ixgbe_check_reset_blocked(hw)) in ixgbe_setup_phy_link_tnx()
1262 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1267 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1276 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) in ixgbe_reset_phy_nl() argument
1286 if (ixgbe_check_reset_blocked(hw)) in ixgbe_reset_phy_nl()
1289 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl()
1292 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1296 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1304 hw_dbg(hw, "PHY reset did not complete.\n"); in ixgbe_reset_phy_nl()
1309 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, in ixgbe_reset_phy_nl()
1314 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
1320 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
1329 hw_dbg(hw, "DELAY: %d MS\n", edata); in ixgbe_reset_phy_nl()
1333 hw_dbg(hw, "DATA:\n"); in ixgbe_reset_phy_nl()
1335 ret_val = hw->eeprom.ops.read(hw, data_offset++, in ixgbe_reset_phy_nl()
1340 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1344 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1346 hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, in ixgbe_reset_phy_nl()
1354 hw_dbg(hw, "CONTROL:\n"); in ixgbe_reset_phy_nl()
1356 hw_dbg(hw, "EOL\n"); in ixgbe_reset_phy_nl()
1359 hw_dbg(hw, "SOL\n"); in ixgbe_reset_phy_nl()
1361 hw_dbg(hw, "Bad control value\n"); in ixgbe_reset_phy_nl()
1366 hw_dbg(hw, "Bad control type\n"); in ixgbe_reset_phy_nl()
1374 hw_err(hw, "eeprom read at offset %d failed\n", data_offset); in ixgbe_reset_phy_nl()
1384 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_module_generic() argument
1386 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1388 return ixgbe_identify_sfp_module_generic(hw); in ixgbe_identify_module_generic()
1390 return ixgbe_identify_qsfp_module_generic(hw); in ixgbe_identify_module_generic()
1392 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1405 s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_sfp_module_generic() argument
1407 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_sfp_module_generic()
1410 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1419 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1420 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1425 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1427 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1435 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1438 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1445 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1451 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1474 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1476 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1478 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1480 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1482 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1485 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1486 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1489 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1492 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1493 hw, IXGBE_SFF_CABLE_SPEC_COMP, in ixgbe_identify_sfp_module_generic()
1497 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1498 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1501 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1504 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1510 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1511 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1514 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1517 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1518 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1521 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1524 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1525 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1528 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1531 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1532 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1535 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1538 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1542 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1543 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1546 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1551 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1554 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1555 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1556 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1563 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1570 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1585 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1590 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1592 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1595 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1598 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1602 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1605 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1608 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1620 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1621 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1622 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1623 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1624 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1625 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1626 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1631 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_identify_sfp_module_generic()
1634 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1636 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1637 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1638 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1639 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1640 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1641 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { in ixgbe_identify_sfp_module_generic()
1643 if (hw->phy.type == ixgbe_phy_sfp_intel) in ixgbe_identify_sfp_module_generic()
1645 if (hw->allow_unsupported_sfp) { in ixgbe_identify_sfp_module_generic()
1649 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_identify_sfp_module_generic()
1650 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1656 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1657 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1658 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1659 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1670 static s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) in ixgbe_identify_qsfp_module_generic() argument
1672 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_qsfp_module_generic()
1675 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1686 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1687 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1692 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1694 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1701 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1705 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1707 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1713 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1720 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1721 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1722 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1724 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1727 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1728 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1730 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1739 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1743 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1747 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1760 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1761 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1762 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1765 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1769 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1774 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1775 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1778 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1783 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1788 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1795 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1802 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1815 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1817 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1819 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1822 if (hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_identify_qsfp_module_generic()
1824 if (hw->allow_unsupported_sfp) { in ixgbe_identify_qsfp_module_generic()
1828 hw_dbg(hw, "QSFP module not supported\n"); in ixgbe_identify_qsfp_module_generic()
1829 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1837 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1838 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1839 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1853 s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, in ixgbe_get_sfp_init_sequence_offsets() argument
1858 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
1860 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
1863 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
1866 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
1867 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
1886 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
1887 hw_err(hw, "eeprom read at %d failed\n", in ixgbe_get_sfp_init_sequence_offsets()
1902 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1908 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
1911 hw_dbg(hw, "SFP+ module not supported\n"); in ixgbe_get_sfp_init_sequence_offsets()
1918 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
1924 hw_dbg(hw, "No matching SFP+ module found\n"); in ixgbe_get_sfp_init_sequence_offsets()
1931 hw_err(hw, "eeprom read at offset %d failed\n", *list_offset); in ixgbe_get_sfp_init_sequence_offsets()
1943 s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_generic() argument
1946 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
1959 s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_generic() argument
1962 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
1975 s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_eeprom_generic() argument
1978 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
1989 static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr) in ixgbe_is_sfp_probe() argument
1993 hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_is_sfp_probe()
2009 static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_int() argument
2015 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic_int()
2018 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_read_i2c_byte_generic_int()
2020 if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) in ixgbe_read_i2c_byte_generic_int()
2026 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic_int()
2029 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2032 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_read_i2c_byte_generic_int()
2036 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2040 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_read_i2c_byte_generic_int()
2044 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2048 ixgbe_i2c_start(hw); in ixgbe_read_i2c_byte_generic_int()
2051 status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); in ixgbe_read_i2c_byte_generic_int()
2055 status = ixgbe_get_i2c_ack(hw); in ixgbe_read_i2c_byte_generic_int()
2059 status = ixgbe_clock_in_i2c_byte(hw, data); in ixgbe_read_i2c_byte_generic_int()
2063 status = ixgbe_clock_out_i2c_bit(hw, nack); in ixgbe_read_i2c_byte_generic_int()
2067 ixgbe_i2c_stop(hw); in ixgbe_read_i2c_byte_generic_int()
2069 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2073 ixgbe_i2c_bus_clear(hw); in ixgbe_read_i2c_byte_generic_int()
2075 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2080 hw_dbg(hw, "I2C byte read error - Retrying.\n"); in ixgbe_read_i2c_byte_generic_int()
2082 hw_dbg(hw, "I2C byte read error.\n"); in ixgbe_read_i2c_byte_generic_int()
2099 s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic() argument
2102 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic()
2116 s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_byte_generic_unlocked() argument
2119 return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_read_i2c_byte_generic_unlocked()
2134 static s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_int() argument
2140 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic_int()
2142 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_byte_generic_int()
2146 ixgbe_i2c_start(hw); in ixgbe_write_i2c_byte_generic_int()
2148 status = ixgbe_clock_out_i2c_byte(hw, dev_addr); in ixgbe_write_i2c_byte_generic_int()
2152 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2156 status = ixgbe_clock_out_i2c_byte(hw, byte_offset); in ixgbe_write_i2c_byte_generic_int()
2160 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2164 status = ixgbe_clock_out_i2c_byte(hw, data); in ixgbe_write_i2c_byte_generic_int()
2168 status = ixgbe_get_i2c_ack(hw); in ixgbe_write_i2c_byte_generic_int()
2172 ixgbe_i2c_stop(hw); in ixgbe_write_i2c_byte_generic_int()
2174 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2178 ixgbe_i2c_bus_clear(hw); in ixgbe_write_i2c_byte_generic_int()
2181 hw_dbg(hw, "I2C byte write error - Retrying.\n"); in ixgbe_write_i2c_byte_generic_int()
2183 hw_dbg(hw, "I2C byte write error.\n"); in ixgbe_write_i2c_byte_generic_int()
2187 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2202 s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic() argument
2205 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic()
2219 s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_write_i2c_byte_generic_unlocked() argument
2222 return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, in ixgbe_write_i2c_byte_generic_unlocked()
2233 static void ixgbe_i2c_start(struct ixgbe_hw *hw) in ixgbe_i2c_start() argument
2235 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_start()
2237 i2cctl |= IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_start()
2240 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_start()
2241 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2246 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_start()
2251 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_start()
2266 static void ixgbe_i2c_stop(struct ixgbe_hw *hw) in ixgbe_i2c_stop() argument
2268 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_stop()
2269 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_i2c_stop()
2270 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_i2c_stop()
2271 u32 bb_en_bit = IXGBE_I2C_BB_EN(hw); in ixgbe_i2c_stop()
2274 ixgbe_set_i2c_data(hw, &i2cctl, 0); in ixgbe_i2c_stop()
2275 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_stop()
2280 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_stop()
2288 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_i2c_stop()
2289 IXGBE_WRITE_FLUSH(hw); in ixgbe_i2c_stop()
2300 static s32 ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) in ixgbe_clock_in_i2c_byte() argument
2307 ixgbe_clock_in_i2c_bit(hw, &bit); in ixgbe_clock_in_i2c_byte()
2321 static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) in ixgbe_clock_out_i2c_byte() argument
2330 status = ixgbe_clock_out_i2c_bit(hw, bit); in ixgbe_clock_out_i2c_byte()
2337 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_byte()
2338 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_out_i2c_byte()
2339 i2cctl |= IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_out_i2c_byte()
2340 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2341 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_out_i2c_byte()
2352 static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) in ixgbe_get_i2c_ack() argument
2354 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_ack()
2357 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2362 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_get_i2c_ack()
2364 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_get_i2c_ack()
2365 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_ack()
2367 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2375 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_get_i2c_ack()
2376 ack = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_get_i2c_ack()
2384 hw_dbg(hw, "I2C ack was not received.\n"); in ixgbe_get_i2c_ack()
2388 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_get_i2c_ack()
2403 static s32 ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) in ixgbe_clock_in_i2c_bit() argument
2405 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2406 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_clock_in_i2c_bit()
2409 i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_clock_in_i2c_bit()
2411 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2412 IXGBE_WRITE_FLUSH(hw); in ixgbe_clock_in_i2c_bit()
2414 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2419 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_in_i2c_bit()
2420 *data = ixgbe_get_i2c_data(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2422 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_in_i2c_bit()
2437 static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) in ixgbe_clock_out_i2c_bit() argument
2440 u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_clock_out_i2c_bit()
2442 status = ixgbe_set_i2c_data(hw, &i2cctl, data); in ixgbe_clock_out_i2c_bit()
2444 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2449 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_clock_out_i2c_bit()
2456 hw_dbg(hw, "I2C data was not set to %X\n", data); in ixgbe_clock_out_i2c_bit()
2470 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_raise_i2c_clk() argument
2472 u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_raise_i2c_clk()
2479 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2483 *i2cctl |= IXGBE_I2C_CLK_OUT(hw); in ixgbe_raise_i2c_clk()
2484 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_raise_i2c_clk()
2485 IXGBE_WRITE_FLUSH(hw); in ixgbe_raise_i2c_clk()
2489 i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_raise_i2c_clk()
2490 if (i2cctl_r & IXGBE_I2C_CLK_IN(hw)) in ixgbe_raise_i2c_clk()
2503 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_lower_i2c_clk() argument
2506 *i2cctl &= ~IXGBE_I2C_CLK_OUT(hw); in ixgbe_lower_i2c_clk()
2507 *i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN(hw); in ixgbe_lower_i2c_clk()
2509 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_lower_i2c_clk()
2510 IXGBE_WRITE_FLUSH(hw); in ixgbe_lower_i2c_clk()
2525 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) in ixgbe_set_i2c_data() argument
2527 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_set_i2c_data()
2530 *i2cctl |= IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2532 *i2cctl &= ~IXGBE_I2C_DATA_OUT(hw); in ixgbe_set_i2c_data()
2535 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2536 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2545 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_set_i2c_data()
2546 IXGBE_WRITE_FLUSH(hw); in ixgbe_set_i2c_data()
2550 *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_set_i2c_data()
2551 if (data != ixgbe_get_i2c_data(hw, i2cctl)) { in ixgbe_set_i2c_data()
2552 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); in ixgbe_set_i2c_data()
2567 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) in ixgbe_get_i2c_data() argument
2569 u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN(hw); in ixgbe_get_i2c_data()
2573 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL(hw), *i2cctl); in ixgbe_get_i2c_data()
2574 IXGBE_WRITE_FLUSH(hw); in ixgbe_get_i2c_data()
2578 if (*i2cctl & IXGBE_I2C_DATA_IN(hw)) in ixgbe_get_i2c_data()
2590 static void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) in ixgbe_i2c_bus_clear() argument
2595 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2596 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL(hw)); in ixgbe_i2c_bus_clear()
2598 ixgbe_set_i2c_data(hw, &i2cctl, 1); in ixgbe_i2c_bus_clear()
2601 ixgbe_raise_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2606 ixgbe_lower_i2c_clk(hw, &i2cctl); in ixgbe_i2c_bus_clear()
2612 ixgbe_i2c_start(hw); in ixgbe_i2c_bus_clear()
2615 ixgbe_i2c_stop(hw); in ixgbe_i2c_bus_clear()
2626 bool ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) in ixgbe_tn_check_overtemp() argument
2631 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2635 status = hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()
2647 s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on) in ixgbe_set_copper_phy_power() argument
2653 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_set_copper_phy_power()
2656 if (!on && ixgbe_mng_present(hw)) in ixgbe_set_copper_phy_power()
2659 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®); in ixgbe_set_copper_phy_power()
2666 if (ixgbe_check_reset_blocked(hw)) in ixgbe_set_copper_phy_power()
2671 status = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg); in ixgbe_set_copper_phy_power()