Lines Matching refs:pmu
44 #define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
98 struct pmu pmu; member
116 struct ddr_pmu *pmu = dev_get_drvdata(dev); in ddr_perf_identifier_show() local
118 return sysfs_emit(page, "%s\n", pmu->devtype_data->identifier); in ddr_perf_identifier_show()
126 struct ddr_pmu *pmu = dev_get_drvdata(dev); in ddr_perf_identifier_attr_visible() local
128 if (!pmu->devtype_data->identifier) in ddr_perf_identifier_attr_visible()
152 static u32 ddr_perf_filter_cap_get(struct ddr_pmu *pmu, int cap) in ddr_perf_filter_cap_get() argument
154 u32 quirks = pmu->devtype_data->quirks; in ddr_perf_filter_cap_get()
173 struct ddr_pmu *pmu = dev_get_drvdata(dev); in ddr_perf_filter_cap_show() local
178 return sysfs_emit(buf, "%u\n", ddr_perf_filter_cap_get(pmu, cap)); in ddr_perf_filter_cap_show()
203 struct ddr_pmu *pmu = dev_get_drvdata(dev); in ddr_perf_cpumask_show() local
205 return cpumap_print_to_pagebuf(true, buf, cpumask_of(pmu->cpu)); in ddr_perf_cpumask_show()
322 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_is_enhanced_filtered() local
324 filt = pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED; in ddr_perf_is_enhanced_filtered()
329 static u32 ddr_perf_alloc_counter(struct ddr_pmu *pmu, int event) in ddr_perf_alloc_counter() argument
339 if (pmu->events[EVENT_CYCLES_COUNTER] == NULL) in ddr_perf_alloc_counter()
346 if (pmu->events[i] == NULL) in ddr_perf_alloc_counter()
353 static void ddr_perf_free_counter(struct ddr_pmu *pmu, int counter) in ddr_perf_free_counter() argument
355 pmu->events[counter] = NULL; in ddr_perf_free_counter()
358 static u32 ddr_perf_read_counter(struct ddr_pmu *pmu, int counter) in ddr_perf_read_counter() argument
360 struct perf_event *event = pmu->events[counter]; in ddr_perf_read_counter()
361 void __iomem *base = pmu->base; in ddr_perf_read_counter()
375 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_event_init() local
379 if (event->attr.type != event->pmu->type) in ddr_perf_event_init()
386 dev_warn(pmu->dev, "Can't provide per-task data!\n"); in ddr_perf_event_init()
395 if (event->group_leader->pmu != event->pmu && in ddr_perf_event_init()
399 if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER) { in ddr_perf_event_init()
409 if (sibling->pmu != event->pmu && in ddr_perf_event_init()
414 event->cpu = pmu->cpu; in ddr_perf_event_init()
420 static void ddr_perf_counter_enable(struct ddr_pmu *pmu, int config, in ddr_perf_counter_enable() argument
433 writel(0, pmu->base + reg); in ddr_perf_counter_enable()
442 if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED) { in ddr_perf_counter_enable()
447 writel(val, pmu->base + reg); in ddr_perf_counter_enable()
450 val = readl_relaxed(pmu->base + reg) & CNTL_EN_MASK; in ddr_perf_counter_enable()
451 writel(val, pmu->base + reg); in ddr_perf_counter_enable()
455 static bool ddr_perf_counter_overflow(struct ddr_pmu *pmu, int counter) in ddr_perf_counter_overflow() argument
459 val = readl_relaxed(pmu->base + counter * 4 + COUNTER_CNTL); in ddr_perf_counter_overflow()
464 static void ddr_perf_counter_clear(struct ddr_pmu *pmu, int counter) in ddr_perf_counter_clear() argument
469 val = readl_relaxed(pmu->base + reg); in ddr_perf_counter_clear()
471 writel(val, pmu->base + reg); in ddr_perf_counter_clear()
474 writel(val, pmu->base + reg); in ddr_perf_counter_clear()
479 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_event_update() local
485 new_raw_count = ddr_perf_read_counter(pmu, counter); in ddr_perf_event_update()
487 if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER_ENHANCED) { in ddr_perf_event_update()
501 ret = ddr_perf_counter_overflow(pmu, counter); in ddr_perf_event_update()
503 dev_warn_ratelimited(pmu->dev, "events lost due to counter overflow (config 0x%llx)\n", in ddr_perf_event_update()
508 ddr_perf_counter_clear(pmu, counter); in ddr_perf_event_update()
513 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_event_start() local
519 ddr_perf_counter_enable(pmu, event->attr.config, counter, true); in ddr_perf_event_start()
521 if (!pmu->active_counter++) in ddr_perf_event_start()
522 ddr_perf_counter_enable(pmu, EVENT_CYCLES_ID, in ddr_perf_event_start()
530 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_event_add() local
536 if (pmu->devtype_data->quirks & DDR_CAP_AXI_ID_FILTER) { in ddr_perf_event_add()
540 if (pmu->events[i] && in ddr_perf_event_add()
541 !ddr_perf_filters_compatible(event, pmu->events[i])) in ddr_perf_event_add()
548 writel(cfg1, pmu->base + COUNTER_DPCR1); in ddr_perf_event_add()
552 counter = ddr_perf_alloc_counter(pmu, cfg); in ddr_perf_event_add()
554 dev_dbg(pmu->dev, "There are not enough counters\n"); in ddr_perf_event_add()
558 pmu->events[counter] = event; in ddr_perf_event_add()
559 pmu->active_events++; in ddr_perf_event_add()
572 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_event_stop() local
576 ddr_perf_counter_enable(pmu, event->attr.config, counter, false); in ddr_perf_event_stop()
579 if (!--pmu->active_counter) in ddr_perf_event_stop()
580 ddr_perf_counter_enable(pmu, EVENT_CYCLES_ID, in ddr_perf_event_stop()
588 struct ddr_pmu *pmu = to_ddr_pmu(event->pmu); in ddr_perf_event_del() local
594 ddr_perf_free_counter(pmu, counter); in ddr_perf_event_del()
595 pmu->active_events--; in ddr_perf_event_del()
599 static void ddr_perf_pmu_enable(struct pmu *pmu) in ddr_perf_pmu_enable() argument
603 static void ddr_perf_pmu_disable(struct pmu *pmu) in ddr_perf_pmu_disable() argument
607 static int ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base, in ddr_perf_init() argument
610 *pmu = (struct ddr_pmu) { in ddr_perf_init()
611 .pmu = (struct pmu) { in ddr_perf_init()
629 pmu->id = ida_simple_get(&ddr_ida, 0, 0, GFP_KERNEL); in ddr_perf_init()
630 return pmu->id; in ddr_perf_init()
636 struct ddr_pmu *pmu = (struct ddr_pmu *) p; in ddr_perf_irq_handler() local
640 ddr_perf_counter_enable(pmu, in ddr_perf_irq_handler()
658 if (!pmu->events[i]) in ddr_perf_irq_handler()
661 event = pmu->events[i]; in ddr_perf_irq_handler()
666 ddr_perf_counter_enable(pmu, in ddr_perf_irq_handler()
676 struct ddr_pmu *pmu = hlist_entry_safe(node, struct ddr_pmu, node); in ddr_perf_offline_cpu() local
679 if (cpu != pmu->cpu) in ddr_perf_offline_cpu()
686 perf_pmu_migrate_context(&pmu->pmu, cpu, target); in ddr_perf_offline_cpu()
687 pmu->cpu = target; in ddr_perf_offline_cpu()
689 WARN_ON(irq_set_affinity(pmu->irq, cpumask_of(pmu->cpu))); in ddr_perf_offline_cpu()
696 struct ddr_pmu *pmu; in ddr_perf_probe() local
710 pmu = devm_kzalloc(&pdev->dev, sizeof(*pmu), GFP_KERNEL); in ddr_perf_probe()
711 if (!pmu) in ddr_perf_probe()
714 num = ddr_perf_init(pmu, base, &pdev->dev); in ddr_perf_probe()
716 platform_set_drvdata(pdev, pmu); in ddr_perf_probe()
725 pmu->devtype_data = of_device_get_match_data(&pdev->dev); in ddr_perf_probe()
727 pmu->cpu = raw_smp_processor_id(); in ddr_perf_probe()
738 pmu->cpuhp_state = ret; in ddr_perf_probe()
741 ret = cpuhp_state_add_instance_nocalls(pmu->cpuhp_state, &pmu->node); in ddr_perf_probe()
759 pmu); in ddr_perf_probe()
765 pmu->irq = irq; in ddr_perf_probe()
766 ret = irq_set_affinity(pmu->irq, cpumask_of(pmu->cpu)); in ddr_perf_probe()
768 dev_err(pmu->dev, "Failed to set interrupt affinity!\n"); in ddr_perf_probe()
772 ret = perf_pmu_register(&pmu->pmu, name, -1); in ddr_perf_probe()
779 cpuhp_state_remove_instance_nocalls(pmu->cpuhp_state, &pmu->node); in ddr_perf_probe()
781 cpuhp_remove_multi_state(pmu->cpuhp_state); in ddr_perf_probe()
783 ida_simple_remove(&ddr_ida, pmu->id); in ddr_perf_probe()
790 struct ddr_pmu *pmu = platform_get_drvdata(pdev); in ddr_perf_remove() local
792 cpuhp_state_remove_instance_nocalls(pmu->cpuhp_state, &pmu->node); in ddr_perf_remove()
793 cpuhp_remove_multi_state(pmu->cpuhp_state); in ddr_perf_remove()
795 perf_pmu_unregister(&pmu->pmu); in ddr_perf_remove()
797 ida_simple_remove(&ddr_ida, pmu->id); in ddr_perf_remove()