3288 	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
3305 	wrt_reg_dword(&reg->ctrl_status,  in qla24xx_reset_risc()
3365 	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);  in qla24xx_reset_risc()
3368 	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);  in qla24xx_reset_risc()
3371 	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET);  in qla24xx_reset_risc()
3417 	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);  in qla25xx_read_risc_sema_reg()
3426 	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);  in qla25xx_write_risc_sema_reg()
3427 	wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);  in qla25xx_write_risc_sema_reg()
3443 	wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);  in qla25xx_manipulate_risc_semaphore()
4708 		wrt_reg_dword(&reg->isp25mq.req_q_in, 0);  in qla24xx_config_rings()
4709 		wrt_reg_dword(&reg->isp25mq.req_q_out, 0);  in qla24xx_config_rings()
4710 		wrt_reg_dword(&reg->isp25mq.rsp_q_in, 0);  in qla24xx_config_rings()
4711 		wrt_reg_dword(&reg->isp25mq.rsp_q_out, 0);  in qla24xx_config_rings()
4713 		wrt_reg_dword(&reg->isp24.req_q_in, 0);  in qla24xx_config_rings()
4714 		wrt_reg_dword(&reg->isp24.req_q_out, 0);  in qla24xx_config_rings()
4715 		wrt_reg_dword(&reg->isp24.rsp_q_in, 0);  in qla24xx_config_rings()
4716 		wrt_reg_dword(&reg->isp24.rsp_q_out, 0);  in qla24xx_config_rings()
7893 	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);  in qla24xx_reset_adapter()
7895 	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);  in qla24xx_reset_adapter()