1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12
13 #include "qla_devtbl.h"
14
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18
19 #include "qla_target.h"
20
21 /*
22 * QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
38 struct event_arg *ea);
39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
40 struct event_arg *);
41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
qla2x00_sp_timeout(struct timer_list * t)46 qla2x00_sp_timeout(struct timer_list *t)
47 {
48 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
49 struct srb_iocb *iocb;
50 scsi_qla_host_t *vha = sp->vha;
51
52 WARN_ON(irqs_disabled());
53 iocb = &sp->u.iocb_cmd;
54 iocb->timeout(sp);
55
56 /* ref: TMR */
57 kref_put(&sp->cmd_kref, qla2x00_sp_release);
58
59 if (vha && qla2x00_isp_reg_stat(vha->hw)) {
60 ql_log(ql_log_info, vha, 0x9008,
61 "PCI/Register disconnect.\n");
62 qla_pci_set_eeh_busy(vha);
63 }
64 }
65
qla2x00_sp_free(srb_t * sp)66 void qla2x00_sp_free(srb_t *sp)
67 {
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69
70 del_timer(&iocb->timer);
71 qla2x00_rel_sp(sp);
72 }
73
qla2xxx_rel_done_warning(srb_t * sp,int res)74 void qla2xxx_rel_done_warning(srb_t *sp, int res)
75 {
76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
77 }
78
qla2xxx_rel_free_warning(srb_t * sp)79 void qla2xxx_rel_free_warning(srb_t *sp)
80 {
81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
82 }
83
84 /* Asynchronous Login/Logout Routines -------------------------------------- */
85
86 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)87 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
88 {
89 unsigned long tmo;
90 struct qla_hw_data *ha = vha->hw;
91
92 /* Firmware should use switch negotiated r_a_tov for timeout. */
93 tmo = ha->r_a_tov / 10 * 2;
94 if (IS_QLAFX00(ha)) {
95 tmo = FX00_DEF_RATOV * 2;
96 } else if (!IS_FWI2_CAPABLE(ha)) {
97 /*
98 * Except for earlier ISPs where the timeout is seeded from the
99 * initialization control block.
100 */
101 tmo = ha->login_timeout;
102 }
103 return tmo;
104 }
105
qla24xx_abort_iocb_timeout(void * data)106 static void qla24xx_abort_iocb_timeout(void *data)
107 {
108 srb_t *sp = data;
109 struct srb_iocb *abt = &sp->u.iocb_cmd;
110 struct qla_qpair *qpair = sp->qpair;
111 u32 handle;
112 unsigned long flags;
113 int sp_found = 0, cmdsp_found = 0;
114
115 if (sp->cmd_sp)
116 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
117 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
118 sp->cmd_sp->handle, sp->cmd_sp->type,
119 sp->handle, sp->type);
120 else
121 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
122 "Abort timeout 2 - hdl=%x, type=%x\n",
123 sp->handle, sp->type);
124
125 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
126 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
127 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
128 sp->cmd_sp)) {
129 qpair->req->outstanding_cmds[handle] = NULL;
130 cmdsp_found = 1;
131 qla_put_fw_resources(qpair, &sp->cmd_sp->iores);
132 }
133
134 /* removing the abort */
135 if (qpair->req->outstanding_cmds[handle] == sp) {
136 qpair->req->outstanding_cmds[handle] = NULL;
137 sp_found = 1;
138 qla_put_fw_resources(qpair, &sp->iores);
139 break;
140 }
141 }
142 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
143
144 if (cmdsp_found && sp->cmd_sp) {
145 /*
146 * This done function should take care of
147 * original command ref: INIT
148 */
149 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
150 }
151
152 if (sp_found) {
153 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
154 sp->done(sp, QLA_OS_TIMER_EXPIRED);
155 }
156 }
157
qla24xx_abort_sp_done(srb_t * sp,int res)158 static void qla24xx_abort_sp_done(srb_t *sp, int res)
159 {
160 struct srb_iocb *abt = &sp->u.iocb_cmd;
161 srb_t *orig_sp = sp->cmd_sp;
162
163 if (orig_sp)
164 qla_wait_nvme_release_cmd_kref(orig_sp);
165
166 if (sp->flags & SRB_WAKEUP_ON_COMP)
167 complete(&abt->u.abt.comp);
168 else
169 /* ref: INIT */
170 kref_put(&sp->cmd_kref, qla2x00_sp_release);
171 }
172
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)173 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
174 {
175 scsi_qla_host_t *vha = cmd_sp->vha;
176 struct srb_iocb *abt_iocb;
177 srb_t *sp;
178 int rval = QLA_FUNCTION_FAILED;
179
180 /* ref: INIT for ABTS command */
181 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
182 GFP_ATOMIC);
183 if (!sp)
184 return QLA_MEMORY_ALLOC_FAILED;
185
186 qla_vha_mark_busy(vha);
187 abt_iocb = &sp->u.iocb_cmd;
188 sp->type = SRB_ABT_CMD;
189 sp->name = "abort";
190 sp->qpair = cmd_sp->qpair;
191 sp->cmd_sp = cmd_sp;
192 if (wait)
193 sp->flags = SRB_WAKEUP_ON_COMP;
194
195 init_completion(&abt_iocb->u.abt.comp);
196 /* FW can send 2 x ABTS's timeout/20s */
197 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done);
198 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout;
199
200 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
201 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
202
203 ql_dbg(ql_dbg_async, vha, 0x507c,
204 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
205 cmd_sp->type);
206
207 rval = qla2x00_start_sp(sp);
208 if (rval != QLA_SUCCESS) {
209 /* ref: INIT */
210 kref_put(&sp->cmd_kref, qla2x00_sp_release);
211 return rval;
212 }
213
214 if (wait) {
215 wait_for_completion(&abt_iocb->u.abt.comp);
216 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
217 QLA_SUCCESS : QLA_ERR_FROM_FW;
218 /* ref: INIT */
219 kref_put(&sp->cmd_kref, qla2x00_sp_release);
220 }
221
222 return rval;
223 }
224
225 void
qla2x00_async_iocb_timeout(void * data)226 qla2x00_async_iocb_timeout(void *data)
227 {
228 srb_t *sp = data;
229 fc_port_t *fcport = sp->fcport;
230 struct srb_iocb *lio = &sp->u.iocb_cmd;
231 int rc, h;
232 unsigned long flags;
233
234 if (fcport) {
235 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
236 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
237 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
238
239 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
240 } else {
241 pr_info("Async-%s timeout - hdl=%x.\n",
242 sp->name, sp->handle);
243 }
244
245 switch (sp->type) {
246 case SRB_LOGIN_CMD:
247 rc = qla24xx_async_abort_cmd(sp, false);
248 if (rc) {
249 /* Retry as needed. */
250 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
251 lio->u.logio.data[1] =
252 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
253 QLA_LOGIO_LOGIN_RETRIED : 0;
254 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
255 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
256 h++) {
257 if (sp->qpair->req->outstanding_cmds[h] ==
258 sp) {
259 sp->qpair->req->outstanding_cmds[h] =
260 NULL;
261 break;
262 }
263 }
264 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
265 sp->done(sp, QLA_FUNCTION_TIMEOUT);
266 }
267 break;
268 case SRB_LOGOUT_CMD:
269 case SRB_CT_PTHRU_CMD:
270 case SRB_MB_IOCB:
271 case SRB_NACK_PLOGI:
272 case SRB_NACK_PRLI:
273 case SRB_NACK_LOGO:
274 case SRB_CTRL_VP:
275 default:
276 rc = qla24xx_async_abort_cmd(sp, false);
277 if (rc) {
278 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
279 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
280 h++) {
281 if (sp->qpair->req->outstanding_cmds[h] ==
282 sp) {
283 sp->qpair->req->outstanding_cmds[h] =
284 NULL;
285 break;
286 }
287 }
288 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
289 sp->done(sp, QLA_FUNCTION_TIMEOUT);
290 }
291 break;
292 }
293 }
294
qla2x00_async_login_sp_done(srb_t * sp,int res)295 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
296 {
297 struct scsi_qla_host *vha = sp->vha;
298 struct srb_iocb *lio = &sp->u.iocb_cmd;
299 struct event_arg ea;
300
301 ql_dbg(ql_dbg_disc, vha, 0x20dd,
302 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
303
304 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
305
306 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
307 memset(&ea, 0, sizeof(ea));
308 ea.fcport = sp->fcport;
309 ea.data[0] = lio->u.logio.data[0];
310 ea.data[1] = lio->u.logio.data[1];
311 ea.iop[0] = lio->u.logio.iop[0];
312 ea.iop[1] = lio->u.logio.iop[1];
313 ea.sp = sp;
314 if (res)
315 ea.data[0] = MBS_COMMAND_ERROR;
316 qla24xx_handle_plogi_done_event(vha, &ea);
317 }
318
319 /* ref: INIT */
320 kref_put(&sp->cmd_kref, qla2x00_sp_release);
321 }
322
323 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)324 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
325 uint16_t *data)
326 {
327 srb_t *sp;
328 struct srb_iocb *lio;
329 int rval = QLA_FUNCTION_FAILED;
330
331 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
332 fcport->loop_id == FC_NO_LOOP_ID) {
333 ql_log(ql_log_warn, vha, 0xffff,
334 "%s: %8phC - not sending command.\n",
335 __func__, fcport->port_name);
336 return rval;
337 }
338
339 /* ref: INIT */
340 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
341 if (!sp)
342 goto done;
343
344 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
345 fcport->flags |= FCF_ASYNC_SENT;
346 fcport->logout_completed = 0;
347
348 sp->type = SRB_LOGIN_CMD;
349 sp->name = "login";
350 sp->gen1 = fcport->rscn_gen;
351 sp->gen2 = fcport->login_gen;
352 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
353 qla2x00_async_login_sp_done);
354
355 lio = &sp->u.iocb_cmd;
356 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
357 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
358 } else {
359 if (vha->hw->flags.edif_enabled &&
360 DBELL_ACTIVE(vha)) {
361 lio->u.logio.flags |=
362 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
363 ql_dbg(ql_dbg_disc, vha, 0x2072,
364 "Async-login: w/ FCSP %8phC hdl=%x, loopid=%x portid=%06x\n",
365 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24);
366 } else {
367 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
368 }
369 }
370
371 if (NVME_TARGET(vha->hw, fcport))
372 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
373
374 ql_dbg(ql_dbg_disc, vha, 0x2072,
375 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n",
376 fcport->port_name, sp->handle, fcport->loop_id,
377 fcport->d_id.b24, fcport->login_retry);
378
379 rval = qla2x00_start_sp(sp);
380 if (rval != QLA_SUCCESS) {
381 fcport->flags |= FCF_LOGIN_NEEDED;
382 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
383 goto done_free_sp;
384 }
385
386 return rval;
387
388 done_free_sp:
389 /* ref: INIT */
390 kref_put(&sp->cmd_kref, qla2x00_sp_release);
391 fcport->flags &= ~FCF_ASYNC_SENT;
392 done:
393 fcport->flags &= ~FCF_ASYNC_ACTIVE;
394 return rval;
395 }
396
qla2x00_async_logout_sp_done(srb_t * sp,int res)397 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
398 {
399 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
400 sp->fcport->login_gen++;
401 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
402 /* ref: INIT */
403 kref_put(&sp->cmd_kref, qla2x00_sp_release);
404 }
405
406 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)407 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
408 {
409 srb_t *sp;
410 int rval = QLA_FUNCTION_FAILED;
411
412 fcport->flags |= FCF_ASYNC_SENT;
413 /* ref: INIT */
414 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
415 if (!sp)
416 goto done;
417
418 sp->type = SRB_LOGOUT_CMD;
419 sp->name = "logout";
420 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
421 qla2x00_async_logout_sp_done),
422
423 ql_dbg(ql_dbg_disc, vha, 0x2070,
424 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
425 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
426 fcport->d_id.b.area, fcport->d_id.b.al_pa,
427 fcport->port_name, fcport->explicit_logout);
428
429 rval = qla2x00_start_sp(sp);
430 if (rval != QLA_SUCCESS)
431 goto done_free_sp;
432 return rval;
433
434 done_free_sp:
435 /* ref: INIT */
436 kref_put(&sp->cmd_kref, qla2x00_sp_release);
437 done:
438 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
439 return rval;
440 }
441
442 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)443 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
444 uint16_t *data)
445 {
446 fcport->flags &= ~FCF_ASYNC_ACTIVE;
447 /* Don't re-login in target mode */
448 if (!fcport->tgt_session)
449 qla2x00_mark_device_lost(vha, fcport, 1);
450 qlt_logo_completion_handler(fcport, data[0]);
451 }
452
qla2x00_async_prlo_sp_done(srb_t * sp,int res)453 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
454 {
455 struct srb_iocb *lio = &sp->u.iocb_cmd;
456 struct scsi_qla_host *vha = sp->vha;
457
458 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
459 if (!test_bit(UNLOADING, &vha->dpc_flags))
460 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
461 lio->u.logio.data);
462 /* ref: INIT */
463 kref_put(&sp->cmd_kref, qla2x00_sp_release);
464 }
465
466 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)467 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
468 {
469 srb_t *sp;
470 int rval;
471
472 rval = QLA_FUNCTION_FAILED;
473 /* ref: INIT */
474 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
475 if (!sp)
476 goto done;
477
478 sp->type = SRB_PRLO_CMD;
479 sp->name = "prlo";
480 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
481 qla2x00_async_prlo_sp_done);
482
483 ql_dbg(ql_dbg_disc, vha, 0x2070,
484 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
485 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
486 fcport->d_id.b.area, fcport->d_id.b.al_pa);
487
488 rval = qla2x00_start_sp(sp);
489 if (rval != QLA_SUCCESS)
490 goto done_free_sp;
491
492 return rval;
493
494 done_free_sp:
495 /* ref: INIT */
496 kref_put(&sp->cmd_kref, qla2x00_sp_release);
497 done:
498 fcport->flags &= ~FCF_ASYNC_ACTIVE;
499 return rval;
500 }
501
502 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)503 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
504 {
505 struct fc_port *fcport = ea->fcport;
506 unsigned long flags;
507
508 ql_dbg(ql_dbg_disc, vha, 0x20d2,
509 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
510 __func__, fcport->port_name, fcport->disc_state,
511 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
512 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
513
514 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
515 ea->data[0]);
516
517 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
518 ql_dbg(ql_dbg_disc, vha, 0x2066,
519 "%s %8phC: adisc fail: post delete\n",
520 __func__, ea->fcport->port_name);
521
522 spin_lock_irqsave(&vha->work_lock, flags);
523 /* deleted = 0 & logout_on_delete = force fw cleanup */
524 if (fcport->deleted == QLA_SESS_DELETED)
525 fcport->deleted = 0;
526
527 fcport->logout_on_delete = 1;
528 spin_unlock_irqrestore(&vha->work_lock, flags);
529
530 qlt_schedule_sess_for_deletion(ea->fcport);
531 return;
532 }
533
534 if (ea->fcport->disc_state == DSC_DELETE_PEND)
535 return;
536
537 if (ea->sp->gen2 != ea->fcport->login_gen) {
538 /* target side must have changed it. */
539 ql_dbg(ql_dbg_disc, vha, 0x20d3,
540 "%s %8phC generation changed\n",
541 __func__, ea->fcport->port_name);
542 return;
543 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
544 qla_rscn_replay(fcport);
545 qlt_schedule_sess_for_deletion(fcport);
546 return;
547 }
548
549 __qla24xx_handle_gpdb_event(vha, ea);
550 }
551
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)552 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
553 {
554 struct qla_work_evt *e;
555
556 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
557 if (!e)
558 return QLA_FUNCTION_FAILED;
559
560 e->u.fcport.fcport = fcport;
561 fcport->flags |= FCF_ASYNC_ACTIVE;
562 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
563 return qla2x00_post_work(vha, e);
564 }
565
qla2x00_async_adisc_sp_done(srb_t * sp,int res)566 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
567 {
568 struct scsi_qla_host *vha = sp->vha;
569 struct event_arg ea;
570 struct srb_iocb *lio = &sp->u.iocb_cmd;
571
572 ql_dbg(ql_dbg_disc, vha, 0x2066,
573 "Async done-%s res %x %8phC\n",
574 sp->name, res, sp->fcport->port_name);
575
576 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
577
578 memset(&ea, 0, sizeof(ea));
579 ea.rc = res;
580 ea.data[0] = lio->u.logio.data[0];
581 ea.data[1] = lio->u.logio.data[1];
582 ea.iop[0] = lio->u.logio.iop[0];
583 ea.iop[1] = lio->u.logio.iop[1];
584 ea.fcport = sp->fcport;
585 ea.sp = sp;
586 if (res)
587 ea.data[0] = MBS_COMMAND_ERROR;
588
589 qla24xx_handle_adisc_event(vha, &ea);
590 /* ref: INIT */
591 kref_put(&sp->cmd_kref, qla2x00_sp_release);
592 }
593
594 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)595 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
596 uint16_t *data)
597 {
598 srb_t *sp;
599 struct srb_iocb *lio;
600 int rval = QLA_FUNCTION_FAILED;
601
602 if (IS_SESSION_DELETED(fcport)) {
603 ql_log(ql_log_warn, vha, 0xffff,
604 "%s: %8phC is being delete - not sending command.\n",
605 __func__, fcport->port_name);
606 fcport->flags &= ~FCF_ASYNC_ACTIVE;
607 return rval;
608 }
609
610 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
611 return rval;
612
613 fcport->flags |= FCF_ASYNC_SENT;
614 /* ref: INIT */
615 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
616 if (!sp)
617 goto done;
618
619 sp->type = SRB_ADISC_CMD;
620 sp->name = "adisc";
621 sp->gen1 = fcport->rscn_gen;
622 sp->gen2 = fcport->login_gen;
623 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
624 qla2x00_async_adisc_sp_done);
625
626 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) {
627 lio = &sp->u.iocb_cmd;
628 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
629 }
630
631 ql_dbg(ql_dbg_disc, vha, 0x206f,
632 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
633 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
634
635 rval = qla2x00_start_sp(sp);
636 if (rval != QLA_SUCCESS)
637 goto done_free_sp;
638
639 return rval;
640
641 done_free_sp:
642 /* ref: INIT */
643 kref_put(&sp->cmd_kref, qla2x00_sp_release);
644 done:
645 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
646 qla2x00_post_async_adisc_work(vha, fcport, data);
647 return rval;
648 }
649
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)650 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
651 {
652 struct qla_hw_data *ha = vha->hw;
653
654 if (IS_FWI2_CAPABLE(ha))
655 return loop_id > NPH_LAST_HANDLE;
656
657 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
658 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
659 }
660
661 /**
662 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
663 * @vha: adapter state pointer.
664 * @dev: port structure pointer.
665 *
666 * Returns:
667 * qla2x00 local function return status code.
668 *
669 * Context:
670 * Kernel context.
671 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)672 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
673 {
674 int rval;
675 struct qla_hw_data *ha = vha->hw;
676 unsigned long flags = 0;
677
678 rval = QLA_SUCCESS;
679
680 spin_lock_irqsave(&ha->vport_slock, flags);
681
682 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
683 if (dev->loop_id >= LOOPID_MAP_SIZE ||
684 qla2x00_is_reserved_id(vha, dev->loop_id)) {
685 dev->loop_id = FC_NO_LOOP_ID;
686 rval = QLA_FUNCTION_FAILED;
687 } else {
688 set_bit(dev->loop_id, ha->loop_id_map);
689 }
690 spin_unlock_irqrestore(&ha->vport_slock, flags);
691
692 if (rval == QLA_SUCCESS)
693 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
694 "Assigning new loopid=%x, portid=%x.\n",
695 dev->loop_id, dev->d_id.b24);
696 else
697 ql_log(ql_log_warn, dev->vha, 0x2087,
698 "No loop_id's available, portid=%x.\n",
699 dev->d_id.b24);
700
701 return rval;
702 }
703
qla2x00_clear_loop_id(fc_port_t * fcport)704 void qla2x00_clear_loop_id(fc_port_t *fcport)
705 {
706 struct qla_hw_data *ha = fcport->vha->hw;
707
708 if (fcport->loop_id == FC_NO_LOOP_ID ||
709 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
710 return;
711
712 clear_bit(fcport->loop_id, ha->loop_id_map);
713 fcport->loop_id = FC_NO_LOOP_ID;
714 }
715
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)716 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
717 struct event_arg *ea)
718 {
719 fc_port_t *fcport, *conflict_fcport;
720 struct get_name_list_extended *e;
721 u16 i, n, found = 0, loop_id;
722 port_id_t id;
723 u64 wwn;
724 u16 data[2];
725 u8 current_login_state, nvme_cls;
726
727 fcport = ea->fcport;
728 ql_dbg(ql_dbg_disc, vha, 0xffff,
729 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
730 __func__, fcport->port_name, fcport->disc_state,
731 fcport->fw_login_state, ea->rc,
732 fcport->login_gen, fcport->last_login_gen,
733 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
734
735 if (fcport->disc_state == DSC_DELETE_PEND)
736 return;
737
738 if (ea->rc) { /* rval */
739 if (fcport->login_retry == 0) {
740 ql_dbg(ql_dbg_disc, vha, 0x20de,
741 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
742 fcport->port_name, fcport->login_retry);
743 }
744 return;
745 }
746
747 if (fcport->last_rscn_gen != fcport->rscn_gen) {
748 qla_rscn_replay(fcport);
749 qlt_schedule_sess_for_deletion(fcport);
750 return;
751 } else if (fcport->last_login_gen != fcport->login_gen) {
752 ql_dbg(ql_dbg_disc, vha, 0x20e0,
753 "%s %8phC login gen changed\n",
754 __func__, fcport->port_name);
755 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
756 return;
757 }
758
759 n = ea->data[0] / sizeof(struct get_name_list_extended);
760
761 ql_dbg(ql_dbg_disc, vha, 0x20e1,
762 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
763 __func__, __LINE__, fcport->port_name, n,
764 fcport->d_id.b.domain, fcport->d_id.b.area,
765 fcport->d_id.b.al_pa, fcport->loop_id);
766
767 for (i = 0; i < n; i++) {
768 e = &vha->gnl.l[i];
769 wwn = wwn_to_u64(e->port_name);
770 id.b.domain = e->port_id[2];
771 id.b.area = e->port_id[1];
772 id.b.al_pa = e->port_id[0];
773 id.b.rsvd_1 = 0;
774
775 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
776 continue;
777
778 if (IS_SW_RESV_ADDR(id))
779 continue;
780
781 found = 1;
782
783 loop_id = le16_to_cpu(e->nport_handle);
784 loop_id = (loop_id & 0x7fff);
785 nvme_cls = e->current_login_state >> 4;
786 current_login_state = e->current_login_state & 0xf;
787
788 if (PRLI_PHASE(nvme_cls)) {
789 current_login_state = nvme_cls;
790 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
791 fcport->fc4_type |= FS_FC4TYPE_NVME;
792 } else if (PRLI_PHASE(current_login_state)) {
793 fcport->fc4_type |= FS_FC4TYPE_FCP;
794 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
795 }
796
797 ql_dbg(ql_dbg_disc, vha, 0x20e2,
798 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
799 __func__, fcport->port_name,
800 e->current_login_state, fcport->fw_login_state,
801 fcport->fc4_type, id.b24, fcport->d_id.b24,
802 loop_id, fcport->loop_id);
803
804 switch (fcport->disc_state) {
805 case DSC_DELETE_PEND:
806 case DSC_DELETED:
807 break;
808 default:
809 if ((id.b24 != fcport->d_id.b24 &&
810 fcport->d_id.b24 &&
811 fcport->loop_id != FC_NO_LOOP_ID) ||
812 (fcport->loop_id != FC_NO_LOOP_ID &&
813 fcport->loop_id != loop_id)) {
814 ql_dbg(ql_dbg_disc, vha, 0x20e3,
815 "%s %d %8phC post del sess\n",
816 __func__, __LINE__, fcport->port_name);
817 if (fcport->n2n_flag)
818 fcport->d_id.b24 = 0;
819 qlt_schedule_sess_for_deletion(fcport);
820 return;
821 }
822 break;
823 }
824
825 fcport->loop_id = loop_id;
826 if (fcport->n2n_flag)
827 fcport->d_id.b24 = id.b24;
828
829 wwn = wwn_to_u64(fcport->port_name);
830 qlt_find_sess_invalidate_other(vha, wwn,
831 id, loop_id, &conflict_fcport);
832
833 if (conflict_fcport) {
834 /*
835 * Another share fcport share the same loop_id &
836 * nport id. Conflict fcport needs to finish
837 * cleanup before this fcport can proceed to login.
838 */
839 conflict_fcport->conflict = fcport;
840 fcport->login_pause = 1;
841 }
842
843 switch (vha->hw->current_topology) {
844 default:
845 switch (current_login_state) {
846 case DSC_LS_PRLI_COMP:
847 ql_dbg(ql_dbg_disc,
848 vha, 0x20e4, "%s %d %8phC post gpdb\n",
849 __func__, __LINE__, fcport->port_name);
850
851 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
852 fcport->port_type = FCT_INITIATOR;
853 else
854 fcport->port_type = FCT_TARGET;
855 data[0] = data[1] = 0;
856 qla2x00_post_async_adisc_work(vha, fcport,
857 data);
858 break;
859 case DSC_LS_PLOGI_COMP:
860 if (vha->hw->flags.edif_enabled) {
861 /* check to see if App support Secure */
862 qla24xx_post_gpdb_work(vha, fcport, 0);
863 break;
864 }
865 fallthrough;
866 case DSC_LS_PORT_UNAVAIL:
867 default:
868 if (fcport->loop_id == FC_NO_LOOP_ID) {
869 qla2x00_find_new_loop_id(vha, fcport);
870 fcport->fw_login_state =
871 DSC_LS_PORT_UNAVAIL;
872 }
873 ql_dbg(ql_dbg_disc, vha, 0x20e5,
874 "%s %d %8phC\n", __func__, __LINE__,
875 fcport->port_name);
876 qla24xx_fcport_handle_login(vha, fcport);
877 break;
878 }
879 break;
880 case ISP_CFG_N:
881 fcport->fw_login_state = current_login_state;
882 fcport->d_id = id;
883 switch (current_login_state) {
884 case DSC_LS_PRLI_PEND:
885 /*
886 * In the middle of PRLI. Let it finish.
887 * Allow relogin code to recheck state again
888 * with GNL. Push disc_state back to DELETED
889 * so GNL can go out again
890 */
891 qla2x00_set_fcport_disc_state(fcport,
892 DSC_DELETED);
893 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
894 break;
895 case DSC_LS_PRLI_COMP:
896 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
897 fcport->port_type = FCT_INITIATOR;
898 else
899 fcport->port_type = FCT_TARGET;
900
901 data[0] = data[1] = 0;
902 qla2x00_post_async_adisc_work(vha, fcport,
903 data);
904 break;
905 case DSC_LS_PLOGI_COMP:
906 if (vha->hw->flags.edif_enabled &&
907 DBELL_ACTIVE(vha)) {
908 /* check to see if App support secure or not */
909 qla24xx_post_gpdb_work(vha, fcport, 0);
910 break;
911 }
912 if (fcport_is_bigger(fcport)) {
913 /* local adapter is smaller */
914 if (fcport->loop_id != FC_NO_LOOP_ID)
915 qla2x00_clear_loop_id(fcport);
916
917 fcport->loop_id = loop_id;
918 qla24xx_fcport_handle_login(vha,
919 fcport);
920 break;
921 }
922 fallthrough;
923 default:
924 if (fcport_is_smaller(fcport)) {
925 /* local adapter is bigger */
926 if (fcport->loop_id != FC_NO_LOOP_ID)
927 qla2x00_clear_loop_id(fcport);
928
929 fcport->loop_id = loop_id;
930 qla24xx_fcport_handle_login(vha,
931 fcport);
932 }
933 break;
934 }
935 break;
936 } /* switch (ha->current_topology) */
937 }
938
939 if (!found) {
940 switch (vha->hw->current_topology) {
941 case ISP_CFG_F:
942 case ISP_CFG_FL:
943 for (i = 0; i < n; i++) {
944 e = &vha->gnl.l[i];
945 id.b.domain = e->port_id[0];
946 id.b.area = e->port_id[1];
947 id.b.al_pa = e->port_id[2];
948 id.b.rsvd_1 = 0;
949 loop_id = le16_to_cpu(e->nport_handle);
950
951 if (fcport->d_id.b24 == id.b24) {
952 conflict_fcport =
953 qla2x00_find_fcport_by_wwpn(vha,
954 e->port_name, 0);
955 if (conflict_fcport) {
956 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
957 vha, 0x20e5,
958 "%s %d %8phC post del sess\n",
959 __func__, __LINE__,
960 conflict_fcport->port_name);
961 qlt_schedule_sess_for_deletion
962 (conflict_fcport);
963 }
964 }
965 /*
966 * FW already picked this loop id for
967 * another fcport
968 */
969 if (fcport->loop_id == loop_id)
970 fcport->loop_id = FC_NO_LOOP_ID;
971 }
972 qla24xx_fcport_handle_login(vha, fcport);
973 break;
974 case ISP_CFG_N:
975 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
976 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
977 if (fcport->n2n_link_reset_cnt < 2) {
978 fcport->n2n_link_reset_cnt++;
979 /*
980 * remote port is not sending PLOGI.
981 * Reset link to kick start his state
982 * machine
983 */
984 set_bit(N2N_LINK_RESET,
985 &vha->dpc_flags);
986 } else {
987 if (fcport->n2n_chip_reset < 1) {
988 ql_log(ql_log_info, vha, 0x705d,
989 "Chip reset to bring laser down");
990 set_bit(ISP_ABORT_NEEDED,
991 &vha->dpc_flags);
992 fcport->n2n_chip_reset++;
993 } else {
994 ql_log(ql_log_info, vha, 0x705d,
995 "Remote port %8ph is not coming back\n",
996 fcport->port_name);
997 fcport->scan_state = 0;
998 }
999 }
1000 qla2xxx_wake_dpc(vha);
1001 } else {
1002 /*
1003 * report port suppose to do PLOGI. Give him
1004 * more time. FW will catch it.
1005 */
1006 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1007 }
1008 break;
1009 case ISP_CFG_NL:
1010 qla24xx_fcport_handle_login(vha, fcport);
1011 break;
1012 default:
1013 break;
1014 }
1015 }
1016 } /* gnl_event */
1017
qla24xx_async_gnl_sp_done(srb_t * sp,int res)1018 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
1019 {
1020 struct scsi_qla_host *vha = sp->vha;
1021 unsigned long flags;
1022 struct fc_port *fcport = NULL, *tf;
1023 u16 i, n = 0, loop_id;
1024 struct event_arg ea;
1025 struct get_name_list_extended *e;
1026 u64 wwn;
1027 struct list_head h;
1028 bool found = false;
1029
1030 ql_dbg(ql_dbg_disc, vha, 0x20e7,
1031 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
1032 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
1033 sp->u.iocb_cmd.u.mbx.in_mb[2]);
1034
1035
1036 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
1037 memset(&ea, 0, sizeof(ea));
1038 ea.sp = sp;
1039 ea.rc = res;
1040
1041 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
1042 sizeof(struct get_name_list_extended)) {
1043 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
1044 sizeof(struct get_name_list_extended);
1045 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1046 }
1047
1048 for (i = 0; i < n; i++) {
1049 e = &vha->gnl.l[i];
1050 loop_id = le16_to_cpu(e->nport_handle);
1051 /* mask out reserve bit */
1052 loop_id = (loop_id & 0x7fff);
1053 set_bit(loop_id, vha->hw->loop_id_map);
1054 wwn = wwn_to_u64(e->port_name);
1055
1056 ql_dbg(ql_dbg_disc, vha, 0x20e8,
1057 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1058 __func__, &wwn, e->port_id[2], e->port_id[1],
1059 e->port_id[0], e->current_login_state, e->last_login_state,
1060 (loop_id & 0x7fff));
1061 }
1062
1063 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1064
1065 INIT_LIST_HEAD(&h);
1066 fcport = tf = NULL;
1067 if (!list_empty(&vha->gnl.fcports))
1068 list_splice_init(&vha->gnl.fcports, &h);
1069 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1070
1071 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1072 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1073 list_del_init(&fcport->gnl_entry);
1074 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1075 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1076 ea.fcport = fcport;
1077
1078 qla24xx_handle_gnl_done_event(vha, &ea);
1079 }
1080
1081 /* create new fcport if fw has knowledge of new sessions */
1082 for (i = 0; i < n; i++) {
1083 port_id_t id;
1084 u64 wwnn;
1085
1086 e = &vha->gnl.l[i];
1087 wwn = wwn_to_u64(e->port_name);
1088
1089 found = false;
1090 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1091 if (!memcmp((u8 *)&wwn, fcport->port_name,
1092 WWN_SIZE)) {
1093 found = true;
1094 break;
1095 }
1096 }
1097
1098 id.b.domain = e->port_id[2];
1099 id.b.area = e->port_id[1];
1100 id.b.al_pa = e->port_id[0];
1101 id.b.rsvd_1 = 0;
1102
1103 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1104 ql_dbg(ql_dbg_disc, vha, 0x2065,
1105 "%s %d %8phC %06x post new sess\n",
1106 __func__, __LINE__, (u8 *)&wwn, id.b24);
1107 wwnn = wwn_to_u64(e->node_name);
1108 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1109 (u8 *)&wwnn, NULL, 0);
1110 }
1111 }
1112
1113 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1114 vha->gnl.sent = 0;
1115 if (!list_empty(&vha->gnl.fcports)) {
1116 /* retrigger gnl */
1117 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1118 gnl_entry) {
1119 list_del_init(&fcport->gnl_entry);
1120 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1121 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1122 break;
1123 }
1124 }
1125 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1126
1127 /* ref: INIT */
1128 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1129 }
1130
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1131 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1132 {
1133 srb_t *sp;
1134 int rval = QLA_FUNCTION_FAILED;
1135 unsigned long flags;
1136 u16 *mb;
1137
1138 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1139 goto done;
1140
1141 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1142 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1143
1144 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1145 fcport->flags |= FCF_ASYNC_SENT;
1146 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1147 fcport->last_rscn_gen = fcport->rscn_gen;
1148 fcport->last_login_gen = fcport->login_gen;
1149
1150 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1151 if (vha->gnl.sent) {
1152 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1153 return QLA_SUCCESS;
1154 }
1155 vha->gnl.sent = 1;
1156 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1157
1158 /* ref: INIT */
1159 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1160 if (!sp)
1161 goto done;
1162
1163 sp->type = SRB_MB_IOCB;
1164 sp->name = "gnlist";
1165 sp->gen1 = fcport->rscn_gen;
1166 sp->gen2 = fcport->login_gen;
1167 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1168 qla24xx_async_gnl_sp_done);
1169
1170 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1171 mb[0] = MBC_PORT_NODE_NAME_LIST;
1172 mb[1] = BIT_2 | BIT_3;
1173 mb[2] = MSW(vha->gnl.ldma);
1174 mb[3] = LSW(vha->gnl.ldma);
1175 mb[6] = MSW(MSD(vha->gnl.ldma));
1176 mb[7] = LSW(MSD(vha->gnl.ldma));
1177 mb[8] = vha->gnl.size;
1178 mb[9] = vha->vp_idx;
1179
1180 ql_dbg(ql_dbg_disc, vha, 0x20da,
1181 "Async-%s - OUT WWPN %8phC hndl %x\n",
1182 sp->name, fcport->port_name, sp->handle);
1183
1184 rval = qla2x00_start_sp(sp);
1185 if (rval != QLA_SUCCESS)
1186 goto done_free_sp;
1187
1188 return rval;
1189
1190 done_free_sp:
1191 /* ref: INIT */
1192 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1193 fcport->flags &= ~(FCF_ASYNC_SENT);
1194 done:
1195 fcport->flags &= ~(FCF_ASYNC_ACTIVE);
1196 return rval;
1197 }
1198
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1199 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1200 {
1201 struct qla_work_evt *e;
1202
1203 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1204 if (!e)
1205 return QLA_FUNCTION_FAILED;
1206
1207 e->u.fcport.fcport = fcport;
1208 fcport->flags |= FCF_ASYNC_ACTIVE;
1209 return qla2x00_post_work(vha, e);
1210 }
1211
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1212 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1213 {
1214 struct scsi_qla_host *vha = sp->vha;
1215 struct qla_hw_data *ha = vha->hw;
1216 fc_port_t *fcport = sp->fcport;
1217 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1218 struct event_arg ea;
1219
1220 ql_dbg(ql_dbg_disc, vha, 0x20db,
1221 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1222 sp->name, res, fcport->port_name, mb[1], mb[2]);
1223
1224 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1225
1226 if (res == QLA_FUNCTION_TIMEOUT)
1227 goto done;
1228
1229 memset(&ea, 0, sizeof(ea));
1230 ea.fcport = fcport;
1231 ea.sp = sp;
1232
1233 qla24xx_handle_gpdb_event(vha, &ea);
1234
1235 done:
1236 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1237 sp->u.iocb_cmd.u.mbx.in_dma);
1238
1239 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1240 }
1241
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1242 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1243 {
1244 struct qla_work_evt *e;
1245
1246 if (vha->host->active_mode == MODE_TARGET)
1247 return QLA_FUNCTION_FAILED;
1248
1249 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1250 if (!e)
1251 return QLA_FUNCTION_FAILED;
1252
1253 e->u.fcport.fcport = fcport;
1254
1255 return qla2x00_post_work(vha, e);
1256 }
1257
qla2x00_async_prli_sp_done(srb_t * sp,int res)1258 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1259 {
1260 struct scsi_qla_host *vha = sp->vha;
1261 struct srb_iocb *lio = &sp->u.iocb_cmd;
1262 struct event_arg ea;
1263
1264 ql_dbg(ql_dbg_disc, vha, 0x2129,
1265 "%s %8phC res %x\n", __func__,
1266 sp->fcport->port_name, res);
1267
1268 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1269
1270 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1271 memset(&ea, 0, sizeof(ea));
1272 ea.fcport = sp->fcport;
1273 ea.data[0] = lio->u.logio.data[0];
1274 ea.data[1] = lio->u.logio.data[1];
1275 ea.iop[0] = lio->u.logio.iop[0];
1276 ea.iop[1] = lio->u.logio.iop[1];
1277 ea.sp = sp;
1278 if (res == QLA_OS_TIMER_EXPIRED)
1279 ea.data[0] = QLA_OS_TIMER_EXPIRED;
1280 else if (res)
1281 ea.data[0] = MBS_COMMAND_ERROR;
1282
1283 qla24xx_handle_prli_done_event(vha, &ea);
1284 }
1285
1286 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1287 }
1288
1289 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1290 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1291 {
1292 srb_t *sp;
1293 struct srb_iocb *lio;
1294 int rval = QLA_FUNCTION_FAILED;
1295
1296 if (!vha->flags.online) {
1297 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1298 __func__, __LINE__, fcport->port_name);
1299 return rval;
1300 }
1301
1302 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1303 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1304 qla_dual_mode_enabled(vha)) {
1305 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1306 __func__, __LINE__, fcport->port_name);
1307 return rval;
1308 }
1309
1310 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1311 if (!sp)
1312 return rval;
1313
1314 fcport->flags |= FCF_ASYNC_SENT;
1315 fcport->logout_completed = 0;
1316
1317 sp->type = SRB_PRLI_CMD;
1318 sp->name = "prli";
1319 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1320 qla2x00_async_prli_sp_done);
1321
1322 lio = &sp->u.iocb_cmd;
1323 lio->u.logio.flags = 0;
1324
1325 if (NVME_TARGET(vha->hw, fcport))
1326 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1327
1328 ql_dbg(ql_dbg_disc, vha, 0x211b,
1329 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1330 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1331 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1332 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1333
1334 rval = qla2x00_start_sp(sp);
1335 if (rval != QLA_SUCCESS) {
1336 fcport->flags |= FCF_LOGIN_NEEDED;
1337 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1338 goto done_free_sp;
1339 }
1340
1341 return rval;
1342
1343 done_free_sp:
1344 /* ref: INIT */
1345 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1346 fcport->flags &= ~FCF_ASYNC_SENT;
1347 return rval;
1348 }
1349
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1350 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1351 {
1352 struct qla_work_evt *e;
1353
1354 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1355 if (!e)
1356 return QLA_FUNCTION_FAILED;
1357
1358 e->u.fcport.fcport = fcport;
1359 e->u.fcport.opt = opt;
1360 fcport->flags |= FCF_ASYNC_ACTIVE;
1361 return qla2x00_post_work(vha, e);
1362 }
1363
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1364 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1365 {
1366 srb_t *sp;
1367 struct srb_iocb *mbx;
1368 int rval = QLA_FUNCTION_FAILED;
1369 u16 *mb;
1370 dma_addr_t pd_dma;
1371 struct port_database_24xx *pd;
1372 struct qla_hw_data *ha = vha->hw;
1373
1374 if (IS_SESSION_DELETED(fcport)) {
1375 ql_log(ql_log_warn, vha, 0xffff,
1376 "%s: %8phC is being delete - not sending command.\n",
1377 __func__, fcport->port_name);
1378 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1379 return rval;
1380 }
1381
1382 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
1383 ql_log(ql_log_warn, vha, 0xffff,
1384 "%s: %8phC online %d flags %x - not sending command.\n",
1385 __func__, fcport->port_name, vha->flags.online, fcport->flags);
1386 goto done;
1387 }
1388
1389 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1390 if (!sp)
1391 goto done;
1392
1393 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1394
1395 fcport->flags |= FCF_ASYNC_SENT;
1396 sp->type = SRB_MB_IOCB;
1397 sp->name = "gpdb";
1398 sp->gen1 = fcport->rscn_gen;
1399 sp->gen2 = fcport->login_gen;
1400 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1401 qla24xx_async_gpdb_sp_done);
1402
1403 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1404 if (pd == NULL) {
1405 ql_log(ql_log_warn, vha, 0xd043,
1406 "Failed to allocate port database structure.\n");
1407 goto done_free_sp;
1408 }
1409
1410 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1411 mb[0] = MBC_GET_PORT_DATABASE;
1412 mb[1] = fcport->loop_id;
1413 mb[2] = MSW(pd_dma);
1414 mb[3] = LSW(pd_dma);
1415 mb[6] = MSW(MSD(pd_dma));
1416 mb[7] = LSW(MSD(pd_dma));
1417 mb[9] = vha->vp_idx;
1418 mb[10] = opt;
1419
1420 mbx = &sp->u.iocb_cmd;
1421 mbx->u.mbx.in = (void *)pd;
1422 mbx->u.mbx.in_dma = pd_dma;
1423
1424 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1425 "Async-%s %8phC hndl %x opt %x\n",
1426 sp->name, fcport->port_name, sp->handle, opt);
1427
1428 rval = qla2x00_start_sp(sp);
1429 if (rval != QLA_SUCCESS)
1430 goto done_free_sp;
1431 return rval;
1432
1433 done_free_sp:
1434 if (pd)
1435 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1436
1437 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1438 fcport->flags &= ~FCF_ASYNC_SENT;
1439 done:
1440 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1441 qla24xx_post_gpdb_work(vha, fcport, opt);
1442 return rval;
1443 }
1444
1445 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1446 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1447 {
1448 unsigned long flags;
1449
1450 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1451 ea->fcport->login_gen++;
1452 ea->fcport->logout_on_delete = 1;
1453
1454 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1455 vha->fcport_count++;
1456 ea->fcport->login_succ = 1;
1457
1458 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1459 qla24xx_sched_upd_fcport(ea->fcport);
1460 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1461 } else if (ea->fcport->login_succ) {
1462 /*
1463 * We have an existing session. A late RSCN delivery
1464 * must have triggered the session to be re-validate.
1465 * Session is still valid.
1466 */
1467 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1468 "%s %d %8phC session revalidate success\n",
1469 __func__, __LINE__, ea->fcport->port_name);
1470 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1471 }
1472 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1473 }
1474
qla_chk_secure_login(scsi_qla_host_t * vha,fc_port_t * fcport,struct port_database_24xx * pd)1475 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1476 struct port_database_24xx *pd)
1477 {
1478 int rc = 0;
1479
1480 if (pd->secure_login) {
1481 ql_dbg(ql_dbg_disc, vha, 0x104d,
1482 "Secure Login established on %8phC\n",
1483 fcport->port_name);
1484 fcport->flags |= FCF_FCSP_DEVICE;
1485 } else {
1486 ql_dbg(ql_dbg_disc, vha, 0x104d,
1487 "non-Secure Login %8phC",
1488 fcport->port_name);
1489 fcport->flags &= ~FCF_FCSP_DEVICE;
1490 }
1491 if (vha->hw->flags.edif_enabled) {
1492 if (fcport->flags & FCF_FCSP_DEVICE) {
1493 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND);
1494 /* Start edif prli timer & ring doorbell for app */
1495 fcport->edif.rx_sa_set = 0;
1496 fcport->edif.tx_sa_set = 0;
1497 fcport->edif.rx_sa_pending = 0;
1498 fcport->edif.tx_sa_pending = 0;
1499
1500 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
1501 fcport->d_id.b24);
1502
1503 if (DBELL_ACTIVE(vha)) {
1504 ql_dbg(ql_dbg_disc, vha, 0x20ef,
1505 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
1506 __func__, __LINE__, fcport->port_name);
1507 fcport->edif.app_started = 1;
1508 fcport->edif.app_sess_online = 1;
1509
1510 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
1511 fcport->d_id.b24, 0, fcport);
1512 }
1513
1514 rc = 1;
1515 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
1516 ql_dbg(ql_dbg_disc, vha, 0x2117,
1517 "%s %d %8phC post prli\n",
1518 __func__, __LINE__, fcport->port_name);
1519 qla24xx_post_prli_work(vha, fcport);
1520 rc = 1;
1521 }
1522 }
1523 return rc;
1524 }
1525
1526 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1527 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1528 {
1529 fc_port_t *fcport = ea->fcport;
1530 struct port_database_24xx *pd;
1531 struct srb *sp = ea->sp;
1532 uint8_t ls;
1533
1534 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1535
1536 fcport->flags &= ~FCF_ASYNC_SENT;
1537
1538 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1539 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
1540 fcport->port_name, fcport->disc_state, pd->current_login_state,
1541 fcport->fc4_type, ea->rc);
1542
1543 if (fcport->disc_state == DSC_DELETE_PEND) {
1544 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n",
1545 __func__, __LINE__, fcport->port_name);
1546 return;
1547 }
1548
1549 if (NVME_TARGET(vha->hw, fcport))
1550 ls = pd->current_login_state >> 4;
1551 else
1552 ls = pd->current_login_state & 0xf;
1553
1554 if (ea->sp->gen2 != fcport->login_gen) {
1555 /* target side must have changed it. */
1556
1557 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1558 "%s %8phC generation changed\n",
1559 __func__, fcport->port_name);
1560 return;
1561 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1562 qla_rscn_replay(fcport);
1563 qlt_schedule_sess_for_deletion(fcport);
1564 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1565 __func__, __LINE__, fcport->port_name, ls);
1566 return;
1567 }
1568
1569 switch (ls) {
1570 case PDS_PRLI_COMPLETE:
1571 __qla24xx_parse_gpdb(vha, fcport, pd);
1572 break;
1573 case PDS_PLOGI_COMPLETE:
1574 if (qla_chk_secure_login(vha, fcport, pd)) {
1575 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1576 __func__, __LINE__, fcport->port_name, ls);
1577 return;
1578 }
1579 fallthrough;
1580 case PDS_PLOGI_PENDING:
1581 case PDS_PRLI_PENDING:
1582 case PDS_PRLI2_PENDING:
1583 /* Set discovery state back to GNL to Relogin attempt */
1584 if (qla_dual_mode_enabled(vha) ||
1585 qla_ini_mode_enabled(vha)) {
1586 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1587 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1588 }
1589 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1590 __func__, __LINE__, fcport->port_name, ls);
1591 return;
1592 case PDS_LOGO_PENDING:
1593 case PDS_PORT_UNAVAILABLE:
1594 default:
1595 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1596 __func__, __LINE__, fcport->port_name);
1597 qlt_schedule_sess_for_deletion(fcport);
1598 return;
1599 }
1600 __qla24xx_handle_gpdb_event(vha, ea);
1601 } /* gpdb event */
1602
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1603 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1604 {
1605 u8 login = 0;
1606 int rc;
1607
1608 ql_dbg(ql_dbg_disc, vha, 0x307b,
1609 "%s %8phC DS %d LS %d lid %d retries=%d\n",
1610 __func__, fcport->port_name, fcport->disc_state,
1611 fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1612
1613 if (qla_tgt_mode_enabled(vha))
1614 return;
1615
1616 if (qla_dual_mode_enabled(vha)) {
1617 if (N2N_TOPO(vha->hw)) {
1618 u64 mywwn, wwn;
1619
1620 mywwn = wwn_to_u64(vha->port_name);
1621 wwn = wwn_to_u64(fcport->port_name);
1622 if (mywwn > wwn)
1623 login = 1;
1624 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1625 && time_after_eq(jiffies,
1626 fcport->plogi_nack_done_deadline))
1627 login = 1;
1628 } else {
1629 login = 1;
1630 }
1631 } else {
1632 /* initiator mode */
1633 login = 1;
1634 }
1635
1636 if (login && fcport->login_retry) {
1637 fcport->login_retry--;
1638 if (fcport->loop_id == FC_NO_LOOP_ID) {
1639 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1640 rc = qla2x00_find_new_loop_id(vha, fcport);
1641 if (rc) {
1642 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1643 "%s %d %8phC post del sess - out of loopid\n",
1644 __func__, __LINE__, fcport->port_name);
1645 fcport->scan_state = 0;
1646 qlt_schedule_sess_for_deletion(fcport);
1647 return;
1648 }
1649 }
1650 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1651 "%s %d %8phC post login\n",
1652 __func__, __LINE__, fcport->port_name);
1653 qla2x00_post_async_login_work(vha, fcport, NULL);
1654 }
1655 }
1656
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1657 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1658 {
1659 u16 data[2];
1660 u64 wwn;
1661 u16 sec;
1662
1663 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1664 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
1665 __func__, fcport->port_name, fcport->disc_state,
1666 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1667 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1668 fcport->login_gen, fcport->loop_id, fcport->scan_state,
1669 fcport->fc4_type);
1670
1671 if (fcport->scan_state != QLA_FCPORT_FOUND ||
1672 fcport->disc_state == DSC_DELETE_PEND)
1673 return 0;
1674
1675 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1676 qla_dual_mode_enabled(vha) &&
1677 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1678 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1679 return 0;
1680
1681 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1682 !N2N_TOPO(vha->hw)) {
1683 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1684 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1685 return 0;
1686 }
1687 }
1688
1689 /* Target won't initiate port login if fabric is present */
1690 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1691 return 0;
1692
1693 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
1694 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1695 return 0;
1696 }
1697
1698 switch (fcport->disc_state) {
1699 case DSC_DELETED:
1700 wwn = wwn_to_u64(fcport->node_name);
1701 switch (vha->hw->current_topology) {
1702 case ISP_CFG_N:
1703 if (fcport_is_smaller(fcport)) {
1704 /* this adapter is bigger */
1705 if (fcport->login_retry) {
1706 if (fcport->loop_id == FC_NO_LOOP_ID) {
1707 qla2x00_find_new_loop_id(vha,
1708 fcport);
1709 fcport->fw_login_state =
1710 DSC_LS_PORT_UNAVAIL;
1711 }
1712 fcport->login_retry--;
1713 qla_post_els_plogi_work(vha, fcport);
1714 } else {
1715 ql_log(ql_log_info, vha, 0x705d,
1716 "Unable to reach remote port %8phC",
1717 fcport->port_name);
1718 }
1719 } else {
1720 qla24xx_post_gnl_work(vha, fcport);
1721 }
1722 break;
1723 default:
1724 if (wwn == 0) {
1725 ql_dbg(ql_dbg_disc, vha, 0xffff,
1726 "%s %d %8phC post GNNID\n",
1727 __func__, __LINE__, fcport->port_name);
1728 qla24xx_post_gnnid_work(vha, fcport);
1729 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1730 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1731 "%s %d %8phC post gnl\n",
1732 __func__, __LINE__, fcport->port_name);
1733 qla24xx_post_gnl_work(vha, fcport);
1734 } else {
1735 qla_chk_n2n_b4_login(vha, fcport);
1736 }
1737 break;
1738 }
1739 break;
1740
1741 case DSC_GNL:
1742 switch (vha->hw->current_topology) {
1743 case ISP_CFG_N:
1744 if ((fcport->current_login_state & 0xf) == 0x6) {
1745 ql_dbg(ql_dbg_disc, vha, 0x2118,
1746 "%s %d %8phC post GPDB work\n",
1747 __func__, __LINE__, fcport->port_name);
1748 fcport->chip_reset =
1749 vha->hw->base_qpair->chip_reset;
1750 qla24xx_post_gpdb_work(vha, fcport, 0);
1751 } else {
1752 ql_dbg(ql_dbg_disc, vha, 0x2118,
1753 "%s %d %8phC post %s PRLI\n",
1754 __func__, __LINE__, fcport->port_name,
1755 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1756 "FC");
1757 qla24xx_post_prli_work(vha, fcport);
1758 }
1759 break;
1760 default:
1761 if (fcport->login_pause) {
1762 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1763 "%s %d %8phC exit\n",
1764 __func__, __LINE__,
1765 fcport->port_name);
1766 fcport->last_rscn_gen = fcport->rscn_gen;
1767 fcport->last_login_gen = fcport->login_gen;
1768 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1769 break;
1770 }
1771 qla_chk_n2n_b4_login(vha, fcport);
1772 break;
1773 }
1774 break;
1775
1776 case DSC_LOGIN_FAILED:
1777 if (N2N_TOPO(vha->hw))
1778 qla_chk_n2n_b4_login(vha, fcport);
1779 else
1780 qlt_schedule_sess_for_deletion(fcport);
1781 break;
1782
1783 case DSC_LOGIN_COMPLETE:
1784 /* recheck login state */
1785 data[0] = data[1] = 0;
1786 qla2x00_post_async_adisc_work(vha, fcport, data);
1787 break;
1788
1789 case DSC_LOGIN_PEND:
1790 if (vha->hw->flags.edif_enabled)
1791 break;
1792
1793 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1794 ql_dbg(ql_dbg_disc, vha, 0x2118,
1795 "%s %d %8phC post %s PRLI\n",
1796 __func__, __LINE__, fcport->port_name,
1797 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC");
1798 qla24xx_post_prli_work(vha, fcport);
1799 }
1800 break;
1801
1802 case DSC_UPD_FCPORT:
1803 sec = jiffies_to_msecs(jiffies -
1804 fcport->jiffies_at_registration)/1000;
1805 if (fcport->sec_since_registration < sec && sec &&
1806 !(sec % 60)) {
1807 fcport->sec_since_registration = sec;
1808 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1809 "%s %8phC - Slow Rport registration(%d Sec)\n",
1810 __func__, fcport->port_name, sec);
1811 }
1812
1813 if (fcport->next_disc_state != DSC_DELETE_PEND)
1814 fcport->next_disc_state = DSC_ADISC;
1815 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1816 break;
1817
1818 default:
1819 break;
1820 }
1821
1822 return 0;
1823 }
1824
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1825 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1826 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1827 {
1828 struct qla_work_evt *e;
1829
1830 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1831 if (!e)
1832 return QLA_FUNCTION_FAILED;
1833
1834 e->u.new_sess.id = *id;
1835 e->u.new_sess.pla = pla;
1836 e->u.new_sess.fc4_type = fc4_type;
1837 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1838 if (node_name)
1839 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1840
1841 return qla2x00_post_work(vha, e);
1842 }
1843
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1844 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1845 {
1846 fc_port_t *fcport;
1847 unsigned long flags;
1848
1849 switch (ea->id.b.rsvd_1) {
1850 case RSCN_PORT_ADDR:
1851 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1852 if (fcport) {
1853 if (fcport->flags & FCF_FCP2_DEVICE &&
1854 atomic_read(&fcport->state) == FCS_ONLINE) {
1855 ql_dbg(ql_dbg_disc, vha, 0x2115,
1856 "Delaying session delete for FCP2 portid=%06x %8phC ",
1857 fcport->d_id.b24, fcport->port_name);
1858 return;
1859 }
1860
1861 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) {
1862 /*
1863 * On ipsec start by remote port, Target port
1864 * may use RSCN to trigger initiator to
1865 * relogin. If driver is already in the
1866 * process of a relogin, then ignore the RSCN
1867 * and allow the current relogin to continue.
1868 * This reduces thrashing of the connection.
1869 */
1870 if (atomic_read(&fcport->state) == FCS_ONLINE) {
1871 /*
1872 * If state = online, then set scan_needed=1 to do relogin.
1873 * Otherwise we're already in the middle of a relogin
1874 */
1875 fcport->scan_needed = 1;
1876 fcport->rscn_gen++;
1877 }
1878 } else {
1879 fcport->scan_needed = 1;
1880 fcport->rscn_gen++;
1881 }
1882 }
1883 break;
1884 case RSCN_AREA_ADDR:
1885 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1886 if (fcport->flags & FCF_FCP2_DEVICE &&
1887 atomic_read(&fcport->state) == FCS_ONLINE)
1888 continue;
1889
1890 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1891 fcport->scan_needed = 1;
1892 fcport->rscn_gen++;
1893 }
1894 }
1895 break;
1896 case RSCN_DOM_ADDR:
1897 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1898 if (fcport->flags & FCF_FCP2_DEVICE &&
1899 atomic_read(&fcport->state) == FCS_ONLINE)
1900 continue;
1901
1902 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1903 fcport->scan_needed = 1;
1904 fcport->rscn_gen++;
1905 }
1906 }
1907 break;
1908 case RSCN_FAB_ADDR:
1909 default:
1910 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1911 if (fcport->flags & FCF_FCP2_DEVICE &&
1912 atomic_read(&fcport->state) == FCS_ONLINE)
1913 continue;
1914
1915 fcport->scan_needed = 1;
1916 fcport->rscn_gen++;
1917 }
1918 break;
1919 }
1920
1921 spin_lock_irqsave(&vha->work_lock, flags);
1922 if (vha->scan.scan_flags == 0) {
1923 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1924 vha->scan.scan_flags |= SF_QUEUED;
1925 schedule_delayed_work(&vha->scan.scan_work, 5);
1926 }
1927 spin_unlock_irqrestore(&vha->work_lock, flags);
1928 }
1929
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1930 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1931 struct event_arg *ea)
1932 {
1933 fc_port_t *fcport = ea->fcport;
1934
1935 if (test_bit(UNLOADING, &vha->dpc_flags))
1936 return;
1937
1938 ql_dbg(ql_dbg_disc, vha, 0x2102,
1939 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1940 __func__, fcport->port_name, fcport->disc_state,
1941 fcport->fw_login_state, fcport->login_pause,
1942 fcport->deleted, fcport->conflict,
1943 fcport->last_rscn_gen, fcport->rscn_gen,
1944 fcport->last_login_gen, fcport->login_gen,
1945 fcport->flags);
1946
1947 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1948 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1949 __func__, __LINE__, fcport->port_name);
1950 qla24xx_post_gnl_work(vha, fcport);
1951 return;
1952 }
1953
1954 qla24xx_fcport_handle_login(vha, fcport);
1955 }
1956
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1957 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1958 struct event_arg *ea)
1959 {
1960 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) &&
1961 vha->hw->flags.edif_enabled) {
1962 /* check to see if App support Secure */
1963 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1964 return;
1965 }
1966
1967 /* for pure Target Mode, PRLI will not be initiated */
1968 if (vha->host->active_mode == MODE_TARGET)
1969 return;
1970
1971 ql_dbg(ql_dbg_disc, vha, 0x2118,
1972 "%s %d %8phC post PRLI\n",
1973 __func__, __LINE__, ea->fcport->port_name);
1974 qla24xx_post_prli_work(vha, ea->fcport);
1975 }
1976
1977 /*
1978 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1979 * to be consumed by the fcport
1980 */
qla_rscn_replay(fc_port_t * fcport)1981 void qla_rscn_replay(fc_port_t *fcport)
1982 {
1983 struct event_arg ea;
1984
1985 switch (fcport->disc_state) {
1986 case DSC_DELETE_PEND:
1987 return;
1988 default:
1989 break;
1990 }
1991
1992 if (fcport->scan_needed) {
1993 memset(&ea, 0, sizeof(ea));
1994 ea.id = fcport->d_id;
1995 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1996 qla2x00_handle_rscn(fcport->vha, &ea);
1997 }
1998 }
1999
2000 static void
qla2x00_tmf_iocb_timeout(void * data)2001 qla2x00_tmf_iocb_timeout(void *data)
2002 {
2003 srb_t *sp = data;
2004 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2005 int rc, h;
2006 unsigned long flags;
2007
2008 if (sp->type == SRB_MARKER)
2009 rc = QLA_FUNCTION_FAILED;
2010 else
2011 rc = qla24xx_async_abort_cmd(sp, false);
2012
2013 if (rc) {
2014 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
2015 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
2016 if (sp->qpair->req->outstanding_cmds[h] == sp) {
2017 sp->qpair->req->outstanding_cmds[h] = NULL;
2018 qla_put_fw_resources(sp->qpair, &sp->iores);
2019 break;
2020 }
2021 }
2022 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
2023 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
2024 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
2025 complete(&tmf->u.tmf.comp);
2026 }
2027 }
2028
qla_marker_sp_done(srb_t * sp,int res)2029 static void qla_marker_sp_done(srb_t *sp, int res)
2030 {
2031 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2032
2033 if (res != QLA_SUCCESS)
2034 ql_dbg(ql_dbg_taskm, sp->vha, 0x8004,
2035 "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n",
2036 sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags,
2037 sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id);
2038
2039 sp->u.iocb_cmd.u.tmf.data = res;
2040 complete(&tmf->u.tmf.comp);
2041 }
2042
2043 #define START_SP_W_RETRIES(_sp, _rval, _chip_gen, _login_gen) \
2044 {\
2045 int cnt = 5; \
2046 do { \
2047 if (_chip_gen != sp->vha->hw->chip_reset || _login_gen != sp->fcport->login_gen) {\
2048 _rval = EINVAL; \
2049 break; \
2050 } \
2051 _rval = qla2x00_start_sp(_sp); \
2052 if (_rval == EAGAIN) \
2053 msleep(1); \
2054 else \
2055 break; \
2056 cnt--; \
2057 } while (cnt); \
2058 }
2059
2060 /**
2061 * qla26xx_marker: send marker IOCB and wait for the completion of it.
2062 * @arg: pointer to argument list.
2063 * It is assume caller will provide an fcport pointer and modifier
2064 */
2065 static int
qla26xx_marker(struct tmf_arg * arg)2066 qla26xx_marker(struct tmf_arg *arg)
2067 {
2068 struct scsi_qla_host *vha = arg->vha;
2069 struct srb_iocb *tm_iocb;
2070 srb_t *sp;
2071 int rval = QLA_FUNCTION_FAILED;
2072 fc_port_t *fcport = arg->fcport;
2073 u32 chip_gen, login_gen;
2074
2075 if (TMF_NOT_READY(arg->fcport)) {
2076 ql_dbg(ql_dbg_taskm, vha, 0x8039,
2077 "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2078 fcport->loop_id, fcport->d_id.b24,
2079 arg->modifier, arg->lun, arg->qpair->id);
2080 return QLA_SUSPENDED;
2081 }
2082
2083 chip_gen = vha->hw->chip_reset;
2084 login_gen = fcport->login_gen;
2085
2086 /* ref: INIT */
2087 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL);
2088 if (!sp)
2089 goto done;
2090
2091 sp->type = SRB_MARKER;
2092 sp->name = "marker";
2093 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), qla_marker_sp_done);
2094 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2095
2096 tm_iocb = &sp->u.iocb_cmd;
2097 init_completion(&tm_iocb->u.tmf.comp);
2098 tm_iocb->u.tmf.modifier = arg->modifier;
2099 tm_iocb->u.tmf.lun = arg->lun;
2100 tm_iocb->u.tmf.loop_id = fcport->loop_id;
2101 tm_iocb->u.tmf.vp_index = vha->vp_idx;
2102
2103 START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2104
2105 ql_dbg(ql_dbg_taskm, vha, 0x8006,
2106 "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2107 sp->handle, fcport->loop_id, fcport->d_id.b24,
2108 arg->modifier, arg->lun, sp->qpair->id, rval);
2109
2110 if (rval != QLA_SUCCESS) {
2111 ql_log(ql_log_warn, vha, 0x8031,
2112 "Marker IOCB send failure (%x).\n", rval);
2113 goto done_free_sp;
2114 }
2115
2116 wait_for_completion(&tm_iocb->u.tmf.comp);
2117 rval = tm_iocb->u.tmf.data;
2118
2119 if (rval != QLA_SUCCESS) {
2120 ql_log(ql_log_warn, vha, 0x8019,
2121 "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2122 sp->handle, fcport->loop_id, fcport->d_id.b24,
2123 arg->modifier, arg->lun, sp->qpair->id, rval);
2124 }
2125
2126 done_free_sp:
2127 /* ref: INIT */
2128 kref_put(&sp->cmd_kref, qla2x00_sp_release);
2129 done:
2130 return rval;
2131 }
2132
qla2x00_tmf_sp_done(srb_t * sp,int res)2133 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
2134 {
2135 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2136
2137 if (res)
2138 tmf->u.tmf.data = res;
2139 complete(&tmf->u.tmf.comp);
2140 }
2141
qla_tmf_wait(struct tmf_arg * arg)2142 static int qla_tmf_wait(struct tmf_arg *arg)
2143 {
2144 /* there are only 2 types of error handling that reaches here, lun or target reset */
2145 if (arg->flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET | TCF_CLEAR_TASK_SET))
2146 return qla2x00_eh_wait_for_pending_commands(arg->vha,
2147 arg->fcport->d_id.b24, arg->lun, WAIT_LUN);
2148 else
2149 return qla2x00_eh_wait_for_pending_commands(arg->vha,
2150 arg->fcport->d_id.b24, arg->lun, WAIT_TARGET);
2151 }
2152
2153 static int
__qla2x00_async_tm_cmd(struct tmf_arg * arg)2154 __qla2x00_async_tm_cmd(struct tmf_arg *arg)
2155 {
2156 struct scsi_qla_host *vha = arg->vha;
2157 struct srb_iocb *tm_iocb;
2158 srb_t *sp;
2159 int rval = QLA_FUNCTION_FAILED;
2160 fc_port_t *fcport = arg->fcport;
2161 u32 chip_gen, login_gen;
2162 u64 jif;
2163
2164 if (TMF_NOT_READY(arg->fcport)) {
2165 ql_dbg(ql_dbg_taskm, vha, 0x8032,
2166 "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2167 fcport->loop_id, fcport->d_id.b24,
2168 arg->modifier, arg->lun, arg->qpair->id);
2169 return QLA_SUSPENDED;
2170 }
2171
2172 chip_gen = vha->hw->chip_reset;
2173 login_gen = fcport->login_gen;
2174
2175 /* ref: INIT */
2176 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL);
2177 if (!sp)
2178 goto done;
2179
2180 qla_vha_mark_busy(vha);
2181 sp->type = SRB_TM_CMD;
2182 sp->name = "tmf";
2183 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha),
2184 qla2x00_tmf_sp_done);
2185 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2186
2187 tm_iocb = &sp->u.iocb_cmd;
2188 init_completion(&tm_iocb->u.tmf.comp);
2189 tm_iocb->u.tmf.flags = arg->flags;
2190 tm_iocb->u.tmf.lun = arg->lun;
2191
2192 START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2193
2194 ql_dbg(ql_dbg_taskm, vha, 0x802f,
2195 "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n",
2196 sp->handle, fcport->loop_id, fcport->d_id.b24,
2197 arg->flags, arg->lun, sp->qpair->id, rval);
2198
2199 if (rval != QLA_SUCCESS)
2200 goto done_free_sp;
2201 wait_for_completion(&tm_iocb->u.tmf.comp);
2202
2203 rval = tm_iocb->u.tmf.data;
2204
2205 if (rval != QLA_SUCCESS) {
2206 ql_log(ql_log_warn, vha, 0x8030,
2207 "TM IOCB failed (%x).\n", rval);
2208 }
2209
2210 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
2211 jif = jiffies;
2212 if (qla_tmf_wait(arg)) {
2213 ql_log(ql_log_info, vha, 0x803e,
2214 "Waited %u ms Nexus=%ld:%06x:%llu.\n",
2215 jiffies_to_msecs(jiffies - jif), vha->host_no,
2216 fcport->d_id.b24, arg->lun);
2217 }
2218
2219 if (chip_gen == vha->hw->chip_reset && login_gen == fcport->login_gen) {
2220 rval = qla26xx_marker(arg);
2221 } else {
2222 ql_log(ql_log_info, vha, 0x803e,
2223 "Skip Marker due to disruption. Nexus=%ld:%06x:%llu.\n",
2224 vha->host_no, fcport->d_id.b24, arg->lun);
2225 rval = QLA_FUNCTION_FAILED;
2226 }
2227 }
2228 if (tm_iocb->u.tmf.data)
2229 rval = tm_iocb->u.tmf.data;
2230
2231 done_free_sp:
2232 /* ref: INIT */
2233 kref_put(&sp->cmd_kref, qla2x00_sp_release);
2234 done:
2235 return rval;
2236 }
2237
qla_put_tmf(struct tmf_arg * arg)2238 static void qla_put_tmf(struct tmf_arg *arg)
2239 {
2240 struct scsi_qla_host *vha = arg->vha;
2241 struct qla_hw_data *ha = vha->hw;
2242 unsigned long flags;
2243
2244 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2245 ha->active_tmf--;
2246 list_del(&arg->tmf_elem);
2247 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2248 }
2249
2250 static
qla_get_tmf(struct tmf_arg * arg)2251 int qla_get_tmf(struct tmf_arg *arg)
2252 {
2253 struct scsi_qla_host *vha = arg->vha;
2254 struct qla_hw_data *ha = vha->hw;
2255 unsigned long flags;
2256 fc_port_t *fcport = arg->fcport;
2257 int rc = 0;
2258 struct tmf_arg *t;
2259
2260 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2261 list_for_each_entry(t, &ha->tmf_active, tmf_elem) {
2262 if (t->fcport == arg->fcport && t->lun == arg->lun) {
2263 /* reject duplicate TMF */
2264 ql_log(ql_log_warn, vha, 0x802c,
2265 "found duplicate TMF. Nexus=%ld:%06x:%llu.\n",
2266 vha->host_no, fcport->d_id.b24, arg->lun);
2267 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2268 return -EINVAL;
2269 }
2270 }
2271
2272 list_add_tail(&arg->tmf_elem, &ha->tmf_pending);
2273 while (ha->active_tmf >= MAX_ACTIVE_TMF) {
2274 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2275
2276 msleep(1);
2277
2278 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2279 if (TMF_NOT_READY(fcport)) {
2280 ql_log(ql_log_warn, vha, 0x802c,
2281 "Unable to acquire TM resource due to disruption.\n");
2282 rc = EIO;
2283 break;
2284 }
2285 if (ha->active_tmf < MAX_ACTIVE_TMF &&
2286 list_is_first(&arg->tmf_elem, &ha->tmf_pending))
2287 break;
2288 }
2289
2290 list_del(&arg->tmf_elem);
2291
2292 if (!rc) {
2293 ha->active_tmf++;
2294 list_add_tail(&arg->tmf_elem, &ha->tmf_active);
2295 }
2296
2297 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2298
2299 return rc;
2300 }
2301
2302 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint64_t lun,uint32_t tag)2303 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun,
2304 uint32_t tag)
2305 {
2306 struct scsi_qla_host *vha = fcport->vha;
2307 struct tmf_arg a;
2308 int rval = QLA_SUCCESS;
2309
2310 if (TMF_NOT_READY(fcport))
2311 return QLA_SUSPENDED;
2312
2313 a.vha = fcport->vha;
2314 a.fcport = fcport;
2315 a.lun = lun;
2316 a.flags = flags;
2317 INIT_LIST_HEAD(&a.tmf_elem);
2318
2319 if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) {
2320 a.modifier = MK_SYNC_ID_LUN;
2321 } else {
2322 a.modifier = MK_SYNC_ID;
2323 }
2324
2325 if (qla_get_tmf(&a))
2326 return QLA_FUNCTION_FAILED;
2327
2328 a.qpair = vha->hw->base_qpair;
2329 rval = __qla2x00_async_tm_cmd(&a);
2330
2331 qla_put_tmf(&a);
2332 return rval;
2333 }
2334
2335 int
qla24xx_async_abort_command(srb_t * sp)2336 qla24xx_async_abort_command(srb_t *sp)
2337 {
2338 unsigned long flags = 0;
2339
2340 uint32_t handle;
2341 fc_port_t *fcport = sp->fcport;
2342 struct qla_qpair *qpair = sp->qpair;
2343 struct scsi_qla_host *vha = fcport->vha;
2344 struct req_que *req = qpair->req;
2345
2346 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
2347 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2348 if (req->outstanding_cmds[handle] == sp)
2349 break;
2350 }
2351 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
2352
2353 if (handle == req->num_outstanding_cmds) {
2354 /* Command not found. */
2355 return QLA_ERR_NOT_FOUND;
2356 }
2357 if (sp->type == SRB_FXIOCB_DCMD)
2358 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
2359 FXDISC_ABORT_IOCTL);
2360
2361 return qla24xx_async_abort_cmd(sp, true);
2362 }
2363
2364 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2365 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2366 {
2367 struct srb *sp;
2368 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2369 ea->data[0]);
2370
2371 switch (ea->data[0]) {
2372 case MBS_COMMAND_COMPLETE:
2373 ql_dbg(ql_dbg_disc, vha, 0x2118,
2374 "%s %d %8phC post gpdb\n",
2375 __func__, __LINE__, ea->fcport->port_name);
2376
2377 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2378 ea->fcport->logout_on_delete = 1;
2379 ea->fcport->nvme_prli_service_param = ea->iop[0];
2380 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
2381 ea->fcport->nvme_first_burst_size =
2382 (ea->iop[1] & 0xffff) * 512;
2383 else
2384 ea->fcport->nvme_first_burst_size = 0;
2385 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2386 break;
2387 default:
2388 sp = ea->sp;
2389 ql_dbg(ql_dbg_disc, vha, 0x2118,
2390 "%s %d %8phC priority %s, fc4type %x prev try %s\n",
2391 __func__, __LINE__, ea->fcport->port_name,
2392 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2393 "FCP" : "NVMe", ea->fcport->fc4_type,
2394 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
2395 "NVME" : "FCP");
2396
2397 if (NVME_FCP_TARGET(ea->fcport)) {
2398 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
2399 ea->fcport->do_prli_nvme = 0;
2400 else
2401 ea->fcport->do_prli_nvme = 1;
2402 } else {
2403 ea->fcport->do_prli_nvme = 0;
2404 }
2405
2406 if (N2N_TOPO(vha->hw)) {
2407 if (ea->fcport->n2n_link_reset_cnt ==
2408 vha->hw->login_retry_count &&
2409 ea->fcport->flags & FCF_FCSP_DEVICE) {
2410 /* remote authentication app just started */
2411 ea->fcport->n2n_link_reset_cnt = 0;
2412 }
2413
2414 if (ea->fcport->n2n_link_reset_cnt <
2415 vha->hw->login_retry_count) {
2416 ea->fcport->n2n_link_reset_cnt++;
2417 vha->relogin_jif = jiffies + 2 * HZ;
2418 /*
2419 * PRLI failed. Reset link to kick start
2420 * state machine
2421 */
2422 set_bit(N2N_LINK_RESET, &vha->dpc_flags);
2423 qla2xxx_wake_dpc(vha);
2424 } else {
2425 ql_log(ql_log_warn, vha, 0x2119,
2426 "%s %d %8phC Unable to reconnect\n",
2427 __func__, __LINE__,
2428 ea->fcport->port_name);
2429 }
2430 } else {
2431 /*
2432 * switch connect. login failed. Take connection down
2433 * and allow relogin to retrigger
2434 */
2435 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2436 ea->fcport->keep_nport_handle = 0;
2437 ea->fcport->logout_on_delete = 1;
2438 qlt_schedule_sess_for_deletion(ea->fcport);
2439 }
2440 break;
2441 }
2442 }
2443
2444 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2445 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2446 {
2447 port_id_t cid; /* conflict Nport id */
2448 u16 lid;
2449 struct fc_port *conflict_fcport;
2450 unsigned long flags;
2451 struct fc_port *fcport = ea->fcport;
2452
2453 ql_dbg(ql_dbg_disc, vha, 0xffff,
2454 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2455 __func__, fcport->port_name, fcport->disc_state,
2456 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2457 ea->sp->gen1, fcport->rscn_gen,
2458 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2459
2460 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2461 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2462 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2463 "%s %d %8phC Remote is trying to login\n",
2464 __func__, __LINE__, fcport->port_name);
2465 return;
2466 }
2467
2468 if ((fcport->disc_state == DSC_DELETE_PEND) ||
2469 (fcport->disc_state == DSC_DELETED)) {
2470 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2471 return;
2472 }
2473
2474 if (ea->sp->gen2 != fcport->login_gen) {
2475 /* target side must have changed it. */
2476 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2477 "%s %8phC generation changed\n",
2478 __func__, fcport->port_name);
2479 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2480 return;
2481 } else if (ea->sp->gen1 != fcport->rscn_gen) {
2482 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2483 "%s %8phC RSCN generation changed\n",
2484 __func__, fcport->port_name);
2485 qla_rscn_replay(fcport);
2486 qlt_schedule_sess_for_deletion(fcport);
2487 return;
2488 }
2489
2490 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2491 ea->data[0]);
2492
2493 switch (ea->data[0]) {
2494 case MBS_COMMAND_COMPLETE:
2495 /*
2496 * Driver must validate login state - If PRLI not complete,
2497 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2498 * requests.
2499 */
2500 if (vha->hw->flags.edif_enabled) {
2501 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2502 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2503 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2504 ea->fcport->logout_on_delete = 1;
2505 ea->fcport->send_els_logo = 0;
2506 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2507 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2508
2509 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2510 } else {
2511 if (NVME_TARGET(vha->hw, fcport)) {
2512 ql_dbg(ql_dbg_disc, vha, 0x2117,
2513 "%s %d %8phC post prli\n",
2514 __func__, __LINE__, fcport->port_name);
2515 qla24xx_post_prli_work(vha, fcport);
2516 } else {
2517 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2518 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2519 __func__, __LINE__, fcport->port_name,
2520 fcport->loop_id, fcport->d_id.b24);
2521
2522 set_bit(fcport->loop_id, vha->hw->loop_id_map);
2523 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2524 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2525 fcport->logout_on_delete = 1;
2526 fcport->send_els_logo = 0;
2527 fcport->fw_login_state = DSC_LS_PRLI_COMP;
2528 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2529
2530 qla24xx_post_gpdb_work(vha, fcport, 0);
2531 }
2532 }
2533 break;
2534 case MBS_COMMAND_ERROR:
2535 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2536 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2537
2538 qlt_schedule_sess_for_deletion(ea->fcport);
2539 break;
2540 case MBS_LOOP_ID_USED:
2541 /* data[1] = IO PARAM 1 = nport ID */
2542 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2543 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2544 cid.b.al_pa = ea->iop[1] & 0xff;
2545 cid.b.rsvd_1 = 0;
2546
2547 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2548 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2549 __func__, __LINE__, ea->fcport->port_name,
2550 ea->fcport->loop_id, cid.b24);
2551
2552 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2553 ea->fcport->loop_id = FC_NO_LOOP_ID;
2554 qla24xx_post_gnl_work(vha, ea->fcport);
2555 break;
2556 case MBS_PORT_ID_USED:
2557 lid = ea->iop[1] & 0xffff;
2558 qlt_find_sess_invalidate_other(vha,
2559 wwn_to_u64(ea->fcport->port_name),
2560 ea->fcport->d_id, lid, &conflict_fcport);
2561
2562 if (conflict_fcport) {
2563 /*
2564 * Another fcport share the same loop_id/nport id.
2565 * Conflict fcport needs to finish cleanup before this
2566 * fcport can proceed to login.
2567 */
2568 conflict_fcport->conflict = ea->fcport;
2569 ea->fcport->login_pause = 1;
2570
2571 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2572 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2573 __func__, __LINE__, ea->fcport->port_name,
2574 ea->fcport->d_id.b24, lid);
2575 } else {
2576 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2577 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2578 __func__, __LINE__, ea->fcport->port_name,
2579 ea->fcport->d_id.b24, lid);
2580
2581 qla2x00_clear_loop_id(ea->fcport);
2582 set_bit(lid, vha->hw->loop_id_map);
2583 ea->fcport->loop_id = lid;
2584 ea->fcport->keep_nport_handle = 0;
2585 ea->fcport->logout_on_delete = 1;
2586 qlt_schedule_sess_for_deletion(ea->fcport);
2587 }
2588 break;
2589 }
2590 return;
2591 }
2592
2593 /****************************************************************************/
2594 /* QLogic ISP2x00 Hardware Support Functions. */
2595 /****************************************************************************/
2596
2597 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2598 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2599 {
2600 int rval = QLA_SUCCESS;
2601 struct qla_hw_data *ha = vha->hw;
2602 uint32_t idc_major_ver, idc_minor_ver;
2603 uint16_t config[4];
2604
2605 qla83xx_idc_lock(vha, 0);
2606
2607 /* SV: TODO: Assign initialization timeout from
2608 * flash-info / other param
2609 */
2610 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2611 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2612
2613 /* Set our fcoe function presence */
2614 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2615 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2616 "Error while setting DRV-Presence.\n");
2617 rval = QLA_FUNCTION_FAILED;
2618 goto exit;
2619 }
2620
2621 /* Decide the reset ownership */
2622 qla83xx_reset_ownership(vha);
2623
2624 /*
2625 * On first protocol driver load:
2626 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2627 * register.
2628 * Others: Check compatibility with current IDC Major version.
2629 */
2630 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2631 if (ha->flags.nic_core_reset_owner) {
2632 /* Set IDC Major version */
2633 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2634 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2635
2636 /* Clearing IDC-Lock-Recovery register */
2637 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2638 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2639 /*
2640 * Clear further IDC participation if we are not compatible with
2641 * the current IDC Major Version.
2642 */
2643 ql_log(ql_log_warn, vha, 0xb07d,
2644 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2645 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2646 __qla83xx_clear_drv_presence(vha);
2647 rval = QLA_FUNCTION_FAILED;
2648 goto exit;
2649 }
2650 /* Each function sets its supported Minor version. */
2651 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2652 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2653 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2654
2655 if (ha->flags.nic_core_reset_owner) {
2656 memset(config, 0, sizeof(config));
2657 if (!qla81xx_get_port_config(vha, config))
2658 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2659 QLA8XXX_DEV_READY);
2660 }
2661
2662 rval = qla83xx_idc_state_handler(vha);
2663
2664 exit:
2665 qla83xx_idc_unlock(vha, 0);
2666
2667 return rval;
2668 }
2669
2670 /*
2671 * qla2x00_initialize_adapter
2672 * Initialize board.
2673 *
2674 * Input:
2675 * ha = adapter block pointer.
2676 *
2677 * Returns:
2678 * 0 = success
2679 */
2680 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2681 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2682 {
2683 int rval;
2684 struct qla_hw_data *ha = vha->hw;
2685 struct req_que *req = ha->req_q_map[0];
2686 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2687
2688 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2689 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2690
2691 /* Clear adapter flags. */
2692 vha->flags.online = 0;
2693 ha->flags.chip_reset_done = 0;
2694 vha->flags.reset_active = 0;
2695 ha->flags.pci_channel_io_perm_failure = 0;
2696 ha->flags.eeh_busy = 0;
2697 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2698 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2699 atomic_set(&vha->loop_state, LOOP_DOWN);
2700 vha->device_flags = DFLG_NO_CABLE;
2701 vha->dpc_flags = 0;
2702 vha->flags.management_server_logged_in = 0;
2703 vha->marker_needed = 0;
2704 ha->isp_abort_cnt = 0;
2705 ha->beacon_blink_led = 0;
2706
2707 set_bit(0, ha->req_qid_map);
2708 set_bit(0, ha->rsp_qid_map);
2709
2710 ql_dbg(ql_dbg_init, vha, 0x0040,
2711 "Configuring PCI space...\n");
2712 rval = ha->isp_ops->pci_config(vha);
2713 if (rval) {
2714 ql_log(ql_log_warn, vha, 0x0044,
2715 "Unable to configure PCI space.\n");
2716 return (rval);
2717 }
2718
2719 ha->isp_ops->reset_chip(vha);
2720
2721 /* Check for secure flash support */
2722 if (IS_QLA28XX(ha)) {
2723 if (rd_reg_word(®->mailbox12) & BIT_0)
2724 ha->flags.secure_adapter = 1;
2725 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2726 (ha->flags.secure_adapter) ? "Yes" : "No");
2727 }
2728
2729
2730 rval = qla2xxx_get_flash_info(vha);
2731 if (rval) {
2732 ql_log(ql_log_fatal, vha, 0x004f,
2733 "Unable to validate FLASH data.\n");
2734 return rval;
2735 }
2736
2737 if (IS_QLA8044(ha)) {
2738 qla8044_read_reset_template(vha);
2739
2740 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2741 * If DONRESET_BIT0 is set, drivers should not set dev_state
2742 * to NEED_RESET. But if NEED_RESET is set, drivers should
2743 * should honor the reset. */
2744 if (ql2xdontresethba == 1)
2745 qla8044_set_idc_dontreset(vha);
2746 }
2747
2748 ha->isp_ops->get_flash_version(vha, req->ring);
2749 ql_dbg(ql_dbg_init, vha, 0x0061,
2750 "Configure NVRAM parameters...\n");
2751
2752 /* Let priority default to FCP, can be overridden by nvram_config */
2753 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2754
2755 ha->isp_ops->nvram_config(vha);
2756
2757 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2758 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2759 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2760
2761 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2762 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2763
2764 if (ha->flags.disable_serdes) {
2765 /* Mask HBA via NVRAM settings? */
2766 ql_log(ql_log_info, vha, 0x0077,
2767 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2768 return QLA_FUNCTION_FAILED;
2769 }
2770
2771 ql_dbg(ql_dbg_init, vha, 0x0078,
2772 "Verifying loaded RISC code...\n");
2773
2774 /* If smartsan enabled then require fdmi and rdp enabled */
2775 if (ql2xsmartsan) {
2776 ql2xfdmienable = 1;
2777 ql2xrdpenable = 1;
2778 }
2779
2780 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2781 rval = ha->isp_ops->chip_diag(vha);
2782 if (rval)
2783 return (rval);
2784 rval = qla2x00_setup_chip(vha);
2785 if (rval)
2786 return (rval);
2787 }
2788
2789 if (IS_QLA84XX(ha)) {
2790 ha->cs84xx = qla84xx_get_chip(vha);
2791 if (!ha->cs84xx) {
2792 ql_log(ql_log_warn, vha, 0x00d0,
2793 "Unable to configure ISP84XX.\n");
2794 return QLA_FUNCTION_FAILED;
2795 }
2796 }
2797
2798 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2799 rval = qla2x00_init_rings(vha);
2800
2801 /* No point in continuing if firmware initialization failed. */
2802 if (rval != QLA_SUCCESS)
2803 return rval;
2804
2805 ha->flags.chip_reset_done = 1;
2806
2807 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2808 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2809 rval = qla84xx_init_chip(vha);
2810 if (rval != QLA_SUCCESS) {
2811 ql_log(ql_log_warn, vha, 0x00d4,
2812 "Unable to initialize ISP84XX.\n");
2813 qla84xx_put_chip(vha);
2814 }
2815 }
2816
2817 /* Load the NIC Core f/w if we are the first protocol driver. */
2818 if (IS_QLA8031(ha)) {
2819 rval = qla83xx_nic_core_fw_load(vha);
2820 if (rval)
2821 ql_log(ql_log_warn, vha, 0x0124,
2822 "Error in initializing NIC Core f/w.\n");
2823 }
2824
2825 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2826 qla24xx_read_fcp_prio_cfg(vha);
2827
2828 if (IS_P3P_TYPE(ha))
2829 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2830 else
2831 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2832
2833 return (rval);
2834 }
2835
2836 /**
2837 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2838 * @vha: HA context
2839 *
2840 * Returns 0 on success.
2841 */
2842 int
qla2100_pci_config(scsi_qla_host_t * vha)2843 qla2100_pci_config(scsi_qla_host_t *vha)
2844 {
2845 uint16_t w;
2846 unsigned long flags;
2847 struct qla_hw_data *ha = vha->hw;
2848 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2849
2850 pci_set_master(ha->pdev);
2851 pci_try_set_mwi(ha->pdev);
2852
2853 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2854 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2855 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2856
2857 pci_disable_rom(ha->pdev);
2858
2859 /* Get PCI bus information. */
2860 spin_lock_irqsave(&ha->hardware_lock, flags);
2861 ha->pci_attr = rd_reg_word(®->ctrl_status);
2862 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2863
2864 return QLA_SUCCESS;
2865 }
2866
2867 /**
2868 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2869 * @vha: HA context
2870 *
2871 * Returns 0 on success.
2872 */
2873 int
qla2300_pci_config(scsi_qla_host_t * vha)2874 qla2300_pci_config(scsi_qla_host_t *vha)
2875 {
2876 uint16_t w;
2877 unsigned long flags = 0;
2878 uint32_t cnt;
2879 struct qla_hw_data *ha = vha->hw;
2880 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2881
2882 pci_set_master(ha->pdev);
2883 pci_try_set_mwi(ha->pdev);
2884
2885 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2886 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2887
2888 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2889 w &= ~PCI_COMMAND_INTX_DISABLE;
2890 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2891
2892 /*
2893 * If this is a 2300 card and not 2312, reset the
2894 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2895 * the 2310 also reports itself as a 2300 so we need to get the
2896 * fb revision level -- a 6 indicates it really is a 2300 and
2897 * not a 2310.
2898 */
2899 if (IS_QLA2300(ha)) {
2900 spin_lock_irqsave(&ha->hardware_lock, flags);
2901
2902 /* Pause RISC. */
2903 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2904 for (cnt = 0; cnt < 30000; cnt++) {
2905 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0)
2906 break;
2907
2908 udelay(10);
2909 }
2910
2911 /* Select FPM registers. */
2912 wrt_reg_word(®->ctrl_status, 0x20);
2913 rd_reg_word(®->ctrl_status);
2914
2915 /* Get the fb rev level */
2916 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2917
2918 if (ha->fb_rev == FPM_2300)
2919 pci_clear_mwi(ha->pdev);
2920
2921 /* Deselect FPM registers. */
2922 wrt_reg_word(®->ctrl_status, 0x0);
2923 rd_reg_word(®->ctrl_status);
2924
2925 /* Release RISC module. */
2926 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2927 for (cnt = 0; cnt < 30000; cnt++) {
2928 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0)
2929 break;
2930
2931 udelay(10);
2932 }
2933
2934 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2935 }
2936
2937 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2938
2939 pci_disable_rom(ha->pdev);
2940
2941 /* Get PCI bus information. */
2942 spin_lock_irqsave(&ha->hardware_lock, flags);
2943 ha->pci_attr = rd_reg_word(®->ctrl_status);
2944 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2945
2946 return QLA_SUCCESS;
2947 }
2948
2949 /**
2950 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2951 * @vha: HA context
2952 *
2953 * Returns 0 on success.
2954 */
2955 int
qla24xx_pci_config(scsi_qla_host_t * vha)2956 qla24xx_pci_config(scsi_qla_host_t *vha)
2957 {
2958 uint16_t w;
2959 unsigned long flags = 0;
2960 struct qla_hw_data *ha = vha->hw;
2961 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2962
2963 pci_set_master(ha->pdev);
2964 pci_try_set_mwi(ha->pdev);
2965
2966 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2967 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2968 w &= ~PCI_COMMAND_INTX_DISABLE;
2969 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2970
2971 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2972
2973 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2974 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2975 pcix_set_mmrbc(ha->pdev, 2048);
2976
2977 /* PCIe -- adjust Maximum Read Request Size (2048). */
2978 if (pci_is_pcie(ha->pdev))
2979 pcie_set_readrq(ha->pdev, 4096);
2980
2981 pci_disable_rom(ha->pdev);
2982
2983 ha->chip_revision = ha->pdev->revision;
2984
2985 /* Get PCI bus information. */
2986 spin_lock_irqsave(&ha->hardware_lock, flags);
2987 ha->pci_attr = rd_reg_dword(®->ctrl_status);
2988 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2989
2990 return QLA_SUCCESS;
2991 }
2992
2993 /**
2994 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2995 * @vha: HA context
2996 *
2997 * Returns 0 on success.
2998 */
2999 int
qla25xx_pci_config(scsi_qla_host_t * vha)3000 qla25xx_pci_config(scsi_qla_host_t *vha)
3001 {
3002 uint16_t w;
3003 struct qla_hw_data *ha = vha->hw;
3004
3005 pci_set_master(ha->pdev);
3006 pci_try_set_mwi(ha->pdev);
3007
3008 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
3009 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3010 w &= ~PCI_COMMAND_INTX_DISABLE;
3011 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
3012
3013 /* PCIe -- adjust Maximum Read Request Size (2048). */
3014 if (pci_is_pcie(ha->pdev))
3015 pcie_set_readrq(ha->pdev, 4096);
3016
3017 pci_disable_rom(ha->pdev);
3018
3019 ha->chip_revision = ha->pdev->revision;
3020
3021 return QLA_SUCCESS;
3022 }
3023
3024 /**
3025 * qla2x00_isp_firmware() - Choose firmware image.
3026 * @vha: HA context
3027 *
3028 * Returns 0 on success.
3029 */
3030 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)3031 qla2x00_isp_firmware(scsi_qla_host_t *vha)
3032 {
3033 int rval;
3034 uint16_t loop_id, topo, sw_cap;
3035 uint8_t domain, area, al_pa;
3036 struct qla_hw_data *ha = vha->hw;
3037
3038 /* Assume loading risc code */
3039 rval = QLA_FUNCTION_FAILED;
3040
3041 if (ha->flags.disable_risc_code_load) {
3042 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
3043
3044 /* Verify checksum of loaded RISC code. */
3045 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
3046 if (rval == QLA_SUCCESS) {
3047 /* And, verify we are not in ROM code. */
3048 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
3049 &area, &domain, &topo, &sw_cap);
3050 }
3051 }
3052
3053 if (rval)
3054 ql_dbg(ql_dbg_init, vha, 0x007a,
3055 "**** Load RISC code ****.\n");
3056
3057 return (rval);
3058 }
3059
3060 /**
3061 * qla2x00_reset_chip() - Reset ISP chip.
3062 * @vha: HA context
3063 *
3064 * Returns 0 on success.
3065 */
3066 int
qla2x00_reset_chip(scsi_qla_host_t * vha)3067 qla2x00_reset_chip(scsi_qla_host_t *vha)
3068 {
3069 unsigned long flags = 0;
3070 struct qla_hw_data *ha = vha->hw;
3071 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3072 uint32_t cnt;
3073 uint16_t cmd;
3074 int rval = QLA_FUNCTION_FAILED;
3075
3076 if (unlikely(pci_channel_offline(ha->pdev)))
3077 return rval;
3078
3079 ha->isp_ops->disable_intrs(ha);
3080
3081 spin_lock_irqsave(&ha->hardware_lock, flags);
3082
3083 /* Turn off master enable */
3084 cmd = 0;
3085 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
3086 cmd &= ~PCI_COMMAND_MASTER;
3087 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
3088
3089 if (!IS_QLA2100(ha)) {
3090 /* Pause RISC. */
3091 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
3092 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
3093 for (cnt = 0; cnt < 30000; cnt++) {
3094 if ((rd_reg_word(®->hccr) &
3095 HCCR_RISC_PAUSE) != 0)
3096 break;
3097 udelay(100);
3098 }
3099 } else {
3100 rd_reg_word(®->hccr); /* PCI Posting. */
3101 udelay(10);
3102 }
3103
3104 /* Select FPM registers. */
3105 wrt_reg_word(®->ctrl_status, 0x20);
3106 rd_reg_word(®->ctrl_status); /* PCI Posting. */
3107
3108 /* FPM Soft Reset. */
3109 wrt_reg_word(®->fpm_diag_config, 0x100);
3110 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
3111
3112 /* Toggle Fpm Reset. */
3113 if (!IS_QLA2200(ha)) {
3114 wrt_reg_word(®->fpm_diag_config, 0x0);
3115 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
3116 }
3117
3118 /* Select frame buffer registers. */
3119 wrt_reg_word(®->ctrl_status, 0x10);
3120 rd_reg_word(®->ctrl_status); /* PCI Posting. */
3121
3122 /* Reset frame buffer FIFOs. */
3123 if (IS_QLA2200(ha)) {
3124 WRT_FB_CMD_REG(ha, reg, 0xa000);
3125 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
3126 } else {
3127 WRT_FB_CMD_REG(ha, reg, 0x00fc);
3128
3129 /* Read back fb_cmd until zero or 3 seconds max */
3130 for (cnt = 0; cnt < 3000; cnt++) {
3131 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
3132 break;
3133 udelay(100);
3134 }
3135 }
3136
3137 /* Select RISC module registers. */
3138 wrt_reg_word(®->ctrl_status, 0);
3139 rd_reg_word(®->ctrl_status); /* PCI Posting. */
3140
3141 /* Reset RISC processor. */
3142 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3143 rd_reg_word(®->hccr); /* PCI Posting. */
3144
3145 /* Release RISC processor. */
3146 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3147 rd_reg_word(®->hccr); /* PCI Posting. */
3148 }
3149
3150 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
3151 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT);
3152
3153 /* Reset ISP chip. */
3154 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3155
3156 /* Wait for RISC to recover from reset. */
3157 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3158 /*
3159 * It is necessary to for a delay here since the card doesn't
3160 * respond to PCI reads during a reset. On some architectures
3161 * this will result in an MCA.
3162 */
3163 udelay(20);
3164 for (cnt = 30000; cnt; cnt--) {
3165 if ((rd_reg_word(®->ctrl_status) &
3166 CSR_ISP_SOFT_RESET) == 0)
3167 break;
3168 udelay(100);
3169 }
3170 } else
3171 udelay(10);
3172
3173 /* Reset RISC processor. */
3174 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3175
3176 wrt_reg_word(®->semaphore, 0);
3177
3178 /* Release RISC processor. */
3179 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3180 rd_reg_word(®->hccr); /* PCI Posting. */
3181
3182 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3183 for (cnt = 0; cnt < 30000; cnt++) {
3184 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
3185 break;
3186
3187 udelay(100);
3188 }
3189 } else
3190 udelay(100);
3191
3192 /* Turn on master enable */
3193 cmd |= PCI_COMMAND_MASTER;
3194 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
3195
3196 /* Disable RISC pause on FPM parity error. */
3197 if (!IS_QLA2100(ha)) {
3198 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
3199 rd_reg_word(®->hccr); /* PCI Posting. */
3200 }
3201
3202 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3203
3204 return QLA_SUCCESS;
3205 }
3206
3207 /**
3208 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
3209 * @vha: HA context
3210 *
3211 * Returns 0 on success.
3212 */
3213 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)3214 qla81xx_reset_mpi(scsi_qla_host_t *vha)
3215 {
3216 uint16_t mb[4] = {0x1010, 0, 1, 0};
3217
3218 if (!IS_QLA81XX(vha->hw))
3219 return QLA_SUCCESS;
3220
3221 return qla81xx_write_mpi_register(vha, mb);
3222 }
3223
3224 static int
qla_chk_risc_recovery(scsi_qla_host_t * vha)3225 qla_chk_risc_recovery(scsi_qla_host_t *vha)
3226 {
3227 struct qla_hw_data *ha = vha->hw;
3228 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3229 __le16 __iomem *mbptr = ®->mailbox0;
3230 int i;
3231 u16 mb[32];
3232 int rc = QLA_SUCCESS;
3233
3234 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3235 return rc;
3236
3237 /* this check is only valid after RISC reset */
3238 mb[0] = rd_reg_word(mbptr);
3239 mbptr++;
3240 if (mb[0] == 0xf) {
3241 rc = QLA_FUNCTION_FAILED;
3242
3243 for (i = 1; i < 32; i++) {
3244 mb[i] = rd_reg_word(mbptr);
3245 mbptr++;
3246 }
3247
3248 ql_log(ql_log_warn, vha, 0x1015,
3249 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3250 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
3251 ql_log(ql_log_warn, vha, 0x1015,
3252 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3253 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
3254 mb[15]);
3255 ql_log(ql_log_warn, vha, 0x1015,
3256 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3257 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
3258 mb[23]);
3259 ql_log(ql_log_warn, vha, 0x1015,
3260 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3261 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
3262 mb[31]);
3263 }
3264 return rc;
3265 }
3266
3267 /**
3268 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
3269 * @vha: HA context
3270 *
3271 * Returns 0 on success.
3272 */
3273 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)3274 qla24xx_reset_risc(scsi_qla_host_t *vha)
3275 {
3276 unsigned long flags = 0;
3277 struct qla_hw_data *ha = vha->hw;
3278 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3279 uint32_t cnt;
3280 uint16_t wd;
3281 static int abts_cnt; /* ISP abort retry counts */
3282 int rval = QLA_SUCCESS;
3283 int print = 1;
3284
3285 spin_lock_irqsave(&ha->hardware_lock, flags);
3286
3287 /* Reset RISC. */
3288 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3289 for (cnt = 0; cnt < 30000; cnt++) {
3290 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
3291 break;
3292
3293 udelay(10);
3294 }
3295
3296 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE))
3297 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
3298
3299 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
3300 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
3301 rd_reg_dword(®->hccr),
3302 rd_reg_dword(®->ctrl_status),
3303 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE));
3304
3305 wrt_reg_dword(®->ctrl_status,
3306 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3307 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
3308
3309 udelay(100);
3310
3311 /* Wait for firmware to complete NVRAM accesses. */
3312 rd_reg_word(®->mailbox0);
3313 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 &&
3314 rval == QLA_SUCCESS; cnt--) {
3315 barrier();
3316 if (cnt)
3317 udelay(5);
3318 else
3319 rval = QLA_FUNCTION_TIMEOUT;
3320 }
3321
3322 if (rval == QLA_SUCCESS)
3323 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
3324
3325 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
3326 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
3327 rd_reg_dword(®->hccr),
3328 rd_reg_word(®->mailbox0));
3329
3330 /* Wait for soft-reset to complete. */
3331 rd_reg_dword(®->ctrl_status);
3332 for (cnt = 0; cnt < 60; cnt++) {
3333 barrier();
3334 if ((rd_reg_dword(®->ctrl_status) &
3335 CSRX_ISP_SOFT_RESET) == 0)
3336 break;
3337
3338 udelay(5);
3339 }
3340 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
3341 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
3342
3343 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
3344 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
3345 rd_reg_dword(®->hccr),
3346 rd_reg_dword(®->ctrl_status));
3347
3348 /* If required, do an MPI FW reset now */
3349 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
3350 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
3351 if (++abts_cnt < 5) {
3352 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3353 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
3354 } else {
3355 /*
3356 * We exhausted the ISP abort retries. We have to
3357 * set the board offline.
3358 */
3359 abts_cnt = 0;
3360 vha->flags.online = 0;
3361 }
3362 }
3363 }
3364
3365 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
3366 rd_reg_dword(®->hccr);
3367
3368 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
3369 rd_reg_dword(®->hccr);
3370
3371 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET);
3372 mdelay(10);
3373 rd_reg_dword(®->hccr);
3374
3375 wd = rd_reg_word(®->mailbox0);
3376 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
3377 barrier();
3378 if (cnt) {
3379 mdelay(1);
3380 if (print && qla_chk_risc_recovery(vha))
3381 print = 0;
3382
3383 wd = rd_reg_word(®->mailbox0);
3384 } else {
3385 rval = QLA_FUNCTION_TIMEOUT;
3386
3387 ql_log(ql_log_warn, vha, 0x015e,
3388 "RISC reset timeout\n");
3389 }
3390 }
3391
3392 if (rval == QLA_SUCCESS)
3393 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
3394
3395 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
3396 "Host Risc 0x%x, mailbox0 0x%x\n",
3397 rd_reg_dword(®->hccr),
3398 rd_reg_word(®->mailbox0));
3399
3400 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3401
3402 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
3403 "Driver in %s mode\n",
3404 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
3405
3406 if (IS_NOPOLLING_TYPE(ha))
3407 ha->isp_ops->enable_intrs(ha);
3408
3409 return rval;
3410 }
3411
3412 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)3413 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
3414 {
3415 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3416
3417 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3418 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
3419 }
3420
3421 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)3422 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
3423 {
3424 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3425
3426 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3427 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
3428 }
3429
3430 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)3431 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
3432 {
3433 uint32_t wd32 = 0;
3434 uint delta_msec = 100;
3435 uint elapsed_msec = 0;
3436 uint timeout_msec;
3437 ulong n;
3438
3439 if (vha->hw->pdev->subsystem_device != 0x0175 &&
3440 vha->hw->pdev->subsystem_device != 0x0240)
3441 return;
3442
3443 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
3444 udelay(100);
3445
3446 attempt:
3447 timeout_msec = TIMEOUT_SEMAPHORE;
3448 n = timeout_msec / delta_msec;
3449 while (n--) {
3450 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3451 qla25xx_read_risc_sema_reg(vha, &wd32);
3452 if (wd32 & RISC_SEMAPHORE)
3453 break;
3454 msleep(delta_msec);
3455 elapsed_msec += delta_msec;
3456 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3457 goto force;
3458 }
3459
3460 if (!(wd32 & RISC_SEMAPHORE))
3461 goto force;
3462
3463 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3464 goto acquired;
3465
3466 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3467 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3468 n = timeout_msec / delta_msec;
3469 while (n--) {
3470 qla25xx_read_risc_sema_reg(vha, &wd32);
3471 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3472 break;
3473 msleep(delta_msec);
3474 elapsed_msec += delta_msec;
3475 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3476 goto force;
3477 }
3478
3479 if (wd32 & RISC_SEMAPHORE_FORCE)
3480 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3481
3482 goto attempt;
3483
3484 force:
3485 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3486
3487 acquired:
3488 return;
3489 }
3490
3491 /**
3492 * qla24xx_reset_chip() - Reset ISP24xx chip.
3493 * @vha: HA context
3494 *
3495 * Returns 0 on success.
3496 */
3497 int
qla24xx_reset_chip(scsi_qla_host_t * vha)3498 qla24xx_reset_chip(scsi_qla_host_t *vha)
3499 {
3500 struct qla_hw_data *ha = vha->hw;
3501 int rval = QLA_FUNCTION_FAILED;
3502
3503 if (pci_channel_offline(ha->pdev) &&
3504 ha->flags.pci_channel_io_perm_failure) {
3505 return rval;
3506 }
3507
3508 ha->isp_ops->disable_intrs(ha);
3509
3510 qla25xx_manipulate_risc_semaphore(vha);
3511
3512 /* Perform RISC reset. */
3513 rval = qla24xx_reset_risc(vha);
3514
3515 return rval;
3516 }
3517
3518 /**
3519 * qla2x00_chip_diag() - Test chip for proper operation.
3520 * @vha: HA context
3521 *
3522 * Returns 0 on success.
3523 */
3524 int
qla2x00_chip_diag(scsi_qla_host_t * vha)3525 qla2x00_chip_diag(scsi_qla_host_t *vha)
3526 {
3527 int rval;
3528 struct qla_hw_data *ha = vha->hw;
3529 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3530 unsigned long flags = 0;
3531 uint16_t data;
3532 uint32_t cnt;
3533 uint16_t mb[5];
3534 struct req_que *req = ha->req_q_map[0];
3535
3536 /* Assume a failed state */
3537 rval = QLA_FUNCTION_FAILED;
3538
3539 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
3540 ®->flash_address);
3541
3542 spin_lock_irqsave(&ha->hardware_lock, flags);
3543
3544 /* Reset ISP chip. */
3545 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3546
3547 /*
3548 * We need to have a delay here since the card will not respond while
3549 * in reset causing an MCA on some architectures.
3550 */
3551 udelay(20);
3552 data = qla2x00_debounce_register(®->ctrl_status);
3553 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3554 udelay(5);
3555 data = rd_reg_word(®->ctrl_status);
3556 barrier();
3557 }
3558
3559 if (!cnt)
3560 goto chip_diag_failed;
3561
3562 ql_dbg(ql_dbg_init, vha, 0x007c,
3563 "Reset register cleared by chip reset.\n");
3564
3565 /* Reset RISC processor. */
3566 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3567 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3568
3569 /* Workaround for QLA2312 PCI parity error */
3570 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3571 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3572 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3573 udelay(5);
3574 data = RD_MAILBOX_REG(ha, reg, 0);
3575 barrier();
3576 }
3577 } else
3578 udelay(10);
3579
3580 if (!cnt)
3581 goto chip_diag_failed;
3582
3583 /* Check product ID of chip */
3584 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3585
3586 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3587 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3588 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3589 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3590 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3591 mb[3] != PROD_ID_3) {
3592 ql_log(ql_log_warn, vha, 0x0062,
3593 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3594 mb[1], mb[2], mb[3]);
3595
3596 goto chip_diag_failed;
3597 }
3598 ha->product_id[0] = mb[1];
3599 ha->product_id[1] = mb[2];
3600 ha->product_id[2] = mb[3];
3601 ha->product_id[3] = mb[4];
3602
3603 /* Adjust fw RISC transfer size */
3604 if (req->length > 1024)
3605 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3606 else
3607 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3608 req->length;
3609
3610 if (IS_QLA2200(ha) &&
3611 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3612 /* Limit firmware transfer size with a 2200A */
3613 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3614
3615 ha->device_type |= DT_ISP2200A;
3616 ha->fw_transfer_size = 128;
3617 }
3618
3619 /* Wrap Incoming Mailboxes Test. */
3620 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3621
3622 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3623 rval = qla2x00_mbx_reg_test(vha);
3624 if (rval)
3625 ql_log(ql_log_warn, vha, 0x0080,
3626 "Failed mailbox send register test.\n");
3627 else
3628 /* Flag a successful rval */
3629 rval = QLA_SUCCESS;
3630 spin_lock_irqsave(&ha->hardware_lock, flags);
3631
3632 chip_diag_failed:
3633 if (rval)
3634 ql_log(ql_log_info, vha, 0x0081,
3635 "Chip diagnostics **** FAILED ****.\n");
3636
3637 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3638
3639 return (rval);
3640 }
3641
3642 /**
3643 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3644 * @vha: HA context
3645 *
3646 * Returns 0 on success.
3647 */
3648 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3649 qla24xx_chip_diag(scsi_qla_host_t *vha)
3650 {
3651 int rval;
3652 struct qla_hw_data *ha = vha->hw;
3653 struct req_que *req = ha->req_q_map[0];
3654
3655 if (IS_P3P_TYPE(ha))
3656 return QLA_SUCCESS;
3657
3658 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3659
3660 rval = qla2x00_mbx_reg_test(vha);
3661 if (rval) {
3662 ql_log(ql_log_warn, vha, 0x0082,
3663 "Failed mailbox send register test.\n");
3664 } else {
3665 /* Flag a successful rval */
3666 rval = QLA_SUCCESS;
3667 }
3668
3669 return rval;
3670 }
3671
3672 static void
qla2x00_init_fce_trace(scsi_qla_host_t * vha)3673 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3674 {
3675 int rval;
3676 dma_addr_t tc_dma;
3677 void *tc;
3678 struct qla_hw_data *ha = vha->hw;
3679
3680 if (!IS_FWI2_CAPABLE(ha))
3681 return;
3682
3683 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3684 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3685 return;
3686
3687 if (ha->fce) {
3688 ql_dbg(ql_dbg_init, vha, 0x00bd,
3689 "%s: FCE Mem is already allocated.\n",
3690 __func__);
3691 return;
3692 }
3693
3694 /* Allocate memory for Fibre Channel Event Buffer. */
3695 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3696 GFP_KERNEL);
3697 if (!tc) {
3698 ql_log(ql_log_warn, vha, 0x00be,
3699 "Unable to allocate (%d KB) for FCE.\n",
3700 FCE_SIZE / 1024);
3701 return;
3702 }
3703
3704 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3705 ha->fce_mb, &ha->fce_bufs);
3706 if (rval) {
3707 ql_log(ql_log_warn, vha, 0x00bf,
3708 "Unable to initialize FCE (%d).\n", rval);
3709 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3710 return;
3711 }
3712
3713 ql_dbg(ql_dbg_init, vha, 0x00c0,
3714 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3715
3716 ha->flags.fce_enabled = 1;
3717 ha->fce_dma = tc_dma;
3718 ha->fce = tc;
3719 }
3720
3721 static void
qla2x00_init_eft_trace(scsi_qla_host_t * vha)3722 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3723 {
3724 int rval;
3725 dma_addr_t tc_dma;
3726 void *tc;
3727 struct qla_hw_data *ha = vha->hw;
3728
3729 if (!IS_FWI2_CAPABLE(ha))
3730 return;
3731
3732 if (ha->eft) {
3733 ql_dbg(ql_dbg_init, vha, 0x00bd,
3734 "%s: EFT Mem is already allocated.\n",
3735 __func__);
3736 return;
3737 }
3738
3739 /* Allocate memory for Extended Trace Buffer. */
3740 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3741 GFP_KERNEL);
3742 if (!tc) {
3743 ql_log(ql_log_warn, vha, 0x00c1,
3744 "Unable to allocate (%d KB) for EFT.\n",
3745 EFT_SIZE / 1024);
3746 return;
3747 }
3748
3749 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3750 if (rval) {
3751 ql_log(ql_log_warn, vha, 0x00c2,
3752 "Unable to initialize EFT (%d).\n", rval);
3753 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3754 return;
3755 }
3756
3757 ql_dbg(ql_dbg_init, vha, 0x00c3,
3758 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3759
3760 ha->eft_dma = tc_dma;
3761 ha->eft = tc;
3762 }
3763
3764 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3765 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3766 {
3767 qla2x00_init_fce_trace(vha);
3768 qla2x00_init_eft_trace(vha);
3769 }
3770
3771 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3772 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3773 {
3774 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3775 eft_size, fce_size, mq_size;
3776 struct qla_hw_data *ha = vha->hw;
3777 struct req_que *req = ha->req_q_map[0];
3778 struct rsp_que *rsp = ha->rsp_q_map[0];
3779 struct qla2xxx_fw_dump *fw_dump;
3780
3781 if (ha->fw_dump) {
3782 ql_dbg(ql_dbg_init, vha, 0x00bd,
3783 "Firmware dump already allocated.\n");
3784 return;
3785 }
3786
3787 ha->fw_dumped = 0;
3788 ha->fw_dump_cap_flags = 0;
3789 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3790 req_q_size = rsp_q_size = 0;
3791
3792 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3793 fixed_size = sizeof(struct qla2100_fw_dump);
3794 } else if (IS_QLA23XX(ha)) {
3795 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3796 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3797 sizeof(uint16_t);
3798 } else if (IS_FWI2_CAPABLE(ha)) {
3799 if (IS_QLA83XX(ha))
3800 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3801 else if (IS_QLA81XX(ha))
3802 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3803 else if (IS_QLA25XX(ha))
3804 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3805 else
3806 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3807
3808 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3809 sizeof(uint32_t);
3810 if (ha->mqenable) {
3811 if (!IS_QLA83XX(ha))
3812 mq_size = sizeof(struct qla2xxx_mq_chain);
3813 /*
3814 * Allocate maximum buffer size for all queues - Q0.
3815 * Resizing must be done at end-of-dump processing.
3816 */
3817 mq_size += (ha->max_req_queues - 1) *
3818 (req->length * sizeof(request_t));
3819 mq_size += (ha->max_rsp_queues - 1) *
3820 (rsp->length * sizeof(response_t));
3821 }
3822 if (ha->tgt.atio_ring)
3823 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3824
3825 qla2x00_init_fce_trace(vha);
3826 if (ha->fce)
3827 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3828 qla2x00_init_eft_trace(vha);
3829 if (ha->eft)
3830 eft_size = EFT_SIZE;
3831 }
3832
3833 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3834 struct fwdt *fwdt = ha->fwdt;
3835 uint j;
3836
3837 for (j = 0; j < 2; j++, fwdt++) {
3838 if (!fwdt->template) {
3839 ql_dbg(ql_dbg_init, vha, 0x00ba,
3840 "-> fwdt%u no template\n", j);
3841 continue;
3842 }
3843 ql_dbg(ql_dbg_init, vha, 0x00fa,
3844 "-> fwdt%u calculating fwdump size...\n", j);
3845 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3846 vha, fwdt->template);
3847 ql_dbg(ql_dbg_init, vha, 0x00fa,
3848 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3849 j, fwdt->dump_size);
3850 dump_size += fwdt->dump_size;
3851 }
3852 /* Add space for spare MPI fw dump. */
3853 dump_size += ha->fwdt[1].dump_size;
3854 } else {
3855 req_q_size = req->length * sizeof(request_t);
3856 rsp_q_size = rsp->length * sizeof(response_t);
3857 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3858 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3859 + eft_size;
3860 ha->chain_offset = dump_size;
3861 dump_size += mq_size + fce_size;
3862 if (ha->exchoffld_buf)
3863 dump_size += sizeof(struct qla2xxx_offld_chain) +
3864 ha->exchoffld_size;
3865 if (ha->exlogin_buf)
3866 dump_size += sizeof(struct qla2xxx_offld_chain) +
3867 ha->exlogin_size;
3868 }
3869
3870 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3871
3872 ql_dbg(ql_dbg_init, vha, 0x00c5,
3873 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3874 __func__, dump_size, ha->fw_dump_len,
3875 ha->fw_dump_alloc_len);
3876
3877 fw_dump = vmalloc(dump_size);
3878 if (!fw_dump) {
3879 ql_log(ql_log_warn, vha, 0x00c4,
3880 "Unable to allocate (%d KB) for firmware dump.\n",
3881 dump_size / 1024);
3882 } else {
3883 mutex_lock(&ha->optrom_mutex);
3884 if (ha->fw_dumped) {
3885 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3886 vfree(ha->fw_dump);
3887 ha->fw_dump = fw_dump;
3888 ha->fw_dump_alloc_len = dump_size;
3889 ql_dbg(ql_dbg_init, vha, 0x00c5,
3890 "Re-Allocated (%d KB) and save firmware dump.\n",
3891 dump_size / 1024);
3892 } else {
3893 vfree(ha->fw_dump);
3894 ha->fw_dump = fw_dump;
3895
3896 ha->fw_dump_len = ha->fw_dump_alloc_len =
3897 dump_size;
3898 ql_dbg(ql_dbg_init, vha, 0x00c5,
3899 "Allocated (%d KB) for firmware dump.\n",
3900 dump_size / 1024);
3901
3902 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3903 ha->mpi_fw_dump = (char *)fw_dump +
3904 ha->fwdt[1].dump_size;
3905 mutex_unlock(&ha->optrom_mutex);
3906 return;
3907 }
3908
3909 ha->fw_dump->signature[0] = 'Q';
3910 ha->fw_dump->signature[1] = 'L';
3911 ha->fw_dump->signature[2] = 'G';
3912 ha->fw_dump->signature[3] = 'C';
3913 ha->fw_dump->version = htonl(1);
3914
3915 ha->fw_dump->fixed_size = htonl(fixed_size);
3916 ha->fw_dump->mem_size = htonl(mem_size);
3917 ha->fw_dump->req_q_size = htonl(req_q_size);
3918 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3919
3920 ha->fw_dump->eft_size = htonl(eft_size);
3921 ha->fw_dump->eft_addr_l =
3922 htonl(LSD(ha->eft_dma));
3923 ha->fw_dump->eft_addr_h =
3924 htonl(MSD(ha->eft_dma));
3925
3926 ha->fw_dump->header_size =
3927 htonl(offsetof
3928 (struct qla2xxx_fw_dump, isp));
3929 }
3930 mutex_unlock(&ha->optrom_mutex);
3931 }
3932 }
3933 }
3934
3935 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3936 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3937 {
3938 #define MPS_MASK 0xe0
3939 int rval;
3940 uint16_t dc;
3941 uint32_t dw;
3942
3943 if (!IS_QLA81XX(vha->hw))
3944 return QLA_SUCCESS;
3945
3946 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3947 if (rval != QLA_SUCCESS) {
3948 ql_log(ql_log_warn, vha, 0x0105,
3949 "Unable to acquire semaphore.\n");
3950 goto done;
3951 }
3952
3953 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3954 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3955 if (rval != QLA_SUCCESS) {
3956 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3957 goto done_release;
3958 }
3959
3960 dc &= MPS_MASK;
3961 if (dc == (dw & MPS_MASK))
3962 goto done_release;
3963
3964 dw &= ~MPS_MASK;
3965 dw |= dc;
3966 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3967 if (rval != QLA_SUCCESS) {
3968 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3969 }
3970
3971 done_release:
3972 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3973 if (rval != QLA_SUCCESS) {
3974 ql_log(ql_log_warn, vha, 0x006d,
3975 "Unable to release semaphore.\n");
3976 }
3977
3978 done:
3979 return rval;
3980 }
3981
3982 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3983 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3984 {
3985 /* Don't try to reallocate the array */
3986 if (req->outstanding_cmds)
3987 return QLA_SUCCESS;
3988
3989 if (!IS_FWI2_CAPABLE(ha))
3990 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3991 else {
3992 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3993 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3994 else
3995 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3996 }
3997
3998 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3999 sizeof(srb_t *),
4000 GFP_KERNEL);
4001
4002 if (!req->outstanding_cmds) {
4003 /*
4004 * Try to allocate a minimal size just so we can get through
4005 * initialization.
4006 */
4007 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
4008 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
4009 sizeof(srb_t *),
4010 GFP_KERNEL);
4011
4012 if (!req->outstanding_cmds) {
4013 ql_log(ql_log_fatal, NULL, 0x0126,
4014 "Failed to allocate memory for "
4015 "outstanding_cmds for req_que %p.\n", req);
4016 req->num_outstanding_cmds = 0;
4017 return QLA_FUNCTION_FAILED;
4018 }
4019 }
4020
4021 return QLA_SUCCESS;
4022 }
4023
4024 #define PRINT_FIELD(_field, _flag, _str) { \
4025 if (a0->_field & _flag) {\
4026 if (p) {\
4027 strcat(ptr, "|");\
4028 ptr++;\
4029 leftover--;\
4030 } \
4031 len = snprintf(ptr, leftover, "%s", _str); \
4032 p = 1;\
4033 leftover -= len;\
4034 ptr += len; \
4035 } \
4036 }
4037
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)4038 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
4039 {
4040 #define STR_LEN 64
4041 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
4042 u8 str[STR_LEN], *ptr, p;
4043 int leftover, len;
4044
4045 memset(str, 0, STR_LEN);
4046 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
4047 ql_dbg(ql_dbg_init, vha, 0x015a,
4048 "SFP MFG Name: %s\n", str);
4049
4050 memset(str, 0, STR_LEN);
4051 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
4052 ql_dbg(ql_dbg_init, vha, 0x015c,
4053 "SFP Part Name: %s\n", str);
4054
4055 /* media */
4056 memset(str, 0, STR_LEN);
4057 ptr = str;
4058 leftover = STR_LEN;
4059 p = len = 0;
4060 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
4061 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
4062 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
4063 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
4064 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
4065 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
4066 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
4067 ql_dbg(ql_dbg_init, vha, 0x0160,
4068 "SFP Media: %s\n", str);
4069
4070 /* link length */
4071 memset(str, 0, STR_LEN);
4072 ptr = str;
4073 leftover = STR_LEN;
4074 p = len = 0;
4075 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
4076 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
4077 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
4078 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
4079 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
4080 ql_dbg(ql_dbg_init, vha, 0x0196,
4081 "SFP Link Length: %s\n", str);
4082
4083 memset(str, 0, STR_LEN);
4084 ptr = str;
4085 leftover = STR_LEN;
4086 p = len = 0;
4087 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
4088 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
4089 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
4090 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
4091 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
4092 ql_dbg(ql_dbg_init, vha, 0x016e,
4093 "SFP FC Link Tech: %s\n", str);
4094
4095 if (a0->length_km)
4096 ql_dbg(ql_dbg_init, vha, 0x016f,
4097 "SFP Distant: %d km\n", a0->length_km);
4098 if (a0->length_100m)
4099 ql_dbg(ql_dbg_init, vha, 0x0170,
4100 "SFP Distant: %d m\n", a0->length_100m*100);
4101 if (a0->length_50um_10m)
4102 ql_dbg(ql_dbg_init, vha, 0x0189,
4103 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
4104 if (a0->length_62um_10m)
4105 ql_dbg(ql_dbg_init, vha, 0x018a,
4106 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
4107 if (a0->length_om4_10m)
4108 ql_dbg(ql_dbg_init, vha, 0x0194,
4109 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
4110 if (a0->length_om3_10m)
4111 ql_dbg(ql_dbg_init, vha, 0x0195,
4112 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
4113 }
4114
4115
4116 /**
4117 * qla24xx_detect_sfp()
4118 *
4119 * @vha: adapter state pointer.
4120 *
4121 * @return
4122 * 0 -- Configure firmware to use short-range settings -- normal
4123 * buffer-to-buffer credits.
4124 *
4125 * 1 -- Configure firmware to use long-range settings -- extra
4126 * buffer-to-buffer credits should be allocated with
4127 * ha->lr_distance containing distance settings from NVRAM or SFP
4128 * (if supported).
4129 */
4130 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)4131 qla24xx_detect_sfp(scsi_qla_host_t *vha)
4132 {
4133 int rc, used_nvram;
4134 struct sff_8247_a0 *a;
4135 struct qla_hw_data *ha = vha->hw;
4136 struct nvram_81xx *nv = ha->nvram;
4137 #define LR_DISTANCE_UNKNOWN 2
4138 static const char * const types[] = { "Short", "Long" };
4139 static const char * const lengths[] = { "(10km)", "(5km)", "" };
4140 u8 ll = 0;
4141
4142 /* Seed with NVRAM settings. */
4143 used_nvram = 0;
4144 ha->flags.lr_detected = 0;
4145 if (IS_BPM_RANGE_CAPABLE(ha) &&
4146 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
4147 used_nvram = 1;
4148 ha->flags.lr_detected = 1;
4149 ha->lr_distance =
4150 (nv->enhanced_features >> LR_DIST_NV_POS)
4151 & LR_DIST_NV_MASK;
4152 }
4153
4154 if (!IS_BPM_ENABLED(vha))
4155 goto out;
4156 /* Determine SR/LR capabilities of SFP/Transceiver. */
4157 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
4158 if (rc)
4159 goto out;
4160
4161 used_nvram = 0;
4162 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
4163 qla2xxx_print_sfp_info(vha);
4164
4165 ha->flags.lr_detected = 0;
4166 ll = a->fc_ll_cc7;
4167 if (ll & FC_LL_VL || ll & FC_LL_L) {
4168 /* Long range, track length. */
4169 ha->flags.lr_detected = 1;
4170
4171 if (a->length_km > 5 || a->length_100m > 50)
4172 ha->lr_distance = LR_DISTANCE_10K;
4173 else
4174 ha->lr_distance = LR_DISTANCE_5K;
4175 }
4176
4177 out:
4178 ql_dbg(ql_dbg_async, vha, 0x507b,
4179 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
4180 types[ha->flags.lr_detected],
4181 ha->flags.lr_detected ? lengths[ha->lr_distance] :
4182 lengths[LR_DISTANCE_UNKNOWN],
4183 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
4184 return ha->flags.lr_detected;
4185 }
4186
__qla_adjust_iocb_limit(struct qla_qpair * qpair)4187 static void __qla_adjust_iocb_limit(struct qla_qpair *qpair)
4188 {
4189 u8 num_qps;
4190 u16 limit;
4191 struct qla_hw_data *ha = qpair->vha->hw;
4192
4193 num_qps = ha->num_qpairs + 1;
4194 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4195
4196 qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
4197 qpair->fwres.iocbs_limit = limit;
4198 qpair->fwres.iocbs_qp_limit = limit / num_qps;
4199
4200 qpair->fwres.exch_total = ha->orig_fw_xcb_count;
4201 qpair->fwres.exch_limit = (ha->orig_fw_xcb_count *
4202 QLA_IOCB_PCT_LIMIT) / 100;
4203 }
4204
qla_init_iocb_limit(scsi_qla_host_t * vha)4205 void qla_init_iocb_limit(scsi_qla_host_t *vha)
4206 {
4207 u8 i;
4208 struct qla_hw_data *ha = vha->hw;
4209
4210 __qla_adjust_iocb_limit(ha->base_qpair);
4211 ha->base_qpair->fwres.iocbs_used = 0;
4212 ha->base_qpair->fwres.exch_used = 0;
4213
4214 for (i = 0; i < ha->max_qpairs; i++) {
4215 if (ha->queue_pair_map[i]) {
4216 __qla_adjust_iocb_limit(ha->queue_pair_map[i]);
4217 ha->queue_pair_map[i]->fwres.iocbs_used = 0;
4218 ha->queue_pair_map[i]->fwres.exch_used = 0;
4219 }
4220 }
4221
4222 ha->fwres.iocb_total = ha->orig_fw_iocb_count;
4223 ha->fwres.iocb_limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4224 ha->fwres.exch_total = ha->orig_fw_xcb_count;
4225 ha->fwres.exch_limit = (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100;
4226
4227 atomic_set(&ha->fwres.iocb_used, 0);
4228 atomic_set(&ha->fwres.exch_used, 0);
4229 }
4230
qla_adjust_iocb_limit(scsi_qla_host_t * vha)4231 void qla_adjust_iocb_limit(scsi_qla_host_t *vha)
4232 {
4233 u8 i;
4234 struct qla_hw_data *ha = vha->hw;
4235
4236 __qla_adjust_iocb_limit(ha->base_qpair);
4237
4238 for (i = 0; i < ha->max_qpairs; i++) {
4239 if (ha->queue_pair_map[i])
4240 __qla_adjust_iocb_limit(ha->queue_pair_map[i]);
4241 }
4242 }
4243
4244 /**
4245 * qla2x00_setup_chip() - Load and start RISC firmware.
4246 * @vha: HA context
4247 *
4248 * Returns 0 on success.
4249 */
4250 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)4251 qla2x00_setup_chip(scsi_qla_host_t *vha)
4252 {
4253 int rval;
4254 uint32_t srisc_address = 0;
4255 struct qla_hw_data *ha = vha->hw;
4256 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4257 unsigned long flags;
4258 uint16_t fw_major_version;
4259 int done_once = 0;
4260
4261 if (IS_P3P_TYPE(ha)) {
4262 rval = ha->isp_ops->load_risc(vha, &srisc_address);
4263 if (rval == QLA_SUCCESS) {
4264 qla2x00_stop_firmware(vha);
4265 goto enable_82xx_npiv;
4266 } else
4267 goto failed;
4268 }
4269
4270 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4271 /* Disable SRAM, Instruction RAM and GP RAM parity. */
4272 spin_lock_irqsave(&ha->hardware_lock, flags);
4273 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
4274 rd_reg_word(®->hccr);
4275 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4276 }
4277
4278 qla81xx_mpi_sync(vha);
4279
4280 execute_fw_with_lr:
4281 /* Load firmware sequences */
4282 rval = ha->isp_ops->load_risc(vha, &srisc_address);
4283 if (rval == QLA_SUCCESS) {
4284 ql_dbg(ql_dbg_init, vha, 0x00c9,
4285 "Verifying Checksum of loaded RISC code.\n");
4286
4287 rval = qla2x00_verify_checksum(vha, srisc_address);
4288 if (rval == QLA_SUCCESS) {
4289 /* Start firmware execution. */
4290 ql_dbg(ql_dbg_init, vha, 0x00ca,
4291 "Starting firmware.\n");
4292
4293 if (ql2xexlogins)
4294 ha->flags.exlogins_enabled = 1;
4295
4296 if (qla_is_exch_offld_enabled(vha))
4297 ha->flags.exchoffld_enabled = 1;
4298
4299 rval = qla2x00_execute_fw(vha, srisc_address);
4300 /* Retrieve firmware information. */
4301 if (rval == QLA_SUCCESS) {
4302 /* Enable BPM support? */
4303 if (!done_once++ && qla24xx_detect_sfp(vha)) {
4304 ql_dbg(ql_dbg_init, vha, 0x00ca,
4305 "Re-starting firmware -- BPM.\n");
4306 /* Best-effort - re-init. */
4307 ha->isp_ops->reset_chip(vha);
4308 ha->isp_ops->chip_diag(vha);
4309 goto execute_fw_with_lr;
4310 }
4311
4312 if (IS_ZIO_THRESHOLD_CAPABLE(ha))
4313 qla27xx_set_zio_threshold(vha,
4314 ha->last_zio_threshold);
4315
4316 rval = qla2x00_set_exlogins_buffer(vha);
4317 if (rval != QLA_SUCCESS)
4318 goto failed;
4319
4320 rval = qla2x00_set_exchoffld_buffer(vha);
4321 if (rval != QLA_SUCCESS)
4322 goto failed;
4323
4324 enable_82xx_npiv:
4325 fw_major_version = ha->fw_major_version;
4326 if (IS_P3P_TYPE(ha))
4327 qla82xx_check_md_needed(vha);
4328 else
4329 rval = qla2x00_get_fw_version(vha);
4330 if (rval != QLA_SUCCESS)
4331 goto failed;
4332 ha->flags.npiv_supported = 0;
4333 if (IS_QLA2XXX_MIDTYPE(ha) &&
4334 (ha->fw_attributes & BIT_2)) {
4335 ha->flags.npiv_supported = 1;
4336 if ((!ha->max_npiv_vports) ||
4337 ((ha->max_npiv_vports + 1) %
4338 MIN_MULTI_ID_FABRIC))
4339 ha->max_npiv_vports =
4340 MIN_MULTI_ID_FABRIC - 1;
4341 }
4342 qla2x00_get_resource_cnts(vha);
4343 qla_init_iocb_limit(vha);
4344
4345 /*
4346 * Allocate the array of outstanding commands
4347 * now that we know the firmware resources.
4348 */
4349 rval = qla2x00_alloc_outstanding_cmds(ha,
4350 vha->req);
4351 if (rval != QLA_SUCCESS)
4352 goto failed;
4353
4354 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
4355 qla2x00_alloc_offload_mem(vha);
4356
4357 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
4358 qla2x00_alloc_fw_dump(vha);
4359
4360 } else {
4361 goto failed;
4362 }
4363 } else {
4364 ql_log(ql_log_fatal, vha, 0x00cd,
4365 "ISP Firmware failed checksum.\n");
4366 goto failed;
4367 }
4368
4369 /* Enable PUREX PASSTHRU */
4370 if (ql2xrdpenable || ha->flags.scm_supported_f ||
4371 ha->flags.edif_enabled)
4372 qla25xx_set_els_cmds_supported(vha);
4373 } else
4374 goto failed;
4375
4376 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4377 /* Enable proper parity. */
4378 spin_lock_irqsave(&ha->hardware_lock, flags);
4379 if (IS_QLA2300(ha))
4380 /* SRAM parity */
4381 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1);
4382 else
4383 /* SRAM, Instruction RAM and GP RAM parity */
4384 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7);
4385 rd_reg_word(®->hccr);
4386 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4387 }
4388
4389 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
4390 ha->flags.fac_supported = 1;
4391 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
4392 uint32_t size;
4393
4394 rval = qla81xx_fac_get_sector_size(vha, &size);
4395 if (rval == QLA_SUCCESS) {
4396 ha->flags.fac_supported = 1;
4397 ha->fdt_block_size = size << 2;
4398 } else {
4399 ql_log(ql_log_warn, vha, 0x00ce,
4400 "Unsupported FAC firmware (%d.%02d.%02d).\n",
4401 ha->fw_major_version, ha->fw_minor_version,
4402 ha->fw_subminor_version);
4403
4404 if (IS_QLA83XX(ha)) {
4405 ha->flags.fac_supported = 0;
4406 rval = QLA_SUCCESS;
4407 }
4408 }
4409 }
4410 failed:
4411 if (rval) {
4412 ql_log(ql_log_fatal, vha, 0x00cf,
4413 "Setup chip ****FAILED****.\n");
4414 }
4415
4416 return (rval);
4417 }
4418
4419 /**
4420 * qla2x00_init_response_q_entries() - Initializes response queue entries.
4421 * @rsp: response queue
4422 *
4423 * Beginning of request ring has initialization control block already built
4424 * by nvram config routine.
4425 *
4426 * Returns 0 on success.
4427 */
4428 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)4429 qla2x00_init_response_q_entries(struct rsp_que *rsp)
4430 {
4431 uint16_t cnt;
4432 response_t *pkt;
4433
4434 rsp->ring_ptr = rsp->ring;
4435 rsp->ring_index = 0;
4436 rsp->status_srb = NULL;
4437 pkt = rsp->ring_ptr;
4438 for (cnt = 0; cnt < rsp->length; cnt++) {
4439 pkt->signature = RESPONSE_PROCESSED;
4440 pkt++;
4441 }
4442 }
4443
4444 /**
4445 * qla2x00_update_fw_options() - Read and process firmware options.
4446 * @vha: HA context
4447 *
4448 * Returns 0 on success.
4449 */
4450 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)4451 qla2x00_update_fw_options(scsi_qla_host_t *vha)
4452 {
4453 uint16_t swing, emphasis, tx_sens, rx_sens;
4454 struct qla_hw_data *ha = vha->hw;
4455
4456 memset(ha->fw_options, 0, sizeof(ha->fw_options));
4457 qla2x00_get_fw_options(vha, ha->fw_options);
4458
4459 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4460 return;
4461
4462 /* Serial Link options. */
4463 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
4464 "Serial link options.\n");
4465 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
4466 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
4467
4468 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
4469 if (ha->fw_seriallink_options[3] & BIT_2) {
4470 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
4471
4472 /* 1G settings */
4473 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
4474 emphasis = (ha->fw_seriallink_options[2] &
4475 (BIT_4 | BIT_3)) >> 3;
4476 tx_sens = ha->fw_seriallink_options[0] &
4477 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4478 rx_sens = (ha->fw_seriallink_options[0] &
4479 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4480 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4481 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4482 if (rx_sens == 0x0)
4483 rx_sens = 0x3;
4484 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4485 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4486 ha->fw_options[10] |= BIT_5 |
4487 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4488 (tx_sens & (BIT_1 | BIT_0));
4489
4490 /* 2G settings */
4491 swing = (ha->fw_seriallink_options[2] &
4492 (BIT_7 | BIT_6 | BIT_5)) >> 5;
4493 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4494 tx_sens = ha->fw_seriallink_options[1] &
4495 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4496 rx_sens = (ha->fw_seriallink_options[1] &
4497 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4498 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4499 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4500 if (rx_sens == 0x0)
4501 rx_sens = 0x3;
4502 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4503 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4504 ha->fw_options[11] |= BIT_5 |
4505 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4506 (tx_sens & (BIT_1 | BIT_0));
4507 }
4508
4509 /* FCP2 options. */
4510 /* Return command IOCBs without waiting for an ABTS to complete. */
4511 ha->fw_options[3] |= BIT_13;
4512
4513 /* LED scheme. */
4514 if (ha->flags.enable_led_scheme)
4515 ha->fw_options[2] |= BIT_12;
4516
4517 /* Detect ISP6312. */
4518 if (IS_QLA6312(ha))
4519 ha->fw_options[2] |= BIT_13;
4520
4521 /* Set Retry FLOGI in case of P2P connection */
4522 if (ha->operating_mode == P2P) {
4523 ha->fw_options[2] |= BIT_3;
4524 ql_dbg(ql_dbg_disc, vha, 0x2100,
4525 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4526 __func__, ha->fw_options[2]);
4527 }
4528
4529 /* Update firmware options. */
4530 qla2x00_set_fw_options(vha, ha->fw_options);
4531 }
4532
4533 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)4534 qla24xx_update_fw_options(scsi_qla_host_t *vha)
4535 {
4536 int rval;
4537 struct qla_hw_data *ha = vha->hw;
4538
4539 if (IS_P3P_TYPE(ha))
4540 return;
4541
4542 /* Hold status IOCBs until ABTS response received. */
4543 if (ql2xfwholdabts)
4544 ha->fw_options[3] |= BIT_12;
4545
4546 /* Set Retry FLOGI in case of P2P connection */
4547 if (ha->operating_mode == P2P) {
4548 ha->fw_options[2] |= BIT_3;
4549 ql_dbg(ql_dbg_disc, vha, 0x2101,
4550 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4551 __func__, ha->fw_options[2]);
4552 }
4553
4554 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
4555 if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
4556 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4557 if (qla_tgt_mode_enabled(vha) ||
4558 qla_dual_mode_enabled(vha))
4559 ha->fw_options[2] |= BIT_11;
4560 else
4561 ha->fw_options[2] &= ~BIT_11;
4562 }
4563
4564 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4565 IS_QLA28XX(ha)) {
4566 /*
4567 * Tell FW to track each exchange to prevent
4568 * driver from using stale exchange.
4569 */
4570 if (qla_tgt_mode_enabled(vha) ||
4571 qla_dual_mode_enabled(vha))
4572 ha->fw_options[2] |= BIT_4;
4573 else
4574 ha->fw_options[2] &= ~(BIT_4);
4575
4576 /* Reserve 1/2 of emergency exchanges for ELS.*/
4577 if (qla2xuseresexchforels)
4578 ha->fw_options[2] |= BIT_8;
4579 else
4580 ha->fw_options[2] &= ~BIT_8;
4581
4582 /*
4583 * N2N: set Secure=1 for PLOGI ACC and
4584 * fw shal not send PRLI after PLOGI Acc
4585 */
4586 if (ha->flags.edif_enabled &&
4587 DBELL_ACTIVE(vha)) {
4588 ha->fw_options[3] |= BIT_15;
4589 ha->flags.n2n_fw_acc_sec = 1;
4590 } else {
4591 ha->fw_options[3] &= ~BIT_15;
4592 ha->flags.n2n_fw_acc_sec = 0;
4593 }
4594 }
4595
4596 if (ql2xrdpenable || ha->flags.scm_supported_f ||
4597 ha->flags.edif_enabled)
4598 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4599
4600 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
4601 if (IS_BPM_RANGE_CAPABLE(ha))
4602 ha->fw_options[3] |= BIT_10;
4603
4604 ql_dbg(ql_dbg_init, vha, 0x00e8,
4605 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4606 __func__, ha->fw_options[1], ha->fw_options[2],
4607 ha->fw_options[3], vha->host->active_mode);
4608
4609 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4610 qla2x00_set_fw_options(vha, ha->fw_options);
4611
4612 /* Update Serial Link options. */
4613 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4614 return;
4615
4616 rval = qla2x00_set_serdes_params(vha,
4617 le16_to_cpu(ha->fw_seriallink_options24[1]),
4618 le16_to_cpu(ha->fw_seriallink_options24[2]),
4619 le16_to_cpu(ha->fw_seriallink_options24[3]));
4620 if (rval != QLA_SUCCESS) {
4621 ql_log(ql_log_warn, vha, 0x0104,
4622 "Unable to update Serial Link options (%x).\n", rval);
4623 }
4624 }
4625
4626 void
qla2x00_config_rings(struct scsi_qla_host * vha)4627 qla2x00_config_rings(struct scsi_qla_host *vha)
4628 {
4629 struct qla_hw_data *ha = vha->hw;
4630 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4631 struct req_que *req = ha->req_q_map[0];
4632 struct rsp_que *rsp = ha->rsp_q_map[0];
4633
4634 /* Setup ring parameters in initialization control block. */
4635 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4636 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4637 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4638 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4639 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4640 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4641
4642 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4643 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4644 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4645 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4646 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4647 }
4648
4649 void
qla24xx_config_rings(struct scsi_qla_host * vha)4650 qla24xx_config_rings(struct scsi_qla_host *vha)
4651 {
4652 struct qla_hw_data *ha = vha->hw;
4653 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4654 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4655 struct qla_msix_entry *msix;
4656 struct init_cb_24xx *icb;
4657 uint16_t rid = 0;
4658 struct req_que *req = ha->req_q_map[0];
4659 struct rsp_que *rsp = ha->rsp_q_map[0];
4660
4661 /* Setup ring parameters in initialization control block. */
4662 icb = (struct init_cb_24xx *)ha->init_cb;
4663 icb->request_q_outpointer = cpu_to_le16(0);
4664 icb->response_q_inpointer = cpu_to_le16(0);
4665 icb->request_q_length = cpu_to_le16(req->length);
4666 icb->response_q_length = cpu_to_le16(rsp->length);
4667 put_unaligned_le64(req->dma, &icb->request_q_address);
4668 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4669
4670 /* Setup ATIO queue dma pointers for target mode */
4671 icb->atio_q_inpointer = cpu_to_le16(0);
4672 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4673 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4674
4675 if (IS_SHADOW_REG_CAPABLE(ha))
4676 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4677
4678 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4679 IS_QLA28XX(ha)) {
4680 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4681 icb->rid = cpu_to_le16(rid);
4682 if (ha->flags.msix_enabled) {
4683 msix = &ha->msix_entries[1];
4684 ql_dbg(ql_dbg_init, vha, 0x0019,
4685 "Registering vector 0x%x for base que.\n",
4686 msix->entry);
4687 icb->msix = cpu_to_le16(msix->entry);
4688 }
4689 /* Use alternate PCI bus number */
4690 if (MSB(rid))
4691 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4692 /* Use alternate PCI devfn */
4693 if (LSB(rid))
4694 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4695
4696 /* Use Disable MSIX Handshake mode for capable adapters */
4697 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4698 (ha->flags.msix_enabled)) {
4699 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4700 ha->flags.disable_msix_handshake = 1;
4701 ql_dbg(ql_dbg_init, vha, 0x00fe,
4702 "MSIX Handshake Disable Mode turned on.\n");
4703 } else {
4704 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4705 }
4706 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4707
4708 wrt_reg_dword(®->isp25mq.req_q_in, 0);
4709 wrt_reg_dword(®->isp25mq.req_q_out, 0);
4710 wrt_reg_dword(®->isp25mq.rsp_q_in, 0);
4711 wrt_reg_dword(®->isp25mq.rsp_q_out, 0);
4712 } else {
4713 wrt_reg_dword(®->isp24.req_q_in, 0);
4714 wrt_reg_dword(®->isp24.req_q_out, 0);
4715 wrt_reg_dword(®->isp24.rsp_q_in, 0);
4716 wrt_reg_dword(®->isp24.rsp_q_out, 0);
4717 }
4718
4719 qlt_24xx_config_rings(vha);
4720
4721 /* If the user has configured the speed, set it here */
4722 if (ha->set_data_rate) {
4723 ql_dbg(ql_dbg_init, vha, 0x00fd,
4724 "Speed set by user : %s Gbps \n",
4725 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4726 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4727 }
4728
4729 /* PCI posting */
4730 rd_reg_word(&ioreg->hccr);
4731 }
4732
4733 /**
4734 * qla2x00_init_rings() - Initializes firmware.
4735 * @vha: HA context
4736 *
4737 * Beginning of request ring has initialization control block already built
4738 * by nvram config routine.
4739 *
4740 * Returns 0 on success.
4741 */
4742 int
qla2x00_init_rings(scsi_qla_host_t * vha)4743 qla2x00_init_rings(scsi_qla_host_t *vha)
4744 {
4745 int rval;
4746 unsigned long flags = 0;
4747 int cnt, que;
4748 struct qla_hw_data *ha = vha->hw;
4749 struct req_que *req;
4750 struct rsp_que *rsp;
4751 struct mid_init_cb_24xx *mid_init_cb =
4752 (struct mid_init_cb_24xx *) ha->init_cb;
4753
4754 spin_lock_irqsave(&ha->hardware_lock, flags);
4755
4756 /* Clear outstanding commands array. */
4757 for (que = 0; que < ha->max_req_queues; que++) {
4758 req = ha->req_q_map[que];
4759 if (!req || !test_bit(que, ha->req_qid_map))
4760 continue;
4761 req->out_ptr = (uint16_t *)(req->ring + req->length);
4762 *req->out_ptr = 0;
4763 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4764 req->outstanding_cmds[cnt] = NULL;
4765
4766 req->current_outstanding_cmd = 1;
4767
4768 /* Initialize firmware. */
4769 req->ring_ptr = req->ring;
4770 req->ring_index = 0;
4771 req->cnt = req->length;
4772 }
4773
4774 for (que = 0; que < ha->max_rsp_queues; que++) {
4775 rsp = ha->rsp_q_map[que];
4776 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4777 continue;
4778 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4779 *rsp->in_ptr = 0;
4780 /* Initialize response queue entries */
4781 if (IS_QLAFX00(ha))
4782 qlafx00_init_response_q_entries(rsp);
4783 else
4784 qla2x00_init_response_q_entries(rsp);
4785 }
4786
4787 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4788 ha->tgt.atio_ring_index = 0;
4789 /* Initialize ATIO queue entries */
4790 qlt_init_atio_q_entries(vha);
4791
4792 ha->isp_ops->config_rings(vha);
4793
4794 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4795
4796 if (IS_QLAFX00(ha)) {
4797 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4798 goto next_check;
4799 }
4800
4801 /* Update any ISP specific firmware options before initialization. */
4802 ha->isp_ops->update_fw_options(vha);
4803
4804 ql_dbg(ql_dbg_init, vha, 0x00d1,
4805 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
4806 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
4807 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
4808 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
4809
4810 if (ha->flags.npiv_supported) {
4811 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4812 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4813 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4814 }
4815
4816 if (IS_FWI2_CAPABLE(ha)) {
4817 mid_init_cb->options = cpu_to_le16(BIT_1);
4818 mid_init_cb->init_cb.execution_throttle =
4819 cpu_to_le16(ha->cur_fw_xcb_count);
4820 ha->flags.dport_enabled =
4821 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4822 BIT_7) != 0;
4823 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4824 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4825 /* FA-WWPN Status */
4826 ha->flags.fawwpn_enabled =
4827 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4828 BIT_6) != 0;
4829 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4830 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4831 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */
4832 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4833 }
4834
4835 /* ELS pass through payload is limit by frame size. */
4836 if (ha->flags.edif_enabled)
4837 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
4838
4839 QLA_FW_STARTED(ha);
4840 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4841 next_check:
4842 if (rval) {
4843 QLA_FW_STOPPED(ha);
4844 ql_log(ql_log_fatal, vha, 0x00d2,
4845 "Init Firmware **** FAILED ****.\n");
4846 } else {
4847 ql_dbg(ql_dbg_init, vha, 0x00d3,
4848 "Init Firmware -- success.\n");
4849 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4850 }
4851
4852 return (rval);
4853 }
4854
4855 /**
4856 * qla2x00_fw_ready() - Waits for firmware ready.
4857 * @vha: HA context
4858 *
4859 * Returns 0 on success.
4860 */
4861 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4862 qla2x00_fw_ready(scsi_qla_host_t *vha)
4863 {
4864 int rval;
4865 unsigned long wtime, mtime, cs84xx_time;
4866 uint16_t min_wait; /* Minimum wait time if loop is down */
4867 uint16_t wait_time; /* Wait time if loop is coming ready */
4868 uint16_t state[6];
4869 struct qla_hw_data *ha = vha->hw;
4870
4871 if (IS_QLAFX00(vha->hw))
4872 return qlafx00_fw_ready(vha);
4873
4874 /* Time to wait for loop down */
4875 if (IS_P3P_TYPE(ha))
4876 min_wait = 30;
4877 else
4878 min_wait = 20;
4879
4880 /*
4881 * Firmware should take at most one RATOV to login, plus 5 seconds for
4882 * our own processing.
4883 */
4884 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4885 wait_time = min_wait;
4886 }
4887
4888 /* Min wait time if loop down */
4889 mtime = jiffies + (min_wait * HZ);
4890
4891 /* wait time before firmware ready */
4892 wtime = jiffies + (wait_time * HZ);
4893
4894 /* Wait for ISP to finish LIP */
4895 if (!vha->flags.init_done)
4896 ql_log(ql_log_info, vha, 0x801e,
4897 "Waiting for LIP to complete.\n");
4898
4899 do {
4900 memset(state, -1, sizeof(state));
4901 rval = qla2x00_get_firmware_state(vha, state);
4902 if (rval == QLA_SUCCESS) {
4903 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4904 vha->device_flags &= ~DFLG_NO_CABLE;
4905 }
4906 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4907 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4908 "fw_state=%x 84xx=%x.\n", state[0],
4909 state[2]);
4910 if ((state[2] & FSTATE_LOGGED_IN) &&
4911 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4912 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4913 "Sending verify iocb.\n");
4914
4915 cs84xx_time = jiffies;
4916 rval = qla84xx_init_chip(vha);
4917 if (rval != QLA_SUCCESS) {
4918 ql_log(ql_log_warn,
4919 vha, 0x8007,
4920 "Init chip failed.\n");
4921 break;
4922 }
4923
4924 /* Add time taken to initialize. */
4925 cs84xx_time = jiffies - cs84xx_time;
4926 wtime += cs84xx_time;
4927 mtime += cs84xx_time;
4928 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4929 "Increasing wait time by %ld. "
4930 "New time %ld.\n", cs84xx_time,
4931 wtime);
4932 }
4933 } else if (state[0] == FSTATE_READY) {
4934 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4935 "F/W Ready - OK.\n");
4936
4937 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4938 &ha->login_timeout, &ha->r_a_tov);
4939
4940 rval = QLA_SUCCESS;
4941 break;
4942 }
4943
4944 rval = QLA_FUNCTION_FAILED;
4945
4946 if (atomic_read(&vha->loop_down_timer) &&
4947 state[0] != FSTATE_READY) {
4948 /* Loop down. Timeout on min_wait for states
4949 * other than Wait for Login.
4950 */
4951 if (time_after_eq(jiffies, mtime)) {
4952 ql_log(ql_log_info, vha, 0x8038,
4953 "Cable is unplugged...\n");
4954
4955 vha->device_flags |= DFLG_NO_CABLE;
4956 break;
4957 }
4958 }
4959 } else {
4960 /* Mailbox cmd failed. Timeout on min_wait. */
4961 if (time_after_eq(jiffies, mtime) ||
4962 ha->flags.isp82xx_fw_hung)
4963 break;
4964 }
4965
4966 if (time_after_eq(jiffies, wtime))
4967 break;
4968
4969 /* Delay for a while */
4970 msleep(500);
4971 } while (1);
4972
4973 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4974 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4975 state[1], state[2], state[3], state[4], state[5], jiffies);
4976
4977 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4978 ql_log(ql_log_warn, vha, 0x803b,
4979 "Firmware ready **** FAILED ****.\n");
4980 }
4981
4982 return (rval);
4983 }
4984
4985 /*
4986 * qla2x00_configure_hba
4987 * Setup adapter context.
4988 *
4989 * Input:
4990 * ha = adapter state pointer.
4991 *
4992 * Returns:
4993 * 0 = success
4994 *
4995 * Context:
4996 * Kernel context.
4997 */
4998 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4999 qla2x00_configure_hba(scsi_qla_host_t *vha)
5000 {
5001 int rval;
5002 uint16_t loop_id;
5003 uint16_t topo;
5004 uint16_t sw_cap;
5005 uint8_t al_pa;
5006 uint8_t area;
5007 uint8_t domain;
5008 char connect_type[22];
5009 struct qla_hw_data *ha = vha->hw;
5010 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5011 port_id_t id;
5012 unsigned long flags;
5013
5014 /* Get host addresses. */
5015 rval = qla2x00_get_adapter_id(vha,
5016 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
5017 if (rval != QLA_SUCCESS) {
5018 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
5019 IS_CNA_CAPABLE(ha) ||
5020 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
5021 ql_dbg(ql_dbg_disc, vha, 0x2008,
5022 "Loop is in a transition state.\n");
5023 } else {
5024 ql_log(ql_log_warn, vha, 0x2009,
5025 "Unable to get host loop ID.\n");
5026 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
5027 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
5028 ql_log(ql_log_warn, vha, 0x1151,
5029 "Doing link init.\n");
5030 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
5031 return rval;
5032 }
5033 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
5034 }
5035 return (rval);
5036 }
5037
5038 if (topo == 4) {
5039 ql_log(ql_log_info, vha, 0x200a,
5040 "Cannot get topology - retrying.\n");
5041 return (QLA_FUNCTION_FAILED);
5042 }
5043
5044 vha->loop_id = loop_id;
5045
5046 /* initialize */
5047 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
5048 ha->operating_mode = LOOP;
5049
5050 switch (topo) {
5051 case 0:
5052 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
5053 ha->switch_cap = 0;
5054 ha->current_topology = ISP_CFG_NL;
5055 strcpy(connect_type, "(Loop)");
5056 break;
5057
5058 case 1:
5059 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
5060 ha->switch_cap = sw_cap;
5061 ha->current_topology = ISP_CFG_FL;
5062 strcpy(connect_type, "(FL_Port)");
5063 break;
5064
5065 case 2:
5066 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
5067 ha->switch_cap = 0;
5068 ha->operating_mode = P2P;
5069 ha->current_topology = ISP_CFG_N;
5070 strcpy(connect_type, "(N_Port-to-N_Port)");
5071 break;
5072
5073 case 3:
5074 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
5075 ha->switch_cap = sw_cap;
5076 ha->operating_mode = P2P;
5077 ha->current_topology = ISP_CFG_F;
5078 strcpy(connect_type, "(F_Port)");
5079 break;
5080
5081 default:
5082 ql_dbg(ql_dbg_disc, vha, 0x200f,
5083 "HBA in unknown topology %x, using NL.\n", topo);
5084 ha->switch_cap = 0;
5085 ha->current_topology = ISP_CFG_NL;
5086 strcpy(connect_type, "(Loop)");
5087 break;
5088 }
5089
5090 /* Save Host port and loop ID. */
5091 /* byte order - Big Endian */
5092 id.b.domain = domain;
5093 id.b.area = area;
5094 id.b.al_pa = al_pa;
5095 id.b.rsvd_1 = 0;
5096 spin_lock_irqsave(&ha->hardware_lock, flags);
5097 if (vha->hw->flags.edif_enabled) {
5098 if (topo != 2)
5099 qlt_update_host_map(vha, id);
5100 } else if (!(topo == 2 && ha->flags.n2n_bigger))
5101 qlt_update_host_map(vha, id);
5102 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5103
5104 if (!vha->flags.init_done)
5105 ql_log(ql_log_info, vha, 0x2010,
5106 "Topology - %s, Host Loop address 0x%x.\n",
5107 connect_type, vha->loop_id);
5108
5109 return(rval);
5110 }
5111
5112 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)5113 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
5114 const char *def)
5115 {
5116 char *st, *en;
5117 uint16_t index;
5118 uint64_t zero[2] = { 0 };
5119 struct qla_hw_data *ha = vha->hw;
5120 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
5121 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
5122
5123 if (len > sizeof(zero))
5124 len = sizeof(zero);
5125 if (memcmp(model, &zero, len) != 0) {
5126 memcpy(ha->model_number, model, len);
5127 st = en = ha->model_number;
5128 en += len - 1;
5129 while (en > st) {
5130 if (*en != 0x20 && *en != 0x00)
5131 break;
5132 *en-- = '\0';
5133 }
5134
5135 index = (ha->pdev->subsystem_device & 0xff);
5136 if (use_tbl &&
5137 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5138 index < QLA_MODEL_NAMES)
5139 strlcpy(ha->model_desc,
5140 qla2x00_model_name[index * 2 + 1],
5141 sizeof(ha->model_desc));
5142 } else {
5143 index = (ha->pdev->subsystem_device & 0xff);
5144 if (use_tbl &&
5145 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5146 index < QLA_MODEL_NAMES) {
5147 strlcpy(ha->model_number,
5148 qla2x00_model_name[index * 2],
5149 sizeof(ha->model_number));
5150 strlcpy(ha->model_desc,
5151 qla2x00_model_name[index * 2 + 1],
5152 sizeof(ha->model_desc));
5153 } else {
5154 strlcpy(ha->model_number, def,
5155 sizeof(ha->model_number));
5156 }
5157 }
5158 if (IS_FWI2_CAPABLE(ha))
5159 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
5160 sizeof(ha->model_desc));
5161 }
5162
5163 /* On sparc systems, obtain port and node WWN from firmware
5164 * properties.
5165 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)5166 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
5167 {
5168 #ifdef CONFIG_SPARC
5169 struct qla_hw_data *ha = vha->hw;
5170 struct pci_dev *pdev = ha->pdev;
5171 struct device_node *dp = pci_device_to_OF_node(pdev);
5172 const u8 *val;
5173 int len;
5174
5175 val = of_get_property(dp, "port-wwn", &len);
5176 if (val && len >= WWN_SIZE)
5177 memcpy(nv->port_name, val, WWN_SIZE);
5178
5179 val = of_get_property(dp, "node-wwn", &len);
5180 if (val && len >= WWN_SIZE)
5181 memcpy(nv->node_name, val, WWN_SIZE);
5182 #endif
5183 }
5184
5185 /*
5186 * NVRAM configuration for ISP 2xxx
5187 *
5188 * Input:
5189 * ha = adapter block pointer.
5190 *
5191 * Output:
5192 * initialization control block in response_ring
5193 * host adapters parameters in host adapter block
5194 *
5195 * Returns:
5196 * 0 = success.
5197 */
5198 int
qla2x00_nvram_config(scsi_qla_host_t * vha)5199 qla2x00_nvram_config(scsi_qla_host_t *vha)
5200 {
5201 int rval;
5202 uint8_t chksum = 0;
5203 uint16_t cnt;
5204 uint8_t *dptr1, *dptr2;
5205 struct qla_hw_data *ha = vha->hw;
5206 init_cb_t *icb = ha->init_cb;
5207 nvram_t *nv = ha->nvram;
5208 uint8_t *ptr = ha->nvram;
5209 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5210
5211 rval = QLA_SUCCESS;
5212
5213 /* Determine NVRAM starting address. */
5214 ha->nvram_size = sizeof(*nv);
5215 ha->nvram_base = 0;
5216 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
5217 if ((rd_reg_word(®->ctrl_status) >> 14) == 1)
5218 ha->nvram_base = 0x80;
5219
5220 /* Get NVRAM data and calculate checksum. */
5221 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
5222 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
5223 chksum += *ptr++;
5224
5225 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
5226 "Contents of NVRAM.\n");
5227 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
5228 nv, ha->nvram_size);
5229
5230 /* Bad NVRAM data, set defaults parameters. */
5231 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
5232 nv->nvram_version < 1) {
5233 /* Reset NVRAM data. */
5234 ql_log(ql_log_warn, vha, 0x0064,
5235 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
5236 chksum, nv->id, nv->nvram_version);
5237 ql_log(ql_log_warn, vha, 0x0065,
5238 "Falling back to "
5239 "functioning (yet invalid -- WWPN) defaults.\n");
5240
5241 /*
5242 * Set default initialization control block.
5243 */
5244 memset(nv, 0, ha->nvram_size);
5245 nv->parameter_block_version = ICB_VERSION;
5246
5247 if (IS_QLA23XX(ha)) {
5248 nv->firmware_options[0] = BIT_2 | BIT_1;
5249 nv->firmware_options[1] = BIT_7 | BIT_5;
5250 nv->add_firmware_options[0] = BIT_5;
5251 nv->add_firmware_options[1] = BIT_5 | BIT_4;
5252 nv->frame_payload_size = cpu_to_le16(2048);
5253 nv->special_options[1] = BIT_7;
5254 } else if (IS_QLA2200(ha)) {
5255 nv->firmware_options[0] = BIT_2 | BIT_1;
5256 nv->firmware_options[1] = BIT_7 | BIT_5;
5257 nv->add_firmware_options[0] = BIT_5;
5258 nv->add_firmware_options[1] = BIT_5 | BIT_4;
5259 nv->frame_payload_size = cpu_to_le16(1024);
5260 } else if (IS_QLA2100(ha)) {
5261 nv->firmware_options[0] = BIT_3 | BIT_1;
5262 nv->firmware_options[1] = BIT_5;
5263 nv->frame_payload_size = cpu_to_le16(1024);
5264 }
5265
5266 nv->max_iocb_allocation = cpu_to_le16(256);
5267 nv->execution_throttle = cpu_to_le16(16);
5268 nv->retry_count = 8;
5269 nv->retry_delay = 1;
5270
5271 nv->port_name[0] = 33;
5272 nv->port_name[3] = 224;
5273 nv->port_name[4] = 139;
5274
5275 qla2xxx_nvram_wwn_from_ofw(vha, nv);
5276
5277 nv->login_timeout = 4;
5278
5279 /*
5280 * Set default host adapter parameters
5281 */
5282 nv->host_p[1] = BIT_2;
5283 nv->reset_delay = 5;
5284 nv->port_down_retry_count = 8;
5285 nv->max_luns_per_target = cpu_to_le16(8);
5286 nv->link_down_timeout = 60;
5287
5288 rval = 1;
5289 }
5290
5291 /* Reset Initialization control block */
5292 memset(icb, 0, ha->init_cb_size);
5293
5294 /*
5295 * Setup driver NVRAM options.
5296 */
5297 nv->firmware_options[0] |= (BIT_6 | BIT_1);
5298 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
5299 nv->firmware_options[1] |= (BIT_5 | BIT_0);
5300 nv->firmware_options[1] &= ~BIT_4;
5301
5302 if (IS_QLA23XX(ha)) {
5303 nv->firmware_options[0] |= BIT_2;
5304 nv->firmware_options[0] &= ~BIT_3;
5305 nv->special_options[0] &= ~BIT_6;
5306 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
5307
5308 if (IS_QLA2300(ha)) {
5309 if (ha->fb_rev == FPM_2310) {
5310 strcpy(ha->model_number, "QLA2310");
5311 } else {
5312 strcpy(ha->model_number, "QLA2300");
5313 }
5314 } else {
5315 qla2x00_set_model_info(vha, nv->model_number,
5316 sizeof(nv->model_number), "QLA23xx");
5317 }
5318 } else if (IS_QLA2200(ha)) {
5319 nv->firmware_options[0] |= BIT_2;
5320 /*
5321 * 'Point-to-point preferred, else loop' is not a safe
5322 * connection mode setting.
5323 */
5324 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
5325 (BIT_5 | BIT_4)) {
5326 /* Force 'loop preferred, else point-to-point'. */
5327 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
5328 nv->add_firmware_options[0] |= BIT_5;
5329 }
5330 strcpy(ha->model_number, "QLA22xx");
5331 } else /*if (IS_QLA2100(ha))*/ {
5332 strcpy(ha->model_number, "QLA2100");
5333 }
5334
5335 /*
5336 * Copy over NVRAM RISC parameter block to initialization control block.
5337 */
5338 dptr1 = (uint8_t *)icb;
5339 dptr2 = (uint8_t *)&nv->parameter_block_version;
5340 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
5341 while (cnt--)
5342 *dptr1++ = *dptr2++;
5343
5344 /* Copy 2nd half. */
5345 dptr1 = (uint8_t *)icb->add_firmware_options;
5346 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
5347 while (cnt--)
5348 *dptr1++ = *dptr2++;
5349 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5350 /* Use alternate WWN? */
5351 if (nv->host_p[1] & BIT_7) {
5352 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5353 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5354 }
5355
5356 /* Prepare nodename */
5357 if ((icb->firmware_options[1] & BIT_6) == 0) {
5358 /*
5359 * Firmware will apply the following mask if the nodename was
5360 * not provided.
5361 */
5362 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5363 icb->node_name[0] &= 0xF0;
5364 }
5365
5366 /*
5367 * Set host adapter parameters.
5368 */
5369
5370 /*
5371 * BIT_7 in the host-parameters section allows for modification to
5372 * internal driver logging.
5373 */
5374 if (nv->host_p[0] & BIT_7)
5375 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
5376 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
5377 /* Always load RISC code on non ISP2[12]00 chips. */
5378 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
5379 ha->flags.disable_risc_code_load = 0;
5380 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
5381 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
5382 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
5383 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
5384 ha->flags.disable_serdes = 0;
5385
5386 ha->operating_mode =
5387 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
5388
5389 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
5390 sizeof(ha->fw_seriallink_options));
5391
5392 /* save HBA serial number */
5393 ha->serial0 = icb->port_name[5];
5394 ha->serial1 = icb->port_name[6];
5395 ha->serial2 = icb->port_name[7];
5396 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5397 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5398
5399 icb->execution_throttle = cpu_to_le16(0xFFFF);
5400
5401 ha->retry_count = nv->retry_count;
5402
5403 /* Set minimum login_timeout to 4 seconds. */
5404 if (nv->login_timeout != ql2xlogintimeout)
5405 nv->login_timeout = ql2xlogintimeout;
5406 if (nv->login_timeout < 4)
5407 nv->login_timeout = 4;
5408 ha->login_timeout = nv->login_timeout;
5409
5410 /* Set minimum RATOV to 100 tenths of a second. */
5411 ha->r_a_tov = 100;
5412
5413 ha->loop_reset_delay = nv->reset_delay;
5414
5415 /* Link Down Timeout = 0:
5416 *
5417 * When Port Down timer expires we will start returning
5418 * I/O's to OS with "DID_NO_CONNECT".
5419 *
5420 * Link Down Timeout != 0:
5421 *
5422 * The driver waits for the link to come up after link down
5423 * before returning I/Os to OS with "DID_NO_CONNECT".
5424 */
5425 if (nv->link_down_timeout == 0) {
5426 ha->loop_down_abort_time =
5427 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5428 } else {
5429 ha->link_down_timeout = nv->link_down_timeout;
5430 ha->loop_down_abort_time =
5431 (LOOP_DOWN_TIME - ha->link_down_timeout);
5432 }
5433
5434 /*
5435 * Need enough time to try and get the port back.
5436 */
5437 ha->port_down_retry_count = nv->port_down_retry_count;
5438 if (qlport_down_retry)
5439 ha->port_down_retry_count = qlport_down_retry;
5440 /* Set login_retry_count */
5441 ha->login_retry_count = nv->retry_count;
5442 if (ha->port_down_retry_count == nv->port_down_retry_count &&
5443 ha->port_down_retry_count > 3)
5444 ha->login_retry_count = ha->port_down_retry_count;
5445 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5446 ha->login_retry_count = ha->port_down_retry_count;
5447 if (ql2xloginretrycount)
5448 ha->login_retry_count = ql2xloginretrycount;
5449
5450 icb->lun_enables = cpu_to_le16(0);
5451 icb->command_resource_count = 0;
5452 icb->immediate_notify_resource_count = 0;
5453 icb->timeout = cpu_to_le16(0);
5454
5455 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5456 /* Enable RIO */
5457 icb->firmware_options[0] &= ~BIT_3;
5458 icb->add_firmware_options[0] &=
5459 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5460 icb->add_firmware_options[0] |= BIT_2;
5461 icb->response_accumulation_timer = 3;
5462 icb->interrupt_delay_timer = 5;
5463
5464 vha->flags.process_response_queue = 1;
5465 } else {
5466 /* Enable ZIO. */
5467 if (!vha->flags.init_done) {
5468 ha->zio_mode = icb->add_firmware_options[0] &
5469 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5470 ha->zio_timer = icb->interrupt_delay_timer ?
5471 icb->interrupt_delay_timer : 2;
5472 }
5473 icb->add_firmware_options[0] &=
5474 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5475 vha->flags.process_response_queue = 0;
5476 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5477 ha->zio_mode = QLA_ZIO_MODE_6;
5478
5479 ql_log(ql_log_info, vha, 0x0068,
5480 "ZIO mode %d enabled; timer delay (%d us).\n",
5481 ha->zio_mode, ha->zio_timer * 100);
5482
5483 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
5484 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
5485 vha->flags.process_response_queue = 1;
5486 }
5487 }
5488
5489 if (rval) {
5490 ql_log(ql_log_warn, vha, 0x0069,
5491 "NVRAM configuration failed.\n");
5492 }
5493 return (rval);
5494 }
5495
5496 static void
qla2x00_rport_del(void * data)5497 qla2x00_rport_del(void *data)
5498 {
5499 fc_port_t *fcport = data;
5500 struct fc_rport *rport;
5501 unsigned long flags;
5502
5503 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5504 rport = fcport->drport ? fcport->drport : fcport->rport;
5505 fcport->drport = NULL;
5506 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5507 if (rport) {
5508 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
5509 "%s %8phN. rport %p roles %x\n",
5510 __func__, fcport->port_name, rport,
5511 rport->roles);
5512
5513 fc_remote_port_delete(rport);
5514 }
5515 }
5516
qla2x00_set_fcport_state(fc_port_t * fcport,int state)5517 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5518 {
5519 int old_state;
5520
5521 old_state = atomic_read(&fcport->state);
5522 atomic_set(&fcport->state, state);
5523
5524 /* Don't print state transitions during initial allocation of fcport */
5525 if (old_state && old_state != state) {
5526 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
5527 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5528 fcport->port_name, port_state_str[old_state],
5529 port_state_str[state], fcport->d_id.b.domain,
5530 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5531 }
5532 }
5533
5534 /**
5535 * qla2x00_alloc_fcport() - Allocate a generic fcport.
5536 * @vha: HA context
5537 * @flags: allocation flags
5538 *
5539 * Returns a pointer to the allocated fcport, or NULL, if none available.
5540 */
5541 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)5542 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5543 {
5544 fc_port_t *fcport;
5545
5546 fcport = kzalloc(sizeof(fc_port_t), flags);
5547 if (!fcport)
5548 return NULL;
5549
5550 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
5551 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
5552 flags);
5553 if (!fcport->ct_desc.ct_sns) {
5554 ql_log(ql_log_warn, vha, 0xd049,
5555 "Failed to allocate ct_sns request.\n");
5556 kfree(fcport);
5557 return NULL;
5558 }
5559
5560 /* Setup fcport template structure. */
5561 fcport->vha = vha;
5562 fcport->port_type = FCT_UNKNOWN;
5563 fcport->loop_id = FC_NO_LOOP_ID;
5564 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
5565 fcport->supported_classes = FC_COS_UNSPECIFIED;
5566 fcport->fp_speed = PORT_SPEED_UNKNOWN;
5567
5568 fcport->disc_state = DSC_DELETED;
5569 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5570 fcport->deleted = QLA_SESS_DELETED;
5571 fcport->login_retry = vha->hw->login_retry_count;
5572 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5573 fcport->logout_on_delete = 1;
5574 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5575 fcport->tgt_short_link_down_cnt = 0;
5576 fcport->dev_loss_tmo = 0;
5577
5578 if (!fcport->ct_desc.ct_sns) {
5579 ql_log(ql_log_warn, vha, 0xd049,
5580 "Failed to allocate ct_sns request.\n");
5581 kfree(fcport);
5582 return NULL;
5583 }
5584
5585 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5586 INIT_WORK(&fcport->free_work, qlt_free_session_done);
5587 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5588 INIT_LIST_HEAD(&fcport->gnl_entry);
5589 INIT_LIST_HEAD(&fcport->list);
5590
5591 INIT_LIST_HEAD(&fcport->sess_cmd_list);
5592 spin_lock_init(&fcport->sess_cmd_lock);
5593
5594 spin_lock_init(&fcport->edif.sa_list_lock);
5595 INIT_LIST_HEAD(&fcport->edif.tx_sa_list);
5596 INIT_LIST_HEAD(&fcport->edif.rx_sa_list);
5597
5598 if (vha->e_dbell.db_flags == EDB_ACTIVE)
5599 fcport->edif.app_started = 1;
5600
5601 spin_lock_init(&fcport->edif.indx_list_lock);
5602 INIT_LIST_HEAD(&fcport->edif.edif_indx_list);
5603
5604 return fcport;
5605 }
5606
5607 void
qla2x00_free_fcport(fc_port_t * fcport)5608 qla2x00_free_fcport(fc_port_t *fcport)
5609 {
5610 if (fcport->ct_desc.ct_sns) {
5611 dma_free_coherent(&fcport->vha->hw->pdev->dev,
5612 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
5613 fcport->ct_desc.ct_sns_dma);
5614
5615 fcport->ct_desc.ct_sns = NULL;
5616 }
5617
5618 qla_edif_flush_sa_ctl_lists(fcport);
5619 list_del(&fcport->list);
5620 qla2x00_clear_loop_id(fcport);
5621
5622 qla_edif_list_del(fcport);
5623
5624 kfree(fcport);
5625 }
5626
qla_get_login_template(scsi_qla_host_t * vha)5627 static void qla_get_login_template(scsi_qla_host_t *vha)
5628 {
5629 struct qla_hw_data *ha = vha->hw;
5630 int rval;
5631 u32 *bp, sz;
5632 __be32 *q;
5633
5634 memset(ha->init_cb, 0, ha->init_cb_size);
5635 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5636 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5637 ha->init_cb, sz);
5638 if (rval != QLA_SUCCESS) {
5639 ql_dbg(ql_dbg_init, vha, 0x00d1,
5640 "PLOGI ELS param read fail.\n");
5641 return;
5642 }
5643 q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5644
5645 bp = (uint32_t *)ha->init_cb;
5646 cpu_to_be32_array(q, bp, sz / 4);
5647 ha->flags.plogi_template_valid = 1;
5648 }
5649
5650 /*
5651 * qla2x00_configure_loop
5652 * Updates Fibre Channel Device Database with what is actually on loop.
5653 *
5654 * Input:
5655 * ha = adapter block pointer.
5656 *
5657 * Returns:
5658 * 0 = success.
5659 * 1 = error.
5660 * 2 = database was full and device was not configured.
5661 */
5662 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)5663 qla2x00_configure_loop(scsi_qla_host_t *vha)
5664 {
5665 int rval;
5666 unsigned long flags, save_flags;
5667 struct qla_hw_data *ha = vha->hw;
5668
5669 rval = QLA_SUCCESS;
5670
5671 /* Get Initiator ID */
5672 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5673 rval = qla2x00_configure_hba(vha);
5674 if (rval != QLA_SUCCESS) {
5675 ql_dbg(ql_dbg_disc, vha, 0x2013,
5676 "Unable to configure HBA.\n");
5677 return (rval);
5678 }
5679 }
5680
5681 save_flags = flags = vha->dpc_flags;
5682 ql_dbg(ql_dbg_disc, vha, 0x2014,
5683 "Configure loop -- dpc flags = 0x%lx.\n", flags);
5684
5685 /*
5686 * If we have both an RSCN and PORT UPDATE pending then handle them
5687 * both at the same time.
5688 */
5689 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5690 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5691
5692 qla2x00_get_data_rate(vha);
5693 qla_get_login_template(vha);
5694
5695 /* Determine what we need to do */
5696 if ((ha->current_topology == ISP_CFG_FL ||
5697 ha->current_topology == ISP_CFG_F) &&
5698 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5699
5700 set_bit(RSCN_UPDATE, &flags);
5701 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5702
5703 } else if (ha->current_topology == ISP_CFG_NL ||
5704 ha->current_topology == ISP_CFG_N) {
5705 clear_bit(RSCN_UPDATE, &flags);
5706 set_bit(LOCAL_LOOP_UPDATE, &flags);
5707 } else if (!vha->flags.online ||
5708 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5709 set_bit(RSCN_UPDATE, &flags);
5710 set_bit(LOCAL_LOOP_UPDATE, &flags);
5711 }
5712
5713 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5714 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5715 ql_dbg(ql_dbg_disc, vha, 0x2015,
5716 "Loop resync needed, failing.\n");
5717 rval = QLA_FUNCTION_FAILED;
5718 } else
5719 rval = qla2x00_configure_local_loop(vha);
5720 }
5721
5722 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5723 if (LOOP_TRANSITION(vha)) {
5724 ql_dbg(ql_dbg_disc, vha, 0x2099,
5725 "Needs RSCN update and loop transition.\n");
5726 rval = QLA_FUNCTION_FAILED;
5727 }
5728 else
5729 rval = qla2x00_configure_fabric(vha);
5730 }
5731
5732 if (rval == QLA_SUCCESS) {
5733 if (atomic_read(&vha->loop_down_timer) ||
5734 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5735 rval = QLA_FUNCTION_FAILED;
5736 } else {
5737 atomic_set(&vha->loop_state, LOOP_READY);
5738 ql_dbg(ql_dbg_disc, vha, 0x2069,
5739 "LOOP READY.\n");
5740 ha->flags.fw_init_done = 1;
5741
5742 /*
5743 * use link up to wake up app to get ready for
5744 * authentication.
5745 */
5746 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha))
5747 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP,
5748 ha->link_data_rate);
5749
5750 /*
5751 * Process any ATIO queue entries that came in
5752 * while we weren't online.
5753 */
5754 if (qla_tgt_mode_enabled(vha) ||
5755 qla_dual_mode_enabled(vha)) {
5756 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5757 qlt_24xx_process_atio_queue(vha, 0);
5758 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5759 flags);
5760 }
5761 }
5762 }
5763
5764 if (rval) {
5765 ql_dbg(ql_dbg_disc, vha, 0x206a,
5766 "%s *** FAILED ***.\n", __func__);
5767 } else {
5768 ql_dbg(ql_dbg_disc, vha, 0x206b,
5769 "%s: exiting normally. local port wwpn %8phN id %06x)\n",
5770 __func__, vha->port_name, vha->d_id.b24);
5771 }
5772
5773 /* Restore state if a resync event occurred during processing */
5774 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5775 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5776 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5777 if (test_bit(RSCN_UPDATE, &save_flags)) {
5778 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5779 }
5780 }
5781
5782 return (rval);
5783 }
5784
qla2x00_configure_n2n_loop(scsi_qla_host_t * vha)5785 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5786 {
5787 unsigned long flags;
5788 fc_port_t *fcport;
5789
5790 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__);
5791
5792 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5793 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5794
5795 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5796 if (fcport->n2n_flag) {
5797 qla24xx_fcport_handle_login(vha, fcport);
5798 return QLA_SUCCESS;
5799 }
5800 }
5801
5802 spin_lock_irqsave(&vha->work_lock, flags);
5803 vha->scan.scan_retry++;
5804 spin_unlock_irqrestore(&vha->work_lock, flags);
5805
5806 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5807 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5808 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5809 }
5810 return QLA_FUNCTION_FAILED;
5811 }
5812
5813 static void
qla_reinitialize_link(scsi_qla_host_t * vha)5814 qla_reinitialize_link(scsi_qla_host_t *vha)
5815 {
5816 int rval;
5817
5818 atomic_set(&vha->loop_state, LOOP_DOWN);
5819 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
5820 rval = qla2x00_full_login_lip(vha);
5821 if (rval == QLA_SUCCESS) {
5822 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n");
5823 } else {
5824 ql_dbg(ql_dbg_disc, vha, 0xd051,
5825 "Link reinitialization failed (%d)\n", rval);
5826 }
5827 }
5828
5829 /*
5830 * qla2x00_configure_local_loop
5831 * Updates Fibre Channel Device Database with local loop devices.
5832 *
5833 * Input:
5834 * ha = adapter block pointer.
5835 *
5836 * Returns:
5837 * 0 = success.
5838 */
5839 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5840 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5841 {
5842 int rval, rval2;
5843 int found_devs;
5844 int found;
5845 fc_port_t *fcport, *new_fcport;
5846 uint16_t index;
5847 uint16_t entries;
5848 struct gid_list_info *gid;
5849 uint16_t loop_id;
5850 uint8_t domain, area, al_pa;
5851 struct qla_hw_data *ha = vha->hw;
5852 unsigned long flags;
5853
5854 /* Inititae N2N login. */
5855 if (N2N_TOPO(ha))
5856 return qla2x00_configure_n2n_loop(vha);
5857
5858 found_devs = 0;
5859 new_fcport = NULL;
5860 entries = MAX_FIBRE_DEVICES_LOOP;
5861
5862 /* Get list of logged in devices. */
5863 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5864 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5865 &entries);
5866 if (rval != QLA_SUCCESS)
5867 goto err;
5868
5869 ql_dbg(ql_dbg_disc, vha, 0x2011,
5870 "Entries in ID list (%d).\n", entries);
5871 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5872 ha->gid_list, entries * sizeof(*ha->gid_list));
5873
5874 if (entries == 0) {
5875 spin_lock_irqsave(&vha->work_lock, flags);
5876 vha->scan.scan_retry++;
5877 spin_unlock_irqrestore(&vha->work_lock, flags);
5878
5879 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5880 u8 loop_map_entries = 0;
5881 int rc;
5882
5883 rc = qla2x00_get_fcal_position_map(vha, NULL,
5884 &loop_map_entries);
5885 if (rc == QLA_SUCCESS && loop_map_entries > 1) {
5886 /*
5887 * There are devices that are still not logged
5888 * in. Reinitialize to give them a chance.
5889 */
5890 qla_reinitialize_link(vha);
5891 return QLA_FUNCTION_FAILED;
5892 }
5893 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5894 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5895 }
5896 } else {
5897 vha->scan.scan_retry = 0;
5898 }
5899
5900 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5901 fcport->scan_state = QLA_FCPORT_SCAN;
5902 }
5903
5904 /* Allocate temporary fcport for any new fcports discovered. */
5905 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5906 if (new_fcport == NULL) {
5907 ql_log(ql_log_warn, vha, 0x2012,
5908 "Memory allocation failed for fcport.\n");
5909 rval = QLA_MEMORY_ALLOC_FAILED;
5910 goto err;
5911 }
5912 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5913
5914 /* Add devices to port list. */
5915 gid = ha->gid_list;
5916 for (index = 0; index < entries; index++) {
5917 domain = gid->domain;
5918 area = gid->area;
5919 al_pa = gid->al_pa;
5920 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5921 loop_id = gid->loop_id_2100;
5922 else
5923 loop_id = le16_to_cpu(gid->loop_id);
5924 gid = (void *)gid + ha->gid_list_info_size;
5925
5926 /* Bypass reserved domain fields. */
5927 if ((domain & 0xf0) == 0xf0)
5928 continue;
5929
5930 /* Bypass if not same domain and area of adapter. */
5931 if (area && domain && ((area != vha->d_id.b.area) ||
5932 (domain != vha->d_id.b.domain)) &&
5933 (ha->current_topology == ISP_CFG_NL))
5934 continue;
5935
5936
5937 /* Bypass invalid local loop ID. */
5938 if (loop_id > LAST_LOCAL_LOOP_ID)
5939 continue;
5940
5941 memset(new_fcport->port_name, 0, WWN_SIZE);
5942
5943 /* Fill in member data. */
5944 new_fcport->d_id.b.domain = domain;
5945 new_fcport->d_id.b.area = area;
5946 new_fcport->d_id.b.al_pa = al_pa;
5947 new_fcport->loop_id = loop_id;
5948 new_fcport->scan_state = QLA_FCPORT_FOUND;
5949
5950 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5951 if (rval2 != QLA_SUCCESS) {
5952 ql_dbg(ql_dbg_disc, vha, 0x2097,
5953 "Failed to retrieve fcport information "
5954 "-- get_port_database=%x, loop_id=0x%04x.\n",
5955 rval2, new_fcport->loop_id);
5956 /* Skip retry if N2N */
5957 if (ha->current_topology != ISP_CFG_N) {
5958 ql_dbg(ql_dbg_disc, vha, 0x2105,
5959 "Scheduling resync.\n");
5960 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5961 continue;
5962 }
5963 }
5964
5965 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5966 /* Check for matching device in port list. */
5967 found = 0;
5968 fcport = NULL;
5969 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5970 if (memcmp(new_fcport->port_name, fcport->port_name,
5971 WWN_SIZE))
5972 continue;
5973
5974 fcport->flags &= ~FCF_FABRIC_DEVICE;
5975 fcport->loop_id = new_fcport->loop_id;
5976 fcport->port_type = new_fcport->port_type;
5977 fcport->d_id.b24 = new_fcport->d_id.b24;
5978 memcpy(fcport->node_name, new_fcport->node_name,
5979 WWN_SIZE);
5980 fcport->scan_state = QLA_FCPORT_FOUND;
5981 if (fcport->login_retry == 0) {
5982 fcport->login_retry = vha->hw->login_retry_count;
5983 ql_dbg(ql_dbg_disc, vha, 0x2135,
5984 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
5985 fcport->port_name, fcport->loop_id,
5986 fcport->login_retry);
5987 }
5988 found++;
5989 break;
5990 }
5991
5992 if (!found) {
5993 /* New device, add to fcports list. */
5994 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5995
5996 /* Allocate a new replacement fcport. */
5997 fcport = new_fcport;
5998
5999 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6000
6001 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6002
6003 if (new_fcport == NULL) {
6004 ql_log(ql_log_warn, vha, 0xd031,
6005 "Failed to allocate memory for fcport.\n");
6006 rval = QLA_MEMORY_ALLOC_FAILED;
6007 goto err;
6008 }
6009 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6010 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
6011 }
6012
6013 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6014
6015 /* Base iIDMA settings on HBA port speed. */
6016 fcport->fp_speed = ha->link_data_rate;
6017
6018 found_devs++;
6019 }
6020
6021 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6022 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6023 break;
6024
6025 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6026 if ((qla_dual_mode_enabled(vha) ||
6027 qla_ini_mode_enabled(vha)) &&
6028 atomic_read(&fcport->state) == FCS_ONLINE) {
6029 qla2x00_mark_device_lost(vha, fcport,
6030 ql2xplogiabsentdevice);
6031 if (fcport->loop_id != FC_NO_LOOP_ID &&
6032 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6033 fcport->port_type != FCT_INITIATOR &&
6034 fcport->port_type != FCT_BROADCAST) {
6035 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6036 "%s %d %8phC post del sess\n",
6037 __func__, __LINE__,
6038 fcport->port_name);
6039
6040 qlt_schedule_sess_for_deletion(fcport);
6041 continue;
6042 }
6043 }
6044 }
6045
6046 if (fcport->scan_state == QLA_FCPORT_FOUND)
6047 qla24xx_fcport_handle_login(vha, fcport);
6048 }
6049
6050 qla2x00_free_fcport(new_fcport);
6051
6052 return rval;
6053
6054 err:
6055 ql_dbg(ql_dbg_disc, vha, 0x2098,
6056 "Configure local loop error exit: rval=%x.\n", rval);
6057 return rval;
6058 }
6059
6060 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)6061 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6062 {
6063 int rval;
6064 uint16_t mb[MAILBOX_REGISTER_COUNT];
6065 struct qla_hw_data *ha = vha->hw;
6066
6067 if (!IS_IIDMA_CAPABLE(ha))
6068 return;
6069
6070 if (atomic_read(&fcport->state) != FCS_ONLINE)
6071 return;
6072
6073 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
6074 fcport->fp_speed > ha->link_data_rate ||
6075 !ha->flags.gpsc_supported)
6076 return;
6077
6078 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
6079 mb);
6080 if (rval != QLA_SUCCESS) {
6081 ql_dbg(ql_dbg_disc, vha, 0x2004,
6082 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
6083 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
6084 } else {
6085 ql_dbg(ql_dbg_disc, vha, 0x2005,
6086 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
6087 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
6088 fcport->fp_speed, fcport->port_name);
6089 }
6090 }
6091
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)6092 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6093 {
6094 qla2x00_iidma_fcport(vha, fcport);
6095 qla24xx_update_fcport_fcp_prio(vha, fcport);
6096 }
6097
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)6098 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6099 {
6100 struct qla_work_evt *e;
6101
6102 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
6103 if (!e)
6104 return QLA_FUNCTION_FAILED;
6105
6106 e->u.fcport.fcport = fcport;
6107 return qla2x00_post_work(vha, e);
6108 }
6109
6110 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
6111 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)6112 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
6113 {
6114 struct fc_rport_identifiers rport_ids;
6115 struct fc_rport *rport;
6116 unsigned long flags;
6117
6118 if (atomic_read(&fcport->state) == FCS_ONLINE)
6119 return;
6120
6121 rport_ids.node_name = wwn_to_u64(fcport->node_name);
6122 rport_ids.port_name = wwn_to_u64(fcport->port_name);
6123 rport_ids.port_id = fcport->d_id.b.domain << 16 |
6124 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
6125 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
6126 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
6127 if (!rport) {
6128 ql_log(ql_log_warn, vha, 0x2006,
6129 "Unable to allocate fc remote port.\n");
6130 return;
6131 }
6132
6133 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
6134 *((fc_port_t **)rport->dd_data) = fcport;
6135 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
6136 fcport->dev_loss_tmo = rport->dev_loss_tmo;
6137
6138 rport->supported_classes = fcport->supported_classes;
6139
6140 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
6141 if (fcport->port_type == FCT_INITIATOR)
6142 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
6143 if (fcport->port_type == FCT_TARGET)
6144 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
6145 if (fcport->port_type & FCT_NVME_INITIATOR)
6146 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
6147 if (fcport->port_type & FCT_NVME_TARGET)
6148 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
6149 if (fcport->port_type & FCT_NVME_DISCOVERY)
6150 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
6151
6152 fc_remote_port_rolechg(rport, rport_ids.roles);
6153
6154 ql_dbg(ql_dbg_disc, vha, 0x20ee,
6155 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
6156 __func__, fcport->port_name, vha->host_no,
6157 rport->scsi_target_id, rport,
6158 (fcport->port_type == FCT_TARGET) ? "tgt" :
6159 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
6160 }
6161
6162 /*
6163 * qla2x00_update_fcport
6164 * Updates device on list.
6165 *
6166 * Input:
6167 * ha = adapter block pointer.
6168 * fcport = port structure pointer.
6169 *
6170 * Return:
6171 * 0 - Success
6172 * BIT_0 - error
6173 *
6174 * Context:
6175 * Kernel context.
6176 */
6177 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)6178 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6179 {
6180 unsigned long flags;
6181
6182 if (IS_SW_RESV_ADDR(fcport->d_id))
6183 return;
6184
6185 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
6186 __func__, fcport->port_name);
6187
6188 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
6189 fcport->login_retry = vha->hw->login_retry_count;
6190 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6191
6192 spin_lock_irqsave(&vha->work_lock, flags);
6193 fcport->deleted = 0;
6194 spin_unlock_irqrestore(&vha->work_lock, flags);
6195
6196 if (vha->hw->current_topology == ISP_CFG_NL)
6197 fcport->logout_on_delete = 0;
6198 else
6199 fcport->logout_on_delete = 1;
6200 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
6201
6202 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
6203 fcport->tgt_short_link_down_cnt++;
6204 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
6205 }
6206
6207 switch (vha->hw->current_topology) {
6208 case ISP_CFG_N:
6209 case ISP_CFG_NL:
6210 fcport->keep_nport_handle = 1;
6211 break;
6212 default:
6213 break;
6214 }
6215
6216 qla2x00_iidma_fcport(vha, fcport);
6217
6218 qla2x00_dfs_create_rport(vha, fcport);
6219
6220 if (NVME_TARGET(vha->hw, fcport)) {
6221 qla_nvme_register_remote(vha, fcport);
6222 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
6223 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
6224 return;
6225 }
6226
6227 qla24xx_update_fcport_fcp_prio(vha, fcport);
6228
6229 switch (vha->host->active_mode) {
6230 case MODE_INITIATOR:
6231 qla2x00_reg_remote_port(vha, fcport);
6232 break;
6233 case MODE_TARGET:
6234 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6235 !vha->vha_tgt.qla_tgt->tgt_stopped)
6236 qlt_fc_port_added(vha, fcport);
6237 break;
6238 case MODE_DUAL:
6239 qla2x00_reg_remote_port(vha, fcport);
6240 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6241 !vha->vha_tgt.qla_tgt->tgt_stopped)
6242 qlt_fc_port_added(vha, fcport);
6243 break;
6244 default:
6245 break;
6246 }
6247
6248 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
6249
6250 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
6251 if (fcport->id_changed) {
6252 fcport->id_changed = 0;
6253 ql_dbg(ql_dbg_disc, vha, 0x20d7,
6254 "%s %d %8phC post gfpnid fcp_cnt %d\n",
6255 __func__, __LINE__, fcport->port_name,
6256 vha->fcport_count);
6257 qla24xx_post_gfpnid_work(vha, fcport);
6258 } else {
6259 ql_dbg(ql_dbg_disc, vha, 0x20d7,
6260 "%s %d %8phC post gpsc fcp_cnt %d\n",
6261 __func__, __LINE__, fcport->port_name,
6262 vha->fcport_count);
6263 qla24xx_post_gpsc_work(vha, fcport);
6264 }
6265 }
6266
6267 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
6268 }
6269
qla_register_fcport_fn(struct work_struct * work)6270 void qla_register_fcport_fn(struct work_struct *work)
6271 {
6272 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
6273 u32 rscn_gen = fcport->rscn_gen;
6274 u16 data[2];
6275
6276 if (IS_SW_RESV_ADDR(fcport->d_id))
6277 return;
6278
6279 qla2x00_update_fcport(fcport->vha, fcport);
6280
6281 if (rscn_gen != fcport->rscn_gen) {
6282 /* RSCN(s) came in while registration */
6283 switch (fcport->next_disc_state) {
6284 case DSC_DELETE_PEND:
6285 qlt_schedule_sess_for_deletion(fcport);
6286 break;
6287 case DSC_ADISC:
6288 data[0] = data[1] = 0;
6289 qla2x00_post_async_adisc_work(fcport->vha, fcport,
6290 data);
6291 break;
6292 default:
6293 break;
6294 }
6295 }
6296 }
6297
6298 /*
6299 * qla2x00_configure_fabric
6300 * Setup SNS devices with loop ID's.
6301 *
6302 * Input:
6303 * ha = adapter block pointer.
6304 *
6305 * Returns:
6306 * 0 = success.
6307 * BIT_0 = error
6308 */
6309 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)6310 qla2x00_configure_fabric(scsi_qla_host_t *vha)
6311 {
6312 int rval;
6313 fc_port_t *fcport;
6314 uint16_t mb[MAILBOX_REGISTER_COUNT];
6315 uint16_t loop_id;
6316 LIST_HEAD(new_fcports);
6317 struct qla_hw_data *ha = vha->hw;
6318 int discovery_gen;
6319
6320 /* If FL port exists, then SNS is present */
6321 if (IS_FWI2_CAPABLE(ha))
6322 loop_id = NPH_F_PORT;
6323 else
6324 loop_id = SNS_FL_PORT;
6325 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
6326 if (rval != QLA_SUCCESS) {
6327 ql_dbg(ql_dbg_disc, vha, 0x20a0,
6328 "MBX_GET_PORT_NAME failed, No FL Port.\n");
6329
6330 vha->device_flags &= ~SWITCH_FOUND;
6331 return (QLA_SUCCESS);
6332 }
6333 vha->device_flags |= SWITCH_FOUND;
6334
6335 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
6336 if (rval != QLA_SUCCESS)
6337 ql_dbg(ql_dbg_disc, vha, 0x20ff,
6338 "Failed to get Fabric Port Name\n");
6339
6340 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
6341 rval = qla2x00_send_change_request(vha, 0x3, 0);
6342 if (rval != QLA_SUCCESS)
6343 ql_log(ql_log_warn, vha, 0x121,
6344 "Failed to enable receiving of RSCN requests: 0x%x.\n",
6345 rval);
6346 }
6347
6348 do {
6349 qla2x00_mgmt_svr_login(vha);
6350
6351 /* Ensure we are logged into the SNS. */
6352 loop_id = NPH_SNS_LID(ha);
6353 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
6354 0xfc, mb, BIT_1|BIT_0);
6355 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
6356 ql_dbg(ql_dbg_disc, vha, 0x20a1,
6357 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
6358 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
6359 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6360 return rval;
6361 }
6362
6363 /* FDMI support. */
6364 if (ql2xfdmienable &&
6365 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
6366 qla2x00_fdmi_register(vha);
6367
6368 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
6369 if (qla2x00_rft_id(vha)) {
6370 /* EMPTY */
6371 ql_dbg(ql_dbg_disc, vha, 0x20a2,
6372 "Register FC-4 TYPE failed.\n");
6373 if (test_bit(LOOP_RESYNC_NEEDED,
6374 &vha->dpc_flags))
6375 break;
6376 }
6377 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
6378 /* EMPTY */
6379 ql_dbg(ql_dbg_disc, vha, 0x209a,
6380 "Register FC-4 Features failed.\n");
6381 if (test_bit(LOOP_RESYNC_NEEDED,
6382 &vha->dpc_flags))
6383 break;
6384 }
6385 if (vha->flags.nvme_enabled) {
6386 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
6387 ql_dbg(ql_dbg_disc, vha, 0x2049,
6388 "Register NVME FC Type Features failed.\n");
6389 }
6390 }
6391 if (qla2x00_rnn_id(vha)) {
6392 /* EMPTY */
6393 ql_dbg(ql_dbg_disc, vha, 0x2104,
6394 "Register Node Name failed.\n");
6395 if (test_bit(LOOP_RESYNC_NEEDED,
6396 &vha->dpc_flags))
6397 break;
6398 } else if (qla2x00_rsnn_nn(vha)) {
6399 /* EMPTY */
6400 ql_dbg(ql_dbg_disc, vha, 0x209b,
6401 "Register Symbolic Node Name failed.\n");
6402 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6403 break;
6404 }
6405 }
6406
6407
6408 /* Mark the time right before querying FW for connected ports.
6409 * This process is long, asynchronous and by the time it's done,
6410 * collected information might not be accurate anymore. E.g.
6411 * disconnected port might have re-connected and a brand new
6412 * session has been created. In this case session's generation
6413 * will be newer than discovery_gen. */
6414 qlt_do_generation_tick(vha, &discovery_gen);
6415
6416 if (USE_ASYNC_SCAN(ha)) {
6417 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
6418 NULL);
6419 if (rval)
6420 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6421 } else {
6422 list_for_each_entry(fcport, &vha->vp_fcports, list)
6423 fcport->scan_state = QLA_FCPORT_SCAN;
6424
6425 rval = qla2x00_find_all_fabric_devs(vha);
6426 }
6427 if (rval != QLA_SUCCESS)
6428 break;
6429 } while (0);
6430
6431 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
6432 qla_nvme_register_hba(vha);
6433
6434 if (rval)
6435 ql_dbg(ql_dbg_disc, vha, 0x2068,
6436 "Configure fabric error exit rval=%d.\n", rval);
6437
6438 return (rval);
6439 }
6440
6441 /*
6442 * qla2x00_find_all_fabric_devs
6443 *
6444 * Input:
6445 * ha = adapter block pointer.
6446 * dev = database device entry pointer.
6447 *
6448 * Returns:
6449 * 0 = success.
6450 *
6451 * Context:
6452 * Kernel context.
6453 */
6454 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)6455 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
6456 {
6457 int rval;
6458 uint16_t loop_id;
6459 fc_port_t *fcport, *new_fcport;
6460 int found;
6461
6462 sw_info_t *swl;
6463 int swl_idx;
6464 int first_dev, last_dev;
6465 port_id_t wrap = {}, nxt_d_id;
6466 struct qla_hw_data *ha = vha->hw;
6467 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6468 unsigned long flags;
6469
6470 rval = QLA_SUCCESS;
6471
6472 /* Try GID_PT to get device list, else GAN. */
6473 if (!ha->swl)
6474 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
6475 GFP_KERNEL);
6476 swl = ha->swl;
6477 if (!swl) {
6478 /*EMPTY*/
6479 ql_dbg(ql_dbg_disc, vha, 0x209c,
6480 "GID_PT allocations failed, fallback on GA_NXT.\n");
6481 } else {
6482 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
6483 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
6484 swl = NULL;
6485 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6486 return rval;
6487 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
6488 swl = NULL;
6489 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6490 return rval;
6491 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
6492 swl = NULL;
6493 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6494 return rval;
6495 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
6496 swl = NULL;
6497 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6498 return rval;
6499 }
6500
6501 /* If other queries succeeded probe for FC-4 type */
6502 if (swl) {
6503 qla2x00_gff_id(vha, swl);
6504 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6505 return rval;
6506 }
6507 }
6508 swl_idx = 0;
6509
6510 /* Allocate temporary fcport for any new fcports discovered. */
6511 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6512 if (new_fcport == NULL) {
6513 ql_log(ql_log_warn, vha, 0x209d,
6514 "Failed to allocate memory for fcport.\n");
6515 return (QLA_MEMORY_ALLOC_FAILED);
6516 }
6517 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6518 /* Set start port ID scan at adapter ID. */
6519 first_dev = 1;
6520 last_dev = 0;
6521
6522 /* Starting free loop ID. */
6523 loop_id = ha->min_external_loopid;
6524 for (; loop_id <= ha->max_loop_id; loop_id++) {
6525 if (qla2x00_is_reserved_id(vha, loop_id))
6526 continue;
6527
6528 if (ha->current_topology == ISP_CFG_FL &&
6529 (atomic_read(&vha->loop_down_timer) ||
6530 LOOP_TRANSITION(vha))) {
6531 atomic_set(&vha->loop_down_timer, 0);
6532 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6533 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
6534 break;
6535 }
6536
6537 if (swl != NULL) {
6538 if (last_dev) {
6539 wrap.b24 = new_fcport->d_id.b24;
6540 } else {
6541 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
6542 memcpy(new_fcport->node_name,
6543 swl[swl_idx].node_name, WWN_SIZE);
6544 memcpy(new_fcport->port_name,
6545 swl[swl_idx].port_name, WWN_SIZE);
6546 memcpy(new_fcport->fabric_port_name,
6547 swl[swl_idx].fabric_port_name, WWN_SIZE);
6548 new_fcport->fp_speed = swl[swl_idx].fp_speed;
6549 new_fcport->fc4_type = swl[swl_idx].fc4_type;
6550
6551 new_fcport->nvme_flag = 0;
6552 if (vha->flags.nvme_enabled &&
6553 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6554 ql_log(ql_log_info, vha, 0x2131,
6555 "FOUND: NVME port %8phC as FC Type 28h\n",
6556 new_fcport->port_name);
6557 }
6558
6559 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6560 last_dev = 1;
6561 }
6562 swl_idx++;
6563 }
6564 } else {
6565 /* Send GA_NXT to the switch */
6566 rval = qla2x00_ga_nxt(vha, new_fcport);
6567 if (rval != QLA_SUCCESS) {
6568 ql_log(ql_log_warn, vha, 0x209e,
6569 "SNS scan failed -- assuming "
6570 "zero-entry result.\n");
6571 rval = QLA_SUCCESS;
6572 break;
6573 }
6574 }
6575
6576 /* If wrap on switch device list, exit. */
6577 if (first_dev) {
6578 wrap.b24 = new_fcport->d_id.b24;
6579 first_dev = 0;
6580 } else if (new_fcport->d_id.b24 == wrap.b24) {
6581 ql_dbg(ql_dbg_disc, vha, 0x209f,
6582 "Device wrap (%02x%02x%02x).\n",
6583 new_fcport->d_id.b.domain,
6584 new_fcport->d_id.b.area,
6585 new_fcport->d_id.b.al_pa);
6586 break;
6587 }
6588
6589 /* Bypass if same physical adapter. */
6590 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6591 continue;
6592
6593 /* Bypass virtual ports of the same host. */
6594 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6595 continue;
6596
6597 /* Bypass if same domain and area of adapter. */
6598 if (((new_fcport->d_id.b24 & 0xffff00) ==
6599 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6600 ISP_CFG_FL)
6601 continue;
6602
6603 /* Bypass reserved domain fields. */
6604 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6605 continue;
6606
6607 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
6608 if (ql2xgffidenable &&
6609 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6610 new_fcport->fc4_type != 0))
6611 continue;
6612
6613 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6614
6615 /* Locate matching device in database. */
6616 found = 0;
6617 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6618 if (memcmp(new_fcport->port_name, fcport->port_name,
6619 WWN_SIZE))
6620 continue;
6621
6622 fcport->scan_state = QLA_FCPORT_FOUND;
6623
6624 found++;
6625
6626 /* Update port state. */
6627 memcpy(fcport->fabric_port_name,
6628 new_fcport->fabric_port_name, WWN_SIZE);
6629 fcport->fp_speed = new_fcport->fp_speed;
6630
6631 /*
6632 * If address the same and state FCS_ONLINE
6633 * (or in target mode), nothing changed.
6634 */
6635 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6636 (atomic_read(&fcport->state) == FCS_ONLINE ||
6637 (vha->host->active_mode == MODE_TARGET))) {
6638 break;
6639 }
6640
6641 if (fcport->login_retry == 0)
6642 fcport->login_retry =
6643 vha->hw->login_retry_count;
6644 /*
6645 * If device was not a fabric device before.
6646 */
6647 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6648 fcport->d_id.b24 = new_fcport->d_id.b24;
6649 qla2x00_clear_loop_id(fcport);
6650 fcport->flags |= (FCF_FABRIC_DEVICE |
6651 FCF_LOGIN_NEEDED);
6652 break;
6653 }
6654
6655 /*
6656 * Port ID changed or device was marked to be updated;
6657 * Log it out if still logged in and mark it for
6658 * relogin later.
6659 */
6660 if (qla_tgt_mode_enabled(base_vha)) {
6661 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6662 "port changed FC ID, %8phC"
6663 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6664 fcport->port_name,
6665 fcport->d_id.b.domain,
6666 fcport->d_id.b.area,
6667 fcport->d_id.b.al_pa,
6668 fcport->loop_id,
6669 new_fcport->d_id.b.domain,
6670 new_fcport->d_id.b.area,
6671 new_fcport->d_id.b.al_pa);
6672 fcport->d_id.b24 = new_fcport->d_id.b24;
6673 break;
6674 }
6675
6676 fcport->d_id.b24 = new_fcport->d_id.b24;
6677 fcport->flags |= FCF_LOGIN_NEEDED;
6678 break;
6679 }
6680
6681 if (found && NVME_TARGET(vha->hw, fcport)) {
6682 if (fcport->disc_state == DSC_DELETE_PEND) {
6683 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
6684 vha->fcport_count--;
6685 fcport->login_succ = 0;
6686 }
6687 }
6688
6689 if (found) {
6690 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6691 continue;
6692 }
6693 /* If device was not in our fcports list, then add it. */
6694 new_fcport->scan_state = QLA_FCPORT_FOUND;
6695 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6696
6697 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6698
6699
6700 /* Allocate a new replacement fcport. */
6701 nxt_d_id.b24 = new_fcport->d_id.b24;
6702 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6703 if (new_fcport == NULL) {
6704 ql_log(ql_log_warn, vha, 0xd032,
6705 "Memory allocation failed for fcport.\n");
6706 return (QLA_MEMORY_ALLOC_FAILED);
6707 }
6708 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6709 new_fcport->d_id.b24 = nxt_d_id.b24;
6710 }
6711
6712 qla2x00_free_fcport(new_fcport);
6713
6714 /*
6715 * Logout all previous fabric dev marked lost, except FCP2 devices.
6716 */
6717 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6718 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6719 break;
6720
6721 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6722 continue;
6723
6724 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6725 if ((qla_dual_mode_enabled(vha) ||
6726 qla_ini_mode_enabled(vha)) &&
6727 atomic_read(&fcport->state) == FCS_ONLINE) {
6728 qla2x00_mark_device_lost(vha, fcport,
6729 ql2xplogiabsentdevice);
6730 if (fcport->loop_id != FC_NO_LOOP_ID &&
6731 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6732 fcport->port_type != FCT_INITIATOR &&
6733 fcport->port_type != FCT_BROADCAST) {
6734 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6735 "%s %d %8phC post del sess\n",
6736 __func__, __LINE__,
6737 fcport->port_name);
6738 qlt_schedule_sess_for_deletion(fcport);
6739 continue;
6740 }
6741 }
6742 }
6743
6744 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6745 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6746 qla24xx_fcport_handle_login(vha, fcport);
6747 }
6748 return (rval);
6749 }
6750
6751 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6752 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)6753 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6754 {
6755 int loop_id = FC_NO_LOOP_ID;
6756 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6757 unsigned long flags;
6758 struct qla_hw_data *ha = vha->hw;
6759
6760 if (vha->vp_idx == 0) {
6761 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6762 return NPH_MGMT_SERVER;
6763 }
6764
6765 /* pick id from high and work down to low */
6766 spin_lock_irqsave(&ha->vport_slock, flags);
6767 for (; lid > 0; lid--) {
6768 if (!test_bit(lid, vha->hw->loop_id_map)) {
6769 set_bit(lid, vha->hw->loop_id_map);
6770 loop_id = lid;
6771 break;
6772 }
6773 }
6774 spin_unlock_irqrestore(&ha->vport_slock, flags);
6775
6776 return loop_id;
6777 }
6778
6779 /*
6780 * qla2x00_fabric_login
6781 * Issue fabric login command.
6782 *
6783 * Input:
6784 * ha = adapter block pointer.
6785 * device = pointer to FC device type structure.
6786 *
6787 * Returns:
6788 * 0 - Login successfully
6789 * 1 - Login failed
6790 * 2 - Initiator device
6791 * 3 - Fatal error
6792 */
6793 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)6794 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6795 uint16_t *next_loopid)
6796 {
6797 int rval;
6798 int retry;
6799 uint16_t tmp_loopid;
6800 uint16_t mb[MAILBOX_REGISTER_COUNT];
6801 struct qla_hw_data *ha = vha->hw;
6802
6803 retry = 0;
6804 tmp_loopid = 0;
6805
6806 for (;;) {
6807 ql_dbg(ql_dbg_disc, vha, 0x2000,
6808 "Trying Fabric Login w/loop id 0x%04x for port "
6809 "%02x%02x%02x.\n",
6810 fcport->loop_id, fcport->d_id.b.domain,
6811 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6812
6813 /* Login fcport on switch. */
6814 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6815 fcport->d_id.b.domain, fcport->d_id.b.area,
6816 fcport->d_id.b.al_pa, mb, BIT_0);
6817 if (rval != QLA_SUCCESS) {
6818 return rval;
6819 }
6820 if (mb[0] == MBS_PORT_ID_USED) {
6821 /*
6822 * Device has another loop ID. The firmware team
6823 * recommends the driver perform an implicit login with
6824 * the specified ID again. The ID we just used is save
6825 * here so we return with an ID that can be tried by
6826 * the next login.
6827 */
6828 retry++;
6829 tmp_loopid = fcport->loop_id;
6830 fcport->loop_id = mb[1];
6831
6832 ql_dbg(ql_dbg_disc, vha, 0x2001,
6833 "Fabric Login: port in use - next loop "
6834 "id=0x%04x, port id= %02x%02x%02x.\n",
6835 fcport->loop_id, fcport->d_id.b.domain,
6836 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6837
6838 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6839 /*
6840 * Login succeeded.
6841 */
6842 if (retry) {
6843 /* A retry occurred before. */
6844 *next_loopid = tmp_loopid;
6845 } else {
6846 /*
6847 * No retry occurred before. Just increment the
6848 * ID value for next login.
6849 */
6850 *next_loopid = (fcport->loop_id + 1);
6851 }
6852
6853 if (mb[1] & BIT_0) {
6854 fcport->port_type = FCT_INITIATOR;
6855 } else {
6856 fcport->port_type = FCT_TARGET;
6857 if (mb[1] & BIT_1) {
6858 fcport->flags |= FCF_FCP2_DEVICE;
6859 }
6860 }
6861
6862 if (mb[10] & BIT_0)
6863 fcport->supported_classes |= FC_COS_CLASS2;
6864 if (mb[10] & BIT_1)
6865 fcport->supported_classes |= FC_COS_CLASS3;
6866
6867 if (IS_FWI2_CAPABLE(ha)) {
6868 if (mb[10] & BIT_7)
6869 fcport->flags |=
6870 FCF_CONF_COMP_SUPPORTED;
6871 }
6872
6873 rval = QLA_SUCCESS;
6874 break;
6875 } else if (mb[0] == MBS_LOOP_ID_USED) {
6876 /*
6877 * Loop ID already used, try next loop ID.
6878 */
6879 fcport->loop_id++;
6880 rval = qla2x00_find_new_loop_id(vha, fcport);
6881 if (rval != QLA_SUCCESS) {
6882 /* Ran out of loop IDs to use */
6883 break;
6884 }
6885 } else if (mb[0] == MBS_COMMAND_ERROR) {
6886 /*
6887 * Firmware possibly timed out during login. If NO
6888 * retries are left to do then the device is declared
6889 * dead.
6890 */
6891 *next_loopid = fcport->loop_id;
6892 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6893 fcport->d_id.b.domain, fcport->d_id.b.area,
6894 fcport->d_id.b.al_pa);
6895 qla2x00_mark_device_lost(vha, fcport, 1);
6896
6897 rval = 1;
6898 break;
6899 } else {
6900 /*
6901 * unrecoverable / not handled error
6902 */
6903 ql_dbg(ql_dbg_disc, vha, 0x2002,
6904 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6905 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6906 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6907 fcport->loop_id, jiffies);
6908
6909 *next_loopid = fcport->loop_id;
6910 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6911 fcport->d_id.b.domain, fcport->d_id.b.area,
6912 fcport->d_id.b.al_pa);
6913 qla2x00_clear_loop_id(fcport);
6914 fcport->login_retry = 0;
6915
6916 rval = 3;
6917 break;
6918 }
6919 }
6920
6921 return (rval);
6922 }
6923
6924 /*
6925 * qla2x00_local_device_login
6926 * Issue local device login command.
6927 *
6928 * Input:
6929 * ha = adapter block pointer.
6930 * loop_id = loop id of device to login to.
6931 *
6932 * Returns (Where's the #define!!!!):
6933 * 0 - Login successfully
6934 * 1 - Login failed
6935 * 3 - Fatal error
6936 */
6937 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6938 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6939 {
6940 int rval;
6941 uint16_t mb[MAILBOX_REGISTER_COUNT];
6942
6943 memset(mb, 0, sizeof(mb));
6944 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6945 if (rval == QLA_SUCCESS) {
6946 /* Interrogate mailbox registers for any errors */
6947 if (mb[0] == MBS_COMMAND_ERROR)
6948 rval = 1;
6949 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6950 /* device not in PCB table */
6951 rval = 3;
6952 }
6953
6954 return (rval);
6955 }
6956
6957 /*
6958 * qla2x00_loop_resync
6959 * Resync with fibre channel devices.
6960 *
6961 * Input:
6962 * ha = adapter block pointer.
6963 *
6964 * Returns:
6965 * 0 = success
6966 */
6967 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6968 qla2x00_loop_resync(scsi_qla_host_t *vha)
6969 {
6970 int rval = QLA_SUCCESS;
6971 uint32_t wait_time;
6972
6973 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6974 if (vha->flags.online) {
6975 if (!(rval = qla2x00_fw_ready(vha))) {
6976 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6977 wait_time = 256;
6978 do {
6979 if (!IS_QLAFX00(vha->hw)) {
6980 /*
6981 * Issue a marker after FW becomes
6982 * ready.
6983 */
6984 qla2x00_marker(vha, vha->hw->base_qpair,
6985 0, 0, MK_SYNC_ALL);
6986 vha->marker_needed = 0;
6987 }
6988
6989 /* Remap devices on Loop. */
6990 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6991
6992 if (IS_QLAFX00(vha->hw))
6993 qlafx00_configure_devices(vha);
6994 else
6995 qla2x00_configure_loop(vha);
6996
6997 wait_time--;
6998 } while (!atomic_read(&vha->loop_down_timer) &&
6999 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
7000 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
7001 &vha->dpc_flags)));
7002 }
7003 }
7004
7005 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
7006 return (QLA_FUNCTION_FAILED);
7007
7008 if (rval)
7009 ql_dbg(ql_dbg_disc, vha, 0x206c,
7010 "%s *** FAILED ***.\n", __func__);
7011
7012 return (rval);
7013 }
7014
7015 /*
7016 * qla2x00_perform_loop_resync
7017 * Description: This function will set the appropriate flags and call
7018 * qla2x00_loop_resync. If successful loop will be resynced
7019 * Arguments : scsi_qla_host_t pointer
7020 * returm : Success or Failure
7021 */
7022
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)7023 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
7024 {
7025 int32_t rval = 0;
7026
7027 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
7028 /*Configure the flags so that resync happens properly*/
7029 atomic_set(&ha->loop_down_timer, 0);
7030 if (!(ha->device_flags & DFLG_NO_CABLE)) {
7031 atomic_set(&ha->loop_state, LOOP_UP);
7032 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
7033 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
7034 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
7035
7036 rval = qla2x00_loop_resync(ha);
7037 } else
7038 atomic_set(&ha->loop_state, LOOP_DEAD);
7039
7040 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
7041 }
7042
7043 return rval;
7044 }
7045
7046 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)7047 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
7048 {
7049 fc_port_t *fcport;
7050 struct scsi_qla_host *vha, *tvp;
7051 struct qla_hw_data *ha = base_vha->hw;
7052 unsigned long flags;
7053
7054 spin_lock_irqsave(&ha->vport_slock, flags);
7055 /* Go with deferred removal of rport references. */
7056 list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list) {
7057 atomic_inc(&vha->vref_count);
7058 list_for_each_entry(fcport, &vha->vp_fcports, list) {
7059 if (fcport->drport &&
7060 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
7061 spin_unlock_irqrestore(&ha->vport_slock, flags);
7062 qla2x00_rport_del(fcport);
7063
7064 spin_lock_irqsave(&ha->vport_slock, flags);
7065 }
7066 }
7067 atomic_dec(&vha->vref_count);
7068 wake_up(&vha->vref_waitq);
7069 }
7070 spin_unlock_irqrestore(&ha->vport_slock, flags);
7071 }
7072
7073 /* Assumes idc_lock always held on entry */
7074 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)7075 qla83xx_reset_ownership(scsi_qla_host_t *vha)
7076 {
7077 struct qla_hw_data *ha = vha->hw;
7078 uint32_t drv_presence, drv_presence_mask;
7079 uint32_t dev_part_info1, dev_part_info2, class_type;
7080 uint32_t class_type_mask = 0x3;
7081 uint16_t fcoe_other_function = 0xffff, i;
7082
7083 if (IS_QLA8044(ha)) {
7084 drv_presence = qla8044_rd_direct(vha,
7085 QLA8044_CRB_DRV_ACTIVE_INDEX);
7086 dev_part_info1 = qla8044_rd_direct(vha,
7087 QLA8044_CRB_DEV_PART_INFO_INDEX);
7088 dev_part_info2 = qla8044_rd_direct(vha,
7089 QLA8044_CRB_DEV_PART_INFO2);
7090 } else {
7091 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7092 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
7093 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
7094 }
7095 for (i = 0; i < 8; i++) {
7096 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
7097 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7098 (i != ha->portnum)) {
7099 fcoe_other_function = i;
7100 break;
7101 }
7102 }
7103 if (fcoe_other_function == 0xffff) {
7104 for (i = 0; i < 8; i++) {
7105 class_type = ((dev_part_info2 >> (i * 4)) &
7106 class_type_mask);
7107 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7108 ((i + 8) != ha->portnum)) {
7109 fcoe_other_function = i + 8;
7110 break;
7111 }
7112 }
7113 }
7114 /*
7115 * Prepare drv-presence mask based on fcoe functions present.
7116 * However consider only valid physical fcoe function numbers (0-15).
7117 */
7118 drv_presence_mask = ~((1 << (ha->portnum)) |
7119 ((fcoe_other_function == 0xffff) ?
7120 0 : (1 << (fcoe_other_function))));
7121
7122 /* We are the reset owner iff:
7123 * - No other protocol drivers present.
7124 * - This is the lowest among fcoe functions. */
7125 if (!(drv_presence & drv_presence_mask) &&
7126 (ha->portnum < fcoe_other_function)) {
7127 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
7128 "This host is Reset owner.\n");
7129 ha->flags.nic_core_reset_owner = 1;
7130 }
7131 }
7132
7133 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)7134 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
7135 {
7136 int rval = QLA_SUCCESS;
7137 struct qla_hw_data *ha = vha->hw;
7138 uint32_t drv_ack;
7139
7140 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7141 if (rval == QLA_SUCCESS) {
7142 drv_ack |= (1 << ha->portnum);
7143 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7144 }
7145
7146 return rval;
7147 }
7148
7149 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)7150 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
7151 {
7152 int rval = QLA_SUCCESS;
7153 struct qla_hw_data *ha = vha->hw;
7154 uint32_t drv_ack;
7155
7156 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7157 if (rval == QLA_SUCCESS) {
7158 drv_ack &= ~(1 << ha->portnum);
7159 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7160 }
7161
7162 return rval;
7163 }
7164
7165 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)7166 qla83xx_dev_state_to_string(uint32_t dev_state)
7167 {
7168 switch (dev_state) {
7169 case QLA8XXX_DEV_COLD:
7170 return "COLD/RE-INIT";
7171 case QLA8XXX_DEV_INITIALIZING:
7172 return "INITIALIZING";
7173 case QLA8XXX_DEV_READY:
7174 return "READY";
7175 case QLA8XXX_DEV_NEED_RESET:
7176 return "NEED RESET";
7177 case QLA8XXX_DEV_NEED_QUIESCENT:
7178 return "NEED QUIESCENT";
7179 case QLA8XXX_DEV_FAILED:
7180 return "FAILED";
7181 case QLA8XXX_DEV_QUIESCENT:
7182 return "QUIESCENT";
7183 default:
7184 return "Unknown";
7185 }
7186 }
7187
7188 /* Assumes idc-lock always held on entry */
7189 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)7190 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
7191 {
7192 struct qla_hw_data *ha = vha->hw;
7193 uint32_t idc_audit_reg = 0, duration_secs = 0;
7194
7195 switch (audit_type) {
7196 case IDC_AUDIT_TIMESTAMP:
7197 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
7198 idc_audit_reg = (ha->portnum) |
7199 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
7200 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7201 break;
7202
7203 case IDC_AUDIT_COMPLETION:
7204 duration_secs = ((jiffies_to_msecs(jiffies) -
7205 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
7206 idc_audit_reg = (ha->portnum) |
7207 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
7208 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7209 break;
7210
7211 default:
7212 ql_log(ql_log_warn, vha, 0xb078,
7213 "Invalid audit type specified.\n");
7214 break;
7215 }
7216 }
7217
7218 /* Assumes idc_lock always held on entry */
7219 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)7220 qla83xx_initiating_reset(scsi_qla_host_t *vha)
7221 {
7222 struct qla_hw_data *ha = vha->hw;
7223 uint32_t idc_control, dev_state;
7224
7225 __qla83xx_get_idc_control(vha, &idc_control);
7226 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
7227 ql_log(ql_log_info, vha, 0xb080,
7228 "NIC Core reset has been disabled. idc-control=0x%x\n",
7229 idc_control);
7230 return QLA_FUNCTION_FAILED;
7231 }
7232
7233 /* Set NEED-RESET iff in READY state and we are the reset-owner */
7234 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7235 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
7236 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
7237 QLA8XXX_DEV_NEED_RESET);
7238 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
7239 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
7240 } else {
7241 const char *state = qla83xx_dev_state_to_string(dev_state);
7242
7243 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
7244
7245 /* SV: XXX: Is timeout required here? */
7246 /* Wait for IDC state change READY -> NEED_RESET */
7247 while (dev_state == QLA8XXX_DEV_READY) {
7248 qla83xx_idc_unlock(vha, 0);
7249 msleep(200);
7250 qla83xx_idc_lock(vha, 0);
7251 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7252 }
7253 }
7254
7255 /* Send IDC ack by writing to drv-ack register */
7256 __qla83xx_set_drv_ack(vha);
7257
7258 return QLA_SUCCESS;
7259 }
7260
7261 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)7262 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
7263 {
7264 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7265 }
7266
7267 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)7268 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
7269 {
7270 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7271 }
7272
7273 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)7274 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
7275 {
7276 uint32_t drv_presence = 0;
7277 struct qla_hw_data *ha = vha->hw;
7278
7279 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7280 if (drv_presence & (1 << ha->portnum))
7281 return QLA_SUCCESS;
7282 else
7283 return QLA_TEST_FAILED;
7284 }
7285
7286 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)7287 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
7288 {
7289 int rval = QLA_SUCCESS;
7290 struct qla_hw_data *ha = vha->hw;
7291
7292 ql_dbg(ql_dbg_p3p, vha, 0xb058,
7293 "Entered %s().\n", __func__);
7294
7295 if (vha->device_flags & DFLG_DEV_FAILED) {
7296 ql_log(ql_log_warn, vha, 0xb059,
7297 "Device in unrecoverable FAILED state.\n");
7298 return QLA_FUNCTION_FAILED;
7299 }
7300
7301 qla83xx_idc_lock(vha, 0);
7302
7303 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
7304 ql_log(ql_log_warn, vha, 0xb05a,
7305 "Function=0x%x has been removed from IDC participation.\n",
7306 ha->portnum);
7307 rval = QLA_FUNCTION_FAILED;
7308 goto exit;
7309 }
7310
7311 qla83xx_reset_ownership(vha);
7312
7313 rval = qla83xx_initiating_reset(vha);
7314
7315 /*
7316 * Perform reset if we are the reset-owner,
7317 * else wait till IDC state changes to READY/FAILED.
7318 */
7319 if (rval == QLA_SUCCESS) {
7320 rval = qla83xx_idc_state_handler(vha);
7321
7322 if (rval == QLA_SUCCESS)
7323 ha->flags.nic_core_hung = 0;
7324 __qla83xx_clear_drv_ack(vha);
7325 }
7326
7327 exit:
7328 qla83xx_idc_unlock(vha, 0);
7329
7330 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
7331
7332 return rval;
7333 }
7334
7335 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)7336 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
7337 {
7338 struct qla_hw_data *ha = vha->hw;
7339 int rval = QLA_FUNCTION_FAILED;
7340
7341 if (!IS_MCTP_CAPABLE(ha)) {
7342 /* This message can be removed from the final version */
7343 ql_log(ql_log_info, vha, 0x506d,
7344 "This board is not MCTP capable\n");
7345 return rval;
7346 }
7347
7348 if (!ha->mctp_dump) {
7349 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
7350 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
7351
7352 if (!ha->mctp_dump) {
7353 ql_log(ql_log_warn, vha, 0x506e,
7354 "Failed to allocate memory for mctp dump\n");
7355 return rval;
7356 }
7357 }
7358
7359 #define MCTP_DUMP_STR_ADDR 0x00000000
7360 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
7361 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
7362 if (rval != QLA_SUCCESS) {
7363 ql_log(ql_log_warn, vha, 0x506f,
7364 "Failed to capture mctp dump\n");
7365 } else {
7366 ql_log(ql_log_info, vha, 0x5070,
7367 "Mctp dump capture for host (%ld/%p).\n",
7368 vha->host_no, ha->mctp_dump);
7369 ha->mctp_dumped = 1;
7370 }
7371
7372 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
7373 ha->flags.nic_core_reset_hdlr_active = 1;
7374 rval = qla83xx_restart_nic_firmware(vha);
7375 if (rval)
7376 /* NIC Core reset failed. */
7377 ql_log(ql_log_warn, vha, 0x5071,
7378 "Failed to restart nic firmware\n");
7379 else
7380 ql_dbg(ql_dbg_p3p, vha, 0xb084,
7381 "Restarted NIC firmware successfully.\n");
7382 ha->flags.nic_core_reset_hdlr_active = 0;
7383 }
7384
7385 return rval;
7386
7387 }
7388
7389 /*
7390 * qla2x00_quiesce_io
7391 * Description: This function will block the new I/Os
7392 * Its not aborting any I/Os as context
7393 * is not destroyed during quiescence
7394 * Arguments: scsi_qla_host_t
7395 * return : void
7396 */
7397 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)7398 qla2x00_quiesce_io(scsi_qla_host_t *vha)
7399 {
7400 struct qla_hw_data *ha = vha->hw;
7401 struct scsi_qla_host *vp, *tvp;
7402 unsigned long flags;
7403
7404 ql_dbg(ql_dbg_dpc, vha, 0x401d,
7405 "Quiescing I/O - ha=%p.\n", ha);
7406
7407 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
7408 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7409 atomic_set(&vha->loop_state, LOOP_DOWN);
7410 qla2x00_mark_all_devices_lost(vha);
7411
7412 spin_lock_irqsave(&ha->vport_slock, flags);
7413 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7414 atomic_inc(&vp->vref_count);
7415 spin_unlock_irqrestore(&ha->vport_slock, flags);
7416
7417 qla2x00_mark_all_devices_lost(vp);
7418
7419 spin_lock_irqsave(&ha->vport_slock, flags);
7420 atomic_dec(&vp->vref_count);
7421 }
7422 spin_unlock_irqrestore(&ha->vport_slock, flags);
7423 } else {
7424 if (!atomic_read(&vha->loop_down_timer))
7425 atomic_set(&vha->loop_down_timer,
7426 LOOP_DOWN_TIME);
7427 }
7428 /* Wait for pending cmds to complete */
7429 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
7430 != QLA_SUCCESS);
7431 }
7432
7433 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)7434 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
7435 {
7436 struct qla_hw_data *ha = vha->hw;
7437 struct scsi_qla_host *vp, *tvp;
7438 unsigned long flags;
7439 fc_port_t *fcport;
7440 u16 i;
7441
7442 /* For ISP82XX, driver waits for completion of the commands.
7443 * online flag should be set.
7444 */
7445 if (!(IS_P3P_TYPE(ha)))
7446 vha->flags.online = 0;
7447 ha->flags.chip_reset_done = 0;
7448 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
7449 vha->qla_stats.total_isp_aborts++;
7450
7451 ql_log(ql_log_info, vha, 0x00af,
7452 "Performing ISP error recovery - ha=%p.\n", ha);
7453
7454 ha->flags.purge_mbox = 1;
7455 /* For ISP82XX, reset_chip is just disabling interrupts.
7456 * Driver waits for the completion of the commands.
7457 * the interrupts need to be enabled.
7458 */
7459 if (!(IS_P3P_TYPE(ha)))
7460 ha->isp_ops->reset_chip(vha);
7461
7462 ha->link_data_rate = PORT_SPEED_UNKNOWN;
7463 SAVE_TOPO(ha);
7464 ha->flags.rida_fmt2 = 0;
7465 ha->flags.n2n_ae = 0;
7466 ha->flags.lip_ae = 0;
7467 ha->current_topology = 0;
7468 QLA_FW_STOPPED(ha);
7469 ha->flags.fw_init_done = 0;
7470 ha->chip_reset++;
7471 ha->base_qpair->chip_reset = ha->chip_reset;
7472 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
7473 ha->base_qpair->prev_completion_cnt = 0;
7474 for (i = 0; i < ha->max_qpairs; i++) {
7475 if (ha->queue_pair_map[i]) {
7476 ha->queue_pair_map[i]->chip_reset =
7477 ha->base_qpair->chip_reset;
7478 ha->queue_pair_map[i]->cmd_cnt =
7479 ha->queue_pair_map[i]->cmd_completion_cnt = 0;
7480 ha->base_qpair->prev_completion_cnt = 0;
7481 }
7482 }
7483
7484 /* purge MBox commands */
7485 spin_lock_irqsave(&ha->hardware_lock, flags);
7486 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) {
7487 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7488 complete(&ha->mbx_intr_comp);
7489 }
7490 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7491
7492 i = 0;
7493 while (atomic_read(&ha->num_pend_mbx_stage2) ||
7494 atomic_read(&ha->num_pend_mbx_stage1)) {
7495 msleep(20);
7496 i++;
7497 if (i > 50)
7498 break;
7499 }
7500 ha->flags.purge_mbox = 0;
7501
7502 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
7503 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7504 atomic_set(&vha->loop_state, LOOP_DOWN);
7505 qla2x00_mark_all_devices_lost(vha);
7506
7507 spin_lock_irqsave(&ha->vport_slock, flags);
7508 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7509 atomic_inc(&vp->vref_count);
7510 spin_unlock_irqrestore(&ha->vport_slock, flags);
7511
7512 qla2x00_mark_all_devices_lost(vp);
7513
7514 spin_lock_irqsave(&ha->vport_slock, flags);
7515 atomic_dec(&vp->vref_count);
7516 }
7517 spin_unlock_irqrestore(&ha->vport_slock, flags);
7518 } else {
7519 if (!atomic_read(&vha->loop_down_timer))
7520 atomic_set(&vha->loop_down_timer,
7521 LOOP_DOWN_TIME);
7522 }
7523
7524 /* Clear all async request states across all VPs. */
7525 list_for_each_entry(fcport, &vha->vp_fcports, list) {
7526 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7527 fcport->scan_state = 0;
7528 }
7529 spin_lock_irqsave(&ha->vport_slock, flags);
7530 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7531 atomic_inc(&vp->vref_count);
7532 spin_unlock_irqrestore(&ha->vport_slock, flags);
7533
7534 list_for_each_entry(fcport, &vp->vp_fcports, list)
7535 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7536
7537 spin_lock_irqsave(&ha->vport_slock, flags);
7538 atomic_dec(&vp->vref_count);
7539 }
7540 spin_unlock_irqrestore(&ha->vport_slock, flags);
7541
7542 /* Make sure for ISP 82XX IO DMA is complete */
7543 if (IS_P3P_TYPE(ha)) {
7544 qla82xx_chip_reset_cleanup(vha);
7545 ql_log(ql_log_info, vha, 0x00b4,
7546 "Done chip reset cleanup.\n");
7547
7548 /* Done waiting for pending commands. Reset online flag */
7549 vha->flags.online = 0;
7550 }
7551
7552 /* Requeue all commands in outstanding command list. */
7553 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
7554 /* memory barrier */
7555 wmb();
7556 }
7557
7558 /*
7559 * qla2x00_abort_isp
7560 * Resets ISP and aborts all outstanding commands.
7561 *
7562 * Input:
7563 * ha = adapter block pointer.
7564 *
7565 * Returns:
7566 * 0 = success
7567 */
7568 int
qla2x00_abort_isp(scsi_qla_host_t * vha)7569 qla2x00_abort_isp(scsi_qla_host_t *vha)
7570 {
7571 int rval;
7572 uint8_t status = 0;
7573 struct qla_hw_data *ha = vha->hw;
7574 struct scsi_qla_host *vp, *tvp;
7575 struct req_que *req = ha->req_q_map[0];
7576 unsigned long flags;
7577
7578 if (vha->flags.online) {
7579 qla2x00_abort_isp_cleanup(vha);
7580
7581 if (vha->hw->flags.port_isolated)
7582 return status;
7583
7584 if (qla2x00_isp_reg_stat(ha)) {
7585 ql_log(ql_log_info, vha, 0x803f,
7586 "ISP Abort - ISP reg disconnect, exiting.\n");
7587 return status;
7588 }
7589
7590 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
7591 ha->flags.chip_reset_done = 1;
7592 vha->flags.online = 1;
7593 status = 0;
7594 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7595 return status;
7596 }
7597
7598 if (IS_QLA8031(ha)) {
7599 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7600 "Clearing fcoe driver presence.\n");
7601 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7602 ql_dbg(ql_dbg_p3p, vha, 0xb073,
7603 "Error while clearing DRV-Presence.\n");
7604 }
7605
7606 if (unlikely(pci_channel_offline(ha->pdev) &&
7607 ha->flags.pci_channel_io_perm_failure)) {
7608 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7609 status = 0;
7610 return status;
7611 }
7612
7613 switch (vha->qlini_mode) {
7614 case QLA2XXX_INI_MODE_DISABLED:
7615 if (!qla_tgt_mode_enabled(vha))
7616 return 0;
7617 break;
7618 case QLA2XXX_INI_MODE_DUAL:
7619 if (!qla_dual_mode_enabled(vha) &&
7620 !qla_ini_mode_enabled(vha))
7621 return 0;
7622 break;
7623 case QLA2XXX_INI_MODE_ENABLED:
7624 default:
7625 break;
7626 }
7627
7628 ha->isp_ops->get_flash_version(vha, req->ring);
7629
7630 if (qla2x00_isp_reg_stat(ha)) {
7631 ql_log(ql_log_info, vha, 0x803f,
7632 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
7633 return status;
7634 }
7635 ha->isp_ops->nvram_config(vha);
7636
7637 if (qla2x00_isp_reg_stat(ha)) {
7638 ql_log(ql_log_info, vha, 0x803f,
7639 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
7640 return status;
7641 }
7642 if (!qla2x00_restart_isp(vha)) {
7643 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7644
7645 if (!atomic_read(&vha->loop_down_timer)) {
7646 /*
7647 * Issue marker command only when we are going
7648 * to start the I/O .
7649 */
7650 vha->marker_needed = 1;
7651 }
7652
7653 vha->flags.online = 1;
7654
7655 ha->isp_ops->enable_intrs(ha);
7656
7657 ha->isp_abort_cnt = 0;
7658 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7659
7660 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7661 qla2x00_get_fw_version(vha);
7662 if (ha->fce) {
7663 ha->flags.fce_enabled = 1;
7664 memset(ha->fce, 0,
7665 fce_calc_size(ha->fce_bufs));
7666 rval = qla2x00_enable_fce_trace(vha,
7667 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
7668 &ha->fce_bufs);
7669 if (rval) {
7670 ql_log(ql_log_warn, vha, 0x8033,
7671 "Unable to reinitialize FCE "
7672 "(%d).\n", rval);
7673 ha->flags.fce_enabled = 0;
7674 }
7675 }
7676
7677 if (ha->eft) {
7678 memset(ha->eft, 0, EFT_SIZE);
7679 rval = qla2x00_enable_eft_trace(vha,
7680 ha->eft_dma, EFT_NUM_BUFFERS);
7681 if (rval) {
7682 ql_log(ql_log_warn, vha, 0x8034,
7683 "Unable to reinitialize EFT "
7684 "(%d).\n", rval);
7685 }
7686 }
7687 } else { /* failed the ISP abort */
7688 vha->flags.online = 1;
7689 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7690 if (ha->isp_abort_cnt == 0) {
7691 ql_log(ql_log_fatal, vha, 0x8035,
7692 "ISP error recover failed - "
7693 "board disabled.\n");
7694 /*
7695 * The next call disables the board
7696 * completely.
7697 */
7698 qla2x00_abort_isp_cleanup(vha);
7699 vha->flags.online = 0;
7700 clear_bit(ISP_ABORT_RETRY,
7701 &vha->dpc_flags);
7702 status = 0;
7703 } else { /* schedule another ISP abort */
7704 ha->isp_abort_cnt--;
7705 ql_dbg(ql_dbg_taskm, vha, 0x8020,
7706 "ISP abort - retry remaining %d.\n",
7707 ha->isp_abort_cnt);
7708 status = 1;
7709 }
7710 } else {
7711 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7712 ql_dbg(ql_dbg_taskm, vha, 0x8021,
7713 "ISP error recovery - retrying (%d) "
7714 "more times.\n", ha->isp_abort_cnt);
7715 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7716 status = 1;
7717 }
7718 }
7719
7720 }
7721
7722 if (vha->hw->flags.port_isolated) {
7723 qla2x00_abort_isp_cleanup(vha);
7724 return status;
7725 }
7726
7727 if (!status) {
7728 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
7729 qla2x00_configure_hba(vha);
7730 spin_lock_irqsave(&ha->vport_slock, flags);
7731 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7732 if (vp->vp_idx) {
7733 atomic_inc(&vp->vref_count);
7734 spin_unlock_irqrestore(&ha->vport_slock, flags);
7735
7736 qla2x00_vp_abort_isp(vp);
7737
7738 spin_lock_irqsave(&ha->vport_slock, flags);
7739 atomic_dec(&vp->vref_count);
7740 }
7741 }
7742 spin_unlock_irqrestore(&ha->vport_slock, flags);
7743
7744 if (IS_QLA8031(ha)) {
7745 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7746 "Setting back fcoe driver presence.\n");
7747 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7748 ql_dbg(ql_dbg_p3p, vha, 0xb074,
7749 "Error while setting DRV-Presence.\n");
7750 }
7751 } else {
7752 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7753 __func__);
7754 }
7755
7756 return(status);
7757 }
7758
7759 /*
7760 * qla2x00_restart_isp
7761 * restarts the ISP after a reset
7762 *
7763 * Input:
7764 * ha = adapter block pointer.
7765 *
7766 * Returns:
7767 * 0 = success
7768 */
7769 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)7770 qla2x00_restart_isp(scsi_qla_host_t *vha)
7771 {
7772 int status;
7773 struct qla_hw_data *ha = vha->hw;
7774
7775 /* If firmware needs to be loaded */
7776 if (qla2x00_isp_firmware(vha)) {
7777 vha->flags.online = 0;
7778 status = ha->isp_ops->chip_diag(vha);
7779 if (status)
7780 return status;
7781 status = qla2x00_setup_chip(vha);
7782 if (status)
7783 return status;
7784 }
7785
7786 status = qla2x00_init_rings(vha);
7787 if (status)
7788 return status;
7789
7790 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7791 ha->flags.chip_reset_done = 1;
7792
7793 /* Initialize the queues in use */
7794 qla25xx_init_queues(ha);
7795
7796 status = qla2x00_fw_ready(vha);
7797 if (status) {
7798 /* if no cable then assume it's good */
7799 return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7800 }
7801
7802 /* Issue a marker after FW becomes ready. */
7803 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7804 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7805
7806 return 0;
7807 }
7808
7809 static int
qla25xx_init_queues(struct qla_hw_data * ha)7810 qla25xx_init_queues(struct qla_hw_data *ha)
7811 {
7812 struct rsp_que *rsp = NULL;
7813 struct req_que *req = NULL;
7814 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7815 int ret = -1;
7816 int i;
7817
7818 for (i = 1; i < ha->max_rsp_queues; i++) {
7819 rsp = ha->rsp_q_map[i];
7820 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7821 rsp->options &= ~BIT_0;
7822 ret = qla25xx_init_rsp_que(base_vha, rsp);
7823 if (ret != QLA_SUCCESS)
7824 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7825 "%s Rsp que: %d init failed.\n",
7826 __func__, rsp->id);
7827 else
7828 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7829 "%s Rsp que: %d inited.\n",
7830 __func__, rsp->id);
7831 }
7832 }
7833 for (i = 1; i < ha->max_req_queues; i++) {
7834 req = ha->req_q_map[i];
7835 if (req && test_bit(i, ha->req_qid_map)) {
7836 /* Clear outstanding commands array. */
7837 req->options &= ~BIT_0;
7838 ret = qla25xx_init_req_que(base_vha, req);
7839 if (ret != QLA_SUCCESS)
7840 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7841 "%s Req que: %d init failed.\n",
7842 __func__, req->id);
7843 else
7844 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7845 "%s Req que: %d inited.\n",
7846 __func__, req->id);
7847 }
7848 }
7849 return ret;
7850 }
7851
7852 /*
7853 * qla2x00_reset_adapter
7854 * Reset adapter.
7855 *
7856 * Input:
7857 * ha = adapter block pointer.
7858 */
7859 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)7860 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7861 {
7862 unsigned long flags = 0;
7863 struct qla_hw_data *ha = vha->hw;
7864 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7865
7866 vha->flags.online = 0;
7867 ha->isp_ops->disable_intrs(ha);
7868
7869 spin_lock_irqsave(&ha->hardware_lock, flags);
7870 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
7871 rd_reg_word(®->hccr); /* PCI Posting. */
7872 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
7873 rd_reg_word(®->hccr); /* PCI Posting. */
7874 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7875
7876 return QLA_SUCCESS;
7877 }
7878
7879 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7880 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7881 {
7882 unsigned long flags = 0;
7883 struct qla_hw_data *ha = vha->hw;
7884 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7885
7886 if (IS_P3P_TYPE(ha))
7887 return QLA_SUCCESS;
7888
7889 vha->flags.online = 0;
7890 ha->isp_ops->disable_intrs(ha);
7891
7892 spin_lock_irqsave(&ha->hardware_lock, flags);
7893 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
7894 rd_reg_dword(®->hccr);
7895 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
7896 rd_reg_dword(®->hccr);
7897 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7898
7899 if (IS_NOPOLLING_TYPE(ha))
7900 ha->isp_ops->enable_intrs(ha);
7901
7902 return QLA_SUCCESS;
7903 }
7904
7905 /* On sparc systems, obtain port and node WWN from firmware
7906 * properties.
7907 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7908 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7909 struct nvram_24xx *nv)
7910 {
7911 #ifdef CONFIG_SPARC
7912 struct qla_hw_data *ha = vha->hw;
7913 struct pci_dev *pdev = ha->pdev;
7914 struct device_node *dp = pci_device_to_OF_node(pdev);
7915 const u8 *val;
7916 int len;
7917
7918 val = of_get_property(dp, "port-wwn", &len);
7919 if (val && len >= WWN_SIZE)
7920 memcpy(nv->port_name, val, WWN_SIZE);
7921
7922 val = of_get_property(dp, "node-wwn", &len);
7923 if (val && len >= WWN_SIZE)
7924 memcpy(nv->node_name, val, WWN_SIZE);
7925 #endif
7926 }
7927
7928 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7929 qla24xx_nvram_config(scsi_qla_host_t *vha)
7930 {
7931 int rval;
7932 struct init_cb_24xx *icb;
7933 struct nvram_24xx *nv;
7934 __le32 *dptr;
7935 uint8_t *dptr1, *dptr2;
7936 uint32_t chksum;
7937 uint16_t cnt;
7938 struct qla_hw_data *ha = vha->hw;
7939
7940 rval = QLA_SUCCESS;
7941 icb = (struct init_cb_24xx *)ha->init_cb;
7942 nv = ha->nvram;
7943
7944 /* Determine NVRAM starting address. */
7945 if (ha->port_no == 0) {
7946 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7947 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7948 } else {
7949 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7950 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7951 }
7952
7953 ha->nvram_size = sizeof(*nv);
7954 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7955
7956 /* Get VPD data into cache */
7957 ha->vpd = ha->nvram + VPD_OFFSET;
7958 ha->isp_ops->read_nvram(vha, ha->vpd,
7959 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7960
7961 /* Get NVRAM data into cache and calculate checksum. */
7962 dptr = (__force __le32 *)nv;
7963 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7964 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7965 chksum += le32_to_cpu(*dptr);
7966
7967 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7968 "Contents of NVRAM\n");
7969 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7970 nv, ha->nvram_size);
7971
7972 /* Bad NVRAM data, set defaults parameters. */
7973 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7974 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7975 /* Reset NVRAM data. */
7976 ql_log(ql_log_warn, vha, 0x006b,
7977 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7978 chksum, nv->id, nv->nvram_version);
7979 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7980 ql_log(ql_log_warn, vha, 0x006c,
7981 "Falling back to functioning (yet invalid -- WWPN) "
7982 "defaults.\n");
7983
7984 /*
7985 * Set default initialization control block.
7986 */
7987 memset(nv, 0, ha->nvram_size);
7988 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7989 nv->version = cpu_to_le16(ICB_VERSION);
7990 nv->frame_payload_size = cpu_to_le16(2048);
7991 nv->execution_throttle = cpu_to_le16(0xFFFF);
7992 nv->exchange_count = cpu_to_le16(0);
7993 nv->hard_address = cpu_to_le16(124);
7994 nv->port_name[0] = 0x21;
7995 nv->port_name[1] = 0x00 + ha->port_no + 1;
7996 nv->port_name[2] = 0x00;
7997 nv->port_name[3] = 0xe0;
7998 nv->port_name[4] = 0x8b;
7999 nv->port_name[5] = 0x1c;
8000 nv->port_name[6] = 0x55;
8001 nv->port_name[7] = 0x86;
8002 nv->node_name[0] = 0x20;
8003 nv->node_name[1] = 0x00;
8004 nv->node_name[2] = 0x00;
8005 nv->node_name[3] = 0xe0;
8006 nv->node_name[4] = 0x8b;
8007 nv->node_name[5] = 0x1c;
8008 nv->node_name[6] = 0x55;
8009 nv->node_name[7] = 0x86;
8010 qla24xx_nvram_wwn_from_ofw(vha, nv);
8011 nv->login_retry_count = cpu_to_le16(8);
8012 nv->interrupt_delay_timer = cpu_to_le16(0);
8013 nv->login_timeout = cpu_to_le16(0);
8014 nv->firmware_options_1 =
8015 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8016 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8017 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8018 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8019 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8020 nv->efi_parameters = cpu_to_le32(0);
8021 nv->reset_delay = 5;
8022 nv->max_luns_per_target = cpu_to_le16(128);
8023 nv->port_down_retry_count = cpu_to_le16(30);
8024 nv->link_down_timeout = cpu_to_le16(30);
8025
8026 rval = 1;
8027 }
8028
8029 if (qla_tgt_mode_enabled(vha)) {
8030 /* Don't enable full login after initial LIP */
8031 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
8032 /* Don't enable LIP full login for initiator */
8033 nv->host_p &= cpu_to_le32(~BIT_10);
8034 }
8035
8036 qlt_24xx_config_nvram_stage1(vha, nv);
8037
8038 /* Reset Initialization control block */
8039 memset(icb, 0, ha->init_cb_size);
8040
8041 /* Copy 1st segment. */
8042 dptr1 = (uint8_t *)icb;
8043 dptr2 = (uint8_t *)&nv->version;
8044 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8045 while (cnt--)
8046 *dptr1++ = *dptr2++;
8047
8048 icb->login_retry_count = nv->login_retry_count;
8049 icb->link_down_on_nos = nv->link_down_on_nos;
8050
8051 /* Copy 2nd segment. */
8052 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8053 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8054 cnt = (uint8_t *)&icb->reserved_3 -
8055 (uint8_t *)&icb->interrupt_delay_timer;
8056 while (cnt--)
8057 *dptr1++ = *dptr2++;
8058 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8059 /*
8060 * Setup driver NVRAM options.
8061 */
8062 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8063 "QLA2462");
8064
8065 qlt_24xx_config_nvram_stage2(vha, icb);
8066
8067 if (nv->host_p & cpu_to_le32(BIT_15)) {
8068 /* Use alternate WWN? */
8069 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8070 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8071 }
8072
8073 /* Prepare nodename */
8074 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8075 /*
8076 * Firmware will apply the following mask if the nodename was
8077 * not provided.
8078 */
8079 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8080 icb->node_name[0] &= 0xF0;
8081 }
8082
8083 /* Set host adapter parameters. */
8084 ha->flags.disable_risc_code_load = 0;
8085 ha->flags.enable_lip_reset = 0;
8086 ha->flags.enable_lip_full_login =
8087 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8088 ha->flags.enable_target_reset =
8089 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8090 ha->flags.enable_led_scheme = 0;
8091 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8092
8093 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8094 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8095
8096 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
8097 sizeof(ha->fw_seriallink_options24));
8098
8099 /* save HBA serial number */
8100 ha->serial0 = icb->port_name[5];
8101 ha->serial1 = icb->port_name[6];
8102 ha->serial2 = icb->port_name[7];
8103 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8104 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8105
8106 icb->execution_throttle = cpu_to_le16(0xFFFF);
8107
8108 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8109
8110 /* Set minimum login_timeout to 4 seconds. */
8111 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8112 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8113 if (le16_to_cpu(nv->login_timeout) < 4)
8114 nv->login_timeout = cpu_to_le16(4);
8115 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8116
8117 /* Set minimum RATOV to 100 tenths of a second. */
8118 ha->r_a_tov = 100;
8119
8120 ha->loop_reset_delay = nv->reset_delay;
8121
8122 /* Link Down Timeout = 0:
8123 *
8124 * When Port Down timer expires we will start returning
8125 * I/O's to OS with "DID_NO_CONNECT".
8126 *
8127 * Link Down Timeout != 0:
8128 *
8129 * The driver waits for the link to come up after link down
8130 * before returning I/Os to OS with "DID_NO_CONNECT".
8131 */
8132 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8133 ha->loop_down_abort_time =
8134 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8135 } else {
8136 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8137 ha->loop_down_abort_time =
8138 (LOOP_DOWN_TIME - ha->link_down_timeout);
8139 }
8140
8141 /* Need enough time to try and get the port back. */
8142 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8143 if (qlport_down_retry)
8144 ha->port_down_retry_count = qlport_down_retry;
8145
8146 /* Set login_retry_count */
8147 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8148 if (ha->port_down_retry_count ==
8149 le16_to_cpu(nv->port_down_retry_count) &&
8150 ha->port_down_retry_count > 3)
8151 ha->login_retry_count = ha->port_down_retry_count;
8152 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8153 ha->login_retry_count = ha->port_down_retry_count;
8154 if (ql2xloginretrycount)
8155 ha->login_retry_count = ql2xloginretrycount;
8156
8157 /* N2N: driver will initiate Login instead of FW */
8158 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8159
8160 /* Enable ZIO. */
8161 if (!vha->flags.init_done) {
8162 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8163 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8164 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8165 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8166 }
8167 icb->firmware_options_2 &= cpu_to_le32(
8168 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8169 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8170 ha->zio_mode = QLA_ZIO_MODE_6;
8171
8172 ql_log(ql_log_info, vha, 0x006f,
8173 "ZIO mode %d enabled; timer delay (%d us).\n",
8174 ha->zio_mode, ha->zio_timer * 100);
8175
8176 icb->firmware_options_2 |= cpu_to_le32(
8177 (uint32_t)ha->zio_mode);
8178 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8179 }
8180
8181 if (rval) {
8182 ql_log(ql_log_warn, vha, 0x0070,
8183 "NVRAM configuration failed.\n");
8184 }
8185 return (rval);
8186 }
8187
8188 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)8189 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
8190 struct qla27xx_image_status *image_status)
8191 {
8192 ql_dbg(ql_dbg_init, vha, 0x018b,
8193 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
8194 name, "status",
8195 image_status->image_status_mask,
8196 le16_to_cpu(image_status->generation),
8197 image_status->ver_major,
8198 image_status->ver_minor,
8199 image_status->bitmap,
8200 le32_to_cpu(image_status->checksum),
8201 le32_to_cpu(image_status->signature));
8202 }
8203
8204 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)8205 qla28xx_check_aux_image_status_signature(
8206 struct qla27xx_image_status *image_status)
8207 {
8208 ulong signature = le32_to_cpu(image_status->signature);
8209
8210 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
8211 }
8212
8213 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)8214 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
8215 {
8216 ulong signature = le32_to_cpu(image_status->signature);
8217
8218 return
8219 signature != QLA27XX_IMG_STATUS_SIGN &&
8220 signature != QLA28XX_IMG_STATUS_SIGN;
8221 }
8222
8223 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)8224 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
8225 {
8226 __le32 *p = (__force __le32 *)image_status;
8227 uint n = sizeof(*image_status) / sizeof(*p);
8228 uint32_t sum = 0;
8229
8230 for ( ; n--; p++)
8231 sum += le32_to_cpup(p);
8232
8233 return sum;
8234 }
8235
8236 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)8237 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
8238 {
8239 return aux->bitmap & bitmask ?
8240 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
8241 }
8242
8243 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)8244 qla28xx_component_status(
8245 struct active_regions *active_regions, struct qla27xx_image_status *aux)
8246 {
8247 active_regions->aux.board_config =
8248 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
8249
8250 active_regions->aux.vpd_nvram =
8251 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
8252
8253 active_regions->aux.npiv_config_0_1 =
8254 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
8255
8256 active_regions->aux.npiv_config_2_3 =
8257 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
8258 }
8259
8260 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)8261 qla27xx_compare_image_generation(
8262 struct qla27xx_image_status *pri_image_status,
8263 struct qla27xx_image_status *sec_image_status)
8264 {
8265 /* calculate generation delta as uint16 (this accounts for wrap) */
8266 int16_t delta =
8267 le16_to_cpu(pri_image_status->generation) -
8268 le16_to_cpu(sec_image_status->generation);
8269
8270 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
8271
8272 return delta;
8273 }
8274
8275 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)8276 qla28xx_get_aux_images(
8277 struct scsi_qla_host *vha, struct active_regions *active_regions)
8278 {
8279 struct qla_hw_data *ha = vha->hw;
8280 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
8281 bool valid_pri_image = false, valid_sec_image = false;
8282 bool active_pri_image = false, active_sec_image = false;
8283
8284 if (!ha->flt_region_aux_img_status_pri) {
8285 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
8286 goto check_sec_image;
8287 }
8288
8289 qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
8290 ha->flt_region_aux_img_status_pri,
8291 sizeof(pri_aux_image_status) >> 2);
8292 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
8293
8294 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
8295 ql_dbg(ql_dbg_init, vha, 0x018b,
8296 "Primary aux image signature (%#x) not valid\n",
8297 le32_to_cpu(pri_aux_image_status.signature));
8298 goto check_sec_image;
8299 }
8300
8301 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
8302 ql_dbg(ql_dbg_init, vha, 0x018c,
8303 "Primary aux image checksum failed\n");
8304 goto check_sec_image;
8305 }
8306
8307 valid_pri_image = true;
8308
8309 if (pri_aux_image_status.image_status_mask & 1) {
8310 ql_dbg(ql_dbg_init, vha, 0x018d,
8311 "Primary aux image is active\n");
8312 active_pri_image = true;
8313 }
8314
8315 check_sec_image:
8316 if (!ha->flt_region_aux_img_status_sec) {
8317 ql_dbg(ql_dbg_init, vha, 0x018a,
8318 "Secondary aux image not addressed\n");
8319 goto check_valid_image;
8320 }
8321
8322 qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
8323 ha->flt_region_aux_img_status_sec,
8324 sizeof(sec_aux_image_status) >> 2);
8325 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
8326
8327 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
8328 ql_dbg(ql_dbg_init, vha, 0x018b,
8329 "Secondary aux image signature (%#x) not valid\n",
8330 le32_to_cpu(sec_aux_image_status.signature));
8331 goto check_valid_image;
8332 }
8333
8334 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
8335 ql_dbg(ql_dbg_init, vha, 0x018c,
8336 "Secondary aux image checksum failed\n");
8337 goto check_valid_image;
8338 }
8339
8340 valid_sec_image = true;
8341
8342 if (sec_aux_image_status.image_status_mask & 1) {
8343 ql_dbg(ql_dbg_init, vha, 0x018d,
8344 "Secondary aux image is active\n");
8345 active_sec_image = true;
8346 }
8347
8348 check_valid_image:
8349 if (valid_pri_image && active_pri_image &&
8350 valid_sec_image && active_sec_image) {
8351 if (qla27xx_compare_image_generation(&pri_aux_image_status,
8352 &sec_aux_image_status) >= 0) {
8353 qla28xx_component_status(active_regions,
8354 &pri_aux_image_status);
8355 } else {
8356 qla28xx_component_status(active_regions,
8357 &sec_aux_image_status);
8358 }
8359 } else if (valid_pri_image && active_pri_image) {
8360 qla28xx_component_status(active_regions, &pri_aux_image_status);
8361 } else if (valid_sec_image && active_sec_image) {
8362 qla28xx_component_status(active_regions, &sec_aux_image_status);
8363 }
8364
8365 ql_dbg(ql_dbg_init, vha, 0x018f,
8366 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
8367 active_regions->aux.board_config,
8368 active_regions->aux.vpd_nvram,
8369 active_regions->aux.npiv_config_0_1,
8370 active_regions->aux.npiv_config_2_3);
8371 }
8372
8373 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)8374 qla27xx_get_active_image(struct scsi_qla_host *vha,
8375 struct active_regions *active_regions)
8376 {
8377 struct qla_hw_data *ha = vha->hw;
8378 struct qla27xx_image_status pri_image_status, sec_image_status;
8379 bool valid_pri_image = false, valid_sec_image = false;
8380 bool active_pri_image = false, active_sec_image = false;
8381
8382 if (!ha->flt_region_img_status_pri) {
8383 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
8384 goto check_sec_image;
8385 }
8386
8387 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
8388 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
8389 QLA_SUCCESS) {
8390 WARN_ON_ONCE(true);
8391 goto check_sec_image;
8392 }
8393 qla27xx_print_image(vha, "Primary image", &pri_image_status);
8394
8395 if (qla27xx_check_image_status_signature(&pri_image_status)) {
8396 ql_dbg(ql_dbg_init, vha, 0x018b,
8397 "Primary image signature (%#x) not valid\n",
8398 le32_to_cpu(pri_image_status.signature));
8399 goto check_sec_image;
8400 }
8401
8402 if (qla27xx_image_status_checksum(&pri_image_status)) {
8403 ql_dbg(ql_dbg_init, vha, 0x018c,
8404 "Primary image checksum failed\n");
8405 goto check_sec_image;
8406 }
8407
8408 valid_pri_image = true;
8409
8410 if (pri_image_status.image_status_mask & 1) {
8411 ql_dbg(ql_dbg_init, vha, 0x018d,
8412 "Primary image is active\n");
8413 active_pri_image = true;
8414 }
8415
8416 check_sec_image:
8417 if (!ha->flt_region_img_status_sec) {
8418 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
8419 goto check_valid_image;
8420 }
8421
8422 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
8423 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
8424 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
8425
8426 if (qla27xx_check_image_status_signature(&sec_image_status)) {
8427 ql_dbg(ql_dbg_init, vha, 0x018b,
8428 "Secondary image signature (%#x) not valid\n",
8429 le32_to_cpu(sec_image_status.signature));
8430 goto check_valid_image;
8431 }
8432
8433 if (qla27xx_image_status_checksum(&sec_image_status)) {
8434 ql_dbg(ql_dbg_init, vha, 0x018c,
8435 "Secondary image checksum failed\n");
8436 goto check_valid_image;
8437 }
8438
8439 valid_sec_image = true;
8440
8441 if (sec_image_status.image_status_mask & 1) {
8442 ql_dbg(ql_dbg_init, vha, 0x018d,
8443 "Secondary image is active\n");
8444 active_sec_image = true;
8445 }
8446
8447 check_valid_image:
8448 if (valid_pri_image && active_pri_image)
8449 active_regions->global = QLA27XX_PRIMARY_IMAGE;
8450
8451 if (valid_sec_image && active_sec_image) {
8452 if (!active_regions->global ||
8453 qla27xx_compare_image_generation(
8454 &pri_image_status, &sec_image_status) < 0) {
8455 active_regions->global = QLA27XX_SECONDARY_IMAGE;
8456 }
8457 }
8458
8459 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
8460 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
8461 "default (boot/fw)" :
8462 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
8463 "primary" :
8464 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
8465 "secondary" : "invalid",
8466 active_regions->global);
8467 }
8468
qla24xx_risc_firmware_invalid(uint32_t * dword)8469 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
8470 {
8471 return
8472 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
8473 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
8474 }
8475
8476 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)8477 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
8478 uint32_t faddr)
8479 {
8480 int rval;
8481 uint templates, segments, fragment;
8482 ulong i;
8483 uint j;
8484 ulong dlen;
8485 uint32_t *dcode;
8486 uint32_t risc_addr, risc_size, risc_attr = 0;
8487 struct qla_hw_data *ha = vha->hw;
8488 struct req_que *req = ha->req_q_map[0];
8489 struct fwdt *fwdt = ha->fwdt;
8490
8491 ql_dbg(ql_dbg_init, vha, 0x008b,
8492 "FW: Loading firmware from flash (%x).\n", faddr);
8493
8494 dcode = (uint32_t *)req->ring;
8495 qla24xx_read_flash_data(vha, dcode, faddr, 8);
8496 if (qla24xx_risc_firmware_invalid(dcode)) {
8497 ql_log(ql_log_fatal, vha, 0x008c,
8498 "Unable to verify the integrity of flash firmware "
8499 "image.\n");
8500 ql_log(ql_log_fatal, vha, 0x008d,
8501 "Firmware data: %08x %08x %08x %08x.\n",
8502 dcode[0], dcode[1], dcode[2], dcode[3]);
8503
8504 return QLA_FUNCTION_FAILED;
8505 }
8506
8507 dcode = (uint32_t *)req->ring;
8508 *srisc_addr = 0;
8509 segments = FA_RISC_CODE_SEGMENTS;
8510 for (j = 0; j < segments; j++) {
8511 ql_dbg(ql_dbg_init, vha, 0x008d,
8512 "-> Loading segment %u...\n", j);
8513 qla24xx_read_flash_data(vha, dcode, faddr, 10);
8514 risc_addr = be32_to_cpu((__force __be32)dcode[2]);
8515 risc_size = be32_to_cpu((__force __be32)dcode[3]);
8516 if (!*srisc_addr) {
8517 *srisc_addr = risc_addr;
8518 risc_attr = be32_to_cpu((__force __be32)dcode[9]);
8519 }
8520
8521 dlen = ha->fw_transfer_size >> 2;
8522 for (fragment = 0; risc_size; fragment++) {
8523 if (dlen > risc_size)
8524 dlen = risc_size;
8525
8526 ql_dbg(ql_dbg_init, vha, 0x008e,
8527 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
8528 fragment, risc_addr, faddr, dlen);
8529 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
8530 for (i = 0; i < dlen; i++)
8531 dcode[i] = swab32(dcode[i]);
8532
8533 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8534 if (rval) {
8535 ql_log(ql_log_fatal, vha, 0x008f,
8536 "-> Failed load firmware fragment %u.\n",
8537 fragment);
8538 return QLA_FUNCTION_FAILED;
8539 }
8540
8541 faddr += dlen;
8542 risc_addr += dlen;
8543 risc_size -= dlen;
8544 }
8545 }
8546
8547 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8548 return QLA_SUCCESS;
8549
8550 templates = (risc_attr & BIT_9) ? 2 : 1;
8551 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
8552 for (j = 0; j < templates; j++, fwdt++) {
8553 vfree(fwdt->template);
8554 fwdt->template = NULL;
8555 fwdt->length = 0;
8556
8557 dcode = (uint32_t *)req->ring;
8558 qla24xx_read_flash_data(vha, dcode, faddr, 7);
8559 risc_size = be32_to_cpu((__force __be32)dcode[2]);
8560 ql_dbg(ql_dbg_init, vha, 0x0161,
8561 "-> fwdt%u template array at %#x (%#x dwords)\n",
8562 j, faddr, risc_size);
8563 if (!risc_size || !~risc_size) {
8564 ql_dbg(ql_dbg_init, vha, 0x0162,
8565 "-> fwdt%u failed to read array\n", j);
8566 goto failed;
8567 }
8568
8569 /* skip header and ignore checksum */
8570 faddr += 7;
8571 risc_size -= 8;
8572
8573 ql_dbg(ql_dbg_init, vha, 0x0163,
8574 "-> fwdt%u template allocate template %#x words...\n",
8575 j, risc_size);
8576 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8577 if (!fwdt->template) {
8578 ql_log(ql_log_warn, vha, 0x0164,
8579 "-> fwdt%u failed allocate template.\n", j);
8580 goto failed;
8581 }
8582
8583 dcode = fwdt->template;
8584 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
8585
8586 if (!qla27xx_fwdt_template_valid(dcode)) {
8587 ql_log(ql_log_warn, vha, 0x0165,
8588 "-> fwdt%u failed template validate\n", j);
8589 goto failed;
8590 }
8591
8592 dlen = qla27xx_fwdt_template_size(dcode);
8593 ql_dbg(ql_dbg_init, vha, 0x0166,
8594 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8595 j, dlen, dlen / sizeof(*dcode));
8596 if (dlen > risc_size * sizeof(*dcode)) {
8597 ql_log(ql_log_warn, vha, 0x0167,
8598 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8599 j, dlen - risc_size * sizeof(*dcode));
8600 goto failed;
8601 }
8602
8603 fwdt->length = dlen;
8604 ql_dbg(ql_dbg_init, vha, 0x0168,
8605 "-> fwdt%u loaded template ok\n", j);
8606
8607 faddr += risc_size + 1;
8608 }
8609
8610 return QLA_SUCCESS;
8611
8612 failed:
8613 vfree(fwdt->template);
8614 fwdt->template = NULL;
8615 fwdt->length = 0;
8616
8617 return QLA_SUCCESS;
8618 }
8619
8620 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
8621
8622 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8623 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8624 {
8625 int rval;
8626 int i, fragment;
8627 uint16_t *wcode;
8628 __be16 *fwcode;
8629 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8630 struct fw_blob *blob;
8631 struct qla_hw_data *ha = vha->hw;
8632 struct req_que *req = ha->req_q_map[0];
8633
8634 /* Load firmware blob. */
8635 blob = qla2x00_request_firmware(vha);
8636 if (!blob) {
8637 ql_log(ql_log_info, vha, 0x0083,
8638 "Firmware image unavailable.\n");
8639 ql_log(ql_log_info, vha, 0x0084,
8640 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
8641 return QLA_FUNCTION_FAILED;
8642 }
8643
8644 rval = QLA_SUCCESS;
8645
8646 wcode = (uint16_t *)req->ring;
8647 *srisc_addr = 0;
8648 fwcode = (__force __be16 *)blob->fw->data;
8649 fwclen = 0;
8650
8651 /* Validate firmware image by checking version. */
8652 if (blob->fw->size < 8 * sizeof(uint16_t)) {
8653 ql_log(ql_log_fatal, vha, 0x0085,
8654 "Unable to verify integrity of firmware image (%zd).\n",
8655 blob->fw->size);
8656 goto fail_fw_integrity;
8657 }
8658 for (i = 0; i < 4; i++)
8659 wcode[i] = be16_to_cpu(fwcode[i + 4]);
8660 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8661 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8662 wcode[2] == 0 && wcode[3] == 0)) {
8663 ql_log(ql_log_fatal, vha, 0x0086,
8664 "Unable to verify integrity of firmware image.\n");
8665 ql_log(ql_log_fatal, vha, 0x0087,
8666 "Firmware data: %04x %04x %04x %04x.\n",
8667 wcode[0], wcode[1], wcode[2], wcode[3]);
8668 goto fail_fw_integrity;
8669 }
8670
8671 seg = blob->segs;
8672 while (*seg && rval == QLA_SUCCESS) {
8673 risc_addr = *seg;
8674 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8675 risc_size = be16_to_cpu(fwcode[3]);
8676
8677 /* Validate firmware image size. */
8678 fwclen += risc_size * sizeof(uint16_t);
8679 if (blob->fw->size < fwclen) {
8680 ql_log(ql_log_fatal, vha, 0x0088,
8681 "Unable to verify integrity of firmware image "
8682 "(%zd).\n", blob->fw->size);
8683 goto fail_fw_integrity;
8684 }
8685
8686 fragment = 0;
8687 while (risc_size > 0 && rval == QLA_SUCCESS) {
8688 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8689 if (wlen > risc_size)
8690 wlen = risc_size;
8691 ql_dbg(ql_dbg_init, vha, 0x0089,
8692 "Loading risc segment@ risc addr %x number of "
8693 "words 0x%x.\n", risc_addr, wlen);
8694
8695 for (i = 0; i < wlen; i++)
8696 wcode[i] = swab16((__force u32)fwcode[i]);
8697
8698 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8699 wlen);
8700 if (rval) {
8701 ql_log(ql_log_fatal, vha, 0x008a,
8702 "Failed to load segment %d of firmware.\n",
8703 fragment);
8704 break;
8705 }
8706
8707 fwcode += wlen;
8708 risc_addr += wlen;
8709 risc_size -= wlen;
8710 fragment++;
8711 }
8712
8713 /* Next segment. */
8714 seg++;
8715 }
8716 return rval;
8717
8718 fail_fw_integrity:
8719 return QLA_FUNCTION_FAILED;
8720 }
8721
8722 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)8723 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8724 {
8725 int rval;
8726 uint templates, segments, fragment;
8727 uint32_t *dcode;
8728 ulong dlen;
8729 uint32_t risc_addr, risc_size, risc_attr = 0;
8730 ulong i;
8731 uint j;
8732 struct fw_blob *blob;
8733 __be32 *fwcode;
8734 struct qla_hw_data *ha = vha->hw;
8735 struct req_que *req = ha->req_q_map[0];
8736 struct fwdt *fwdt = ha->fwdt;
8737
8738 ql_dbg(ql_dbg_init, vha, 0x0090,
8739 "-> FW: Loading via request-firmware.\n");
8740
8741 blob = qla2x00_request_firmware(vha);
8742 if (!blob) {
8743 ql_log(ql_log_warn, vha, 0x0092,
8744 "-> Firmware file not found.\n");
8745
8746 return QLA_FUNCTION_FAILED;
8747 }
8748
8749 fwcode = (__force __be32 *)blob->fw->data;
8750 dcode = (__force uint32_t *)fwcode;
8751 if (qla24xx_risc_firmware_invalid(dcode)) {
8752 ql_log(ql_log_fatal, vha, 0x0093,
8753 "Unable to verify integrity of firmware image (%zd).\n",
8754 blob->fw->size);
8755 ql_log(ql_log_fatal, vha, 0x0095,
8756 "Firmware data: %08x %08x %08x %08x.\n",
8757 dcode[0], dcode[1], dcode[2], dcode[3]);
8758 return QLA_FUNCTION_FAILED;
8759 }
8760
8761 dcode = (uint32_t *)req->ring;
8762 *srisc_addr = 0;
8763 segments = FA_RISC_CODE_SEGMENTS;
8764 for (j = 0; j < segments; j++) {
8765 ql_dbg(ql_dbg_init, vha, 0x0096,
8766 "-> Loading segment %u...\n", j);
8767 risc_addr = be32_to_cpu(fwcode[2]);
8768 risc_size = be32_to_cpu(fwcode[3]);
8769
8770 if (!*srisc_addr) {
8771 *srisc_addr = risc_addr;
8772 risc_attr = be32_to_cpu(fwcode[9]);
8773 }
8774
8775 dlen = ha->fw_transfer_size >> 2;
8776 for (fragment = 0; risc_size; fragment++) {
8777 if (dlen > risc_size)
8778 dlen = risc_size;
8779
8780 ql_dbg(ql_dbg_init, vha, 0x0097,
8781 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8782 fragment, risc_addr,
8783 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8784 dlen);
8785
8786 for (i = 0; i < dlen; i++)
8787 dcode[i] = swab32((__force u32)fwcode[i]);
8788
8789 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8790 if (rval) {
8791 ql_log(ql_log_fatal, vha, 0x0098,
8792 "-> Failed load firmware fragment %u.\n",
8793 fragment);
8794 return QLA_FUNCTION_FAILED;
8795 }
8796
8797 fwcode += dlen;
8798 risc_addr += dlen;
8799 risc_size -= dlen;
8800 }
8801 }
8802
8803 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8804 return QLA_SUCCESS;
8805
8806 templates = (risc_attr & BIT_9) ? 2 : 1;
8807 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8808 for (j = 0; j < templates; j++, fwdt++) {
8809 vfree(fwdt->template);
8810 fwdt->template = NULL;
8811 fwdt->length = 0;
8812
8813 risc_size = be32_to_cpu(fwcode[2]);
8814 ql_dbg(ql_dbg_init, vha, 0x0171,
8815 "-> fwdt%u template array at %#x (%#x dwords)\n",
8816 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8817 risc_size);
8818 if (!risc_size || !~risc_size) {
8819 ql_dbg(ql_dbg_init, vha, 0x0172,
8820 "-> fwdt%u failed to read array\n", j);
8821 goto failed;
8822 }
8823
8824 /* skip header and ignore checksum */
8825 fwcode += 7;
8826 risc_size -= 8;
8827
8828 ql_dbg(ql_dbg_init, vha, 0x0173,
8829 "-> fwdt%u template allocate template %#x words...\n",
8830 j, risc_size);
8831 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8832 if (!fwdt->template) {
8833 ql_log(ql_log_warn, vha, 0x0174,
8834 "-> fwdt%u failed allocate template.\n", j);
8835 goto failed;
8836 }
8837
8838 dcode = fwdt->template;
8839 for (i = 0; i < risc_size; i++)
8840 dcode[i] = (__force u32)fwcode[i];
8841
8842 if (!qla27xx_fwdt_template_valid(dcode)) {
8843 ql_log(ql_log_warn, vha, 0x0175,
8844 "-> fwdt%u failed template validate\n", j);
8845 goto failed;
8846 }
8847
8848 dlen = qla27xx_fwdt_template_size(dcode);
8849 ql_dbg(ql_dbg_init, vha, 0x0176,
8850 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8851 j, dlen, dlen / sizeof(*dcode));
8852 if (dlen > risc_size * sizeof(*dcode)) {
8853 ql_log(ql_log_warn, vha, 0x0177,
8854 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8855 j, dlen - risc_size * sizeof(*dcode));
8856 goto failed;
8857 }
8858
8859 fwdt->length = dlen;
8860 ql_dbg(ql_dbg_init, vha, 0x0178,
8861 "-> fwdt%u loaded template ok\n", j);
8862
8863 fwcode += risc_size + 1;
8864 }
8865
8866 return QLA_SUCCESS;
8867
8868 failed:
8869 vfree(fwdt->template);
8870 fwdt->template = NULL;
8871 fwdt->length = 0;
8872
8873 return QLA_SUCCESS;
8874 }
8875
8876 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8877 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8878 {
8879 int rval;
8880
8881 if (ql2xfwloadbin == 1)
8882 return qla81xx_load_risc(vha, srisc_addr);
8883
8884 /*
8885 * FW Load priority:
8886 * 1) Firmware via request-firmware interface (.bin file).
8887 * 2) Firmware residing in flash.
8888 */
8889 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8890 if (rval == QLA_SUCCESS)
8891 return rval;
8892
8893 return qla24xx_load_risc_flash(vha, srisc_addr,
8894 vha->hw->flt_region_fw);
8895 }
8896
8897 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8898 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8899 {
8900 int rval;
8901 struct qla_hw_data *ha = vha->hw;
8902 struct active_regions active_regions = { };
8903
8904 if (ql2xfwloadbin == 2)
8905 goto try_blob_fw;
8906
8907 /* FW Load priority:
8908 * 1) Firmware residing in flash.
8909 * 2) Firmware via request-firmware interface (.bin file).
8910 * 3) Golden-Firmware residing in flash -- (limited operation).
8911 */
8912
8913 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8914 goto try_primary_fw;
8915
8916 qla27xx_get_active_image(vha, &active_regions);
8917
8918 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8919 goto try_primary_fw;
8920
8921 ql_dbg(ql_dbg_init, vha, 0x008b,
8922 "Loading secondary firmware image.\n");
8923 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8924 if (!rval)
8925 return rval;
8926
8927 try_primary_fw:
8928 ql_dbg(ql_dbg_init, vha, 0x008b,
8929 "Loading primary firmware image.\n");
8930 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8931 if (!rval)
8932 return rval;
8933
8934 try_blob_fw:
8935 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8936 if (!rval || !ha->flt_region_gold_fw)
8937 return rval;
8938
8939 ql_log(ql_log_info, vha, 0x0099,
8940 "Attempting to fallback to golden firmware.\n");
8941 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8942 if (rval)
8943 return rval;
8944
8945 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8946 ha->flags.running_gold_fw = 1;
8947 return rval;
8948 }
8949
8950 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8951 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8952 {
8953 int ret, retries;
8954 struct qla_hw_data *ha = vha->hw;
8955
8956 if (ha->flags.pci_channel_io_perm_failure)
8957 return;
8958 if (!IS_FWI2_CAPABLE(ha))
8959 return;
8960 if (!ha->fw_major_version)
8961 return;
8962 if (!ha->flags.fw_started)
8963 return;
8964
8965 ret = qla2x00_stop_firmware(vha);
8966 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8967 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8968 ha->isp_ops->reset_chip(vha);
8969 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8970 continue;
8971 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8972 continue;
8973 ql_log(ql_log_info, vha, 0x8015,
8974 "Attempting retry of stop-firmware command.\n");
8975 ret = qla2x00_stop_firmware(vha);
8976 }
8977
8978 QLA_FW_STOPPED(ha);
8979 ha->flags.fw_init_done = 0;
8980 }
8981
8982 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8983 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8984 {
8985 int rval = QLA_SUCCESS;
8986 int rval2;
8987 uint16_t mb[MAILBOX_REGISTER_COUNT];
8988 struct qla_hw_data *ha = vha->hw;
8989 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8990
8991 if (!vha->vp_idx)
8992 return -EINVAL;
8993
8994 rval = qla2x00_fw_ready(base_vha);
8995
8996 if (rval == QLA_SUCCESS) {
8997 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8998 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8999 }
9000
9001 vha->flags.management_server_logged_in = 0;
9002
9003 /* Login to SNS first */
9004 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
9005 BIT_1);
9006 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
9007 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
9008 ql_dbg(ql_dbg_init, vha, 0x0120,
9009 "Failed SNS login: loop_id=%x, rval2=%d\n",
9010 NPH_SNS, rval2);
9011 else
9012 ql_dbg(ql_dbg_init, vha, 0x0103,
9013 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
9014 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
9015 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
9016 return (QLA_FUNCTION_FAILED);
9017 }
9018
9019 atomic_set(&vha->loop_down_timer, 0);
9020 atomic_set(&vha->loop_state, LOOP_UP);
9021 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
9022 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
9023 rval = qla2x00_loop_resync(base_vha);
9024
9025 return rval;
9026 }
9027
9028 /* 84XX Support **************************************************************/
9029
9030 static LIST_HEAD(qla_cs84xx_list);
9031 static DEFINE_MUTEX(qla_cs84xx_mutex);
9032
9033 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)9034 qla84xx_get_chip(struct scsi_qla_host *vha)
9035 {
9036 struct qla_chip_state_84xx *cs84xx;
9037 struct qla_hw_data *ha = vha->hw;
9038
9039 mutex_lock(&qla_cs84xx_mutex);
9040
9041 /* Find any shared 84xx chip. */
9042 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
9043 if (cs84xx->bus == ha->pdev->bus) {
9044 kref_get(&cs84xx->kref);
9045 goto done;
9046 }
9047 }
9048
9049 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
9050 if (!cs84xx)
9051 goto done;
9052
9053 kref_init(&cs84xx->kref);
9054 spin_lock_init(&cs84xx->access_lock);
9055 mutex_init(&cs84xx->fw_update_mutex);
9056 cs84xx->bus = ha->pdev->bus;
9057
9058 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
9059 done:
9060 mutex_unlock(&qla_cs84xx_mutex);
9061 return cs84xx;
9062 }
9063
9064 static void
__qla84xx_chip_release(struct kref * kref)9065 __qla84xx_chip_release(struct kref *kref)
9066 {
9067 struct qla_chip_state_84xx *cs84xx =
9068 container_of(kref, struct qla_chip_state_84xx, kref);
9069
9070 mutex_lock(&qla_cs84xx_mutex);
9071 list_del(&cs84xx->list);
9072 mutex_unlock(&qla_cs84xx_mutex);
9073 kfree(cs84xx);
9074 }
9075
9076 void
qla84xx_put_chip(struct scsi_qla_host * vha)9077 qla84xx_put_chip(struct scsi_qla_host *vha)
9078 {
9079 struct qla_hw_data *ha = vha->hw;
9080
9081 if (ha->cs84xx)
9082 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
9083 }
9084
9085 static int
qla84xx_init_chip(scsi_qla_host_t * vha)9086 qla84xx_init_chip(scsi_qla_host_t *vha)
9087 {
9088 int rval;
9089 uint16_t status[2];
9090 struct qla_hw_data *ha = vha->hw;
9091
9092 mutex_lock(&ha->cs84xx->fw_update_mutex);
9093
9094 rval = qla84xx_verify_chip(vha, status);
9095
9096 mutex_unlock(&ha->cs84xx->fw_update_mutex);
9097
9098 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
9099 QLA_SUCCESS;
9100 }
9101
9102 /* 81XX Support **************************************************************/
9103
9104 int
qla81xx_nvram_config(scsi_qla_host_t * vha)9105 qla81xx_nvram_config(scsi_qla_host_t *vha)
9106 {
9107 int rval;
9108 struct init_cb_81xx *icb;
9109 struct nvram_81xx *nv;
9110 __le32 *dptr;
9111 uint8_t *dptr1, *dptr2;
9112 uint32_t chksum;
9113 uint16_t cnt;
9114 struct qla_hw_data *ha = vha->hw;
9115 uint32_t faddr;
9116 struct active_regions active_regions = { };
9117
9118 rval = QLA_SUCCESS;
9119 icb = (struct init_cb_81xx *)ha->init_cb;
9120 nv = ha->nvram;
9121
9122 /* Determine NVRAM starting address. */
9123 ha->nvram_size = sizeof(*nv);
9124 ha->vpd_size = FA_NVRAM_VPD_SIZE;
9125 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
9126 ha->vpd_size = FA_VPD_SIZE_82XX;
9127
9128 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
9129 qla28xx_get_aux_images(vha, &active_regions);
9130
9131 /* Get VPD data into cache */
9132 ha->vpd = ha->nvram + VPD_OFFSET;
9133
9134 faddr = ha->flt_region_vpd;
9135 if (IS_QLA28XX(ha)) {
9136 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9137 faddr = ha->flt_region_vpd_sec;
9138 ql_dbg(ql_dbg_init, vha, 0x0110,
9139 "Loading %s nvram image.\n",
9140 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9141 "primary" : "secondary");
9142 }
9143 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
9144
9145 /* Get NVRAM data into cache and calculate checksum. */
9146 faddr = ha->flt_region_nvram;
9147 if (IS_QLA28XX(ha)) {
9148 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9149 faddr = ha->flt_region_nvram_sec;
9150 }
9151 ql_dbg(ql_dbg_init, vha, 0x0110,
9152 "Loading %s nvram image.\n",
9153 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9154 "primary" : "secondary");
9155 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
9156
9157 dptr = (__force __le32 *)nv;
9158 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
9159 chksum += le32_to_cpu(*dptr);
9160
9161 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
9162 "Contents of NVRAM:\n");
9163 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
9164 nv, ha->nvram_size);
9165
9166 /* Bad NVRAM data, set defaults parameters. */
9167 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
9168 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
9169 /* Reset NVRAM data. */
9170 ql_log(ql_log_info, vha, 0x0073,
9171 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
9172 chksum, nv->id, le16_to_cpu(nv->nvram_version));
9173 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
9174 ql_log(ql_log_info, vha, 0x0074,
9175 "Falling back to functioning (yet invalid -- WWPN) "
9176 "defaults.\n");
9177
9178 /*
9179 * Set default initialization control block.
9180 */
9181 memset(nv, 0, ha->nvram_size);
9182 nv->nvram_version = cpu_to_le16(ICB_VERSION);
9183 nv->version = cpu_to_le16(ICB_VERSION);
9184 nv->frame_payload_size = cpu_to_le16(2048);
9185 nv->execution_throttle = cpu_to_le16(0xFFFF);
9186 nv->exchange_count = cpu_to_le16(0);
9187 nv->port_name[0] = 0x21;
9188 nv->port_name[1] = 0x00 + ha->port_no + 1;
9189 nv->port_name[2] = 0x00;
9190 nv->port_name[3] = 0xe0;
9191 nv->port_name[4] = 0x8b;
9192 nv->port_name[5] = 0x1c;
9193 nv->port_name[6] = 0x55;
9194 nv->port_name[7] = 0x86;
9195 nv->node_name[0] = 0x20;
9196 nv->node_name[1] = 0x00;
9197 nv->node_name[2] = 0x00;
9198 nv->node_name[3] = 0xe0;
9199 nv->node_name[4] = 0x8b;
9200 nv->node_name[5] = 0x1c;
9201 nv->node_name[6] = 0x55;
9202 nv->node_name[7] = 0x86;
9203 nv->login_retry_count = cpu_to_le16(8);
9204 nv->interrupt_delay_timer = cpu_to_le16(0);
9205 nv->login_timeout = cpu_to_le16(0);
9206 nv->firmware_options_1 =
9207 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
9208 nv->firmware_options_2 = cpu_to_le32(2 << 4);
9209 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
9210 nv->firmware_options_3 = cpu_to_le32(2 << 13);
9211 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
9212 nv->efi_parameters = cpu_to_le32(0);
9213 nv->reset_delay = 5;
9214 nv->max_luns_per_target = cpu_to_le16(128);
9215 nv->port_down_retry_count = cpu_to_le16(30);
9216 nv->link_down_timeout = cpu_to_le16(180);
9217 nv->enode_mac[0] = 0x00;
9218 nv->enode_mac[1] = 0xC0;
9219 nv->enode_mac[2] = 0xDD;
9220 nv->enode_mac[3] = 0x04;
9221 nv->enode_mac[4] = 0x05;
9222 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
9223
9224 rval = 1;
9225 }
9226
9227 if (IS_T10_PI_CAPABLE(ha))
9228 nv->frame_payload_size &= cpu_to_le16(~7);
9229
9230 qlt_81xx_config_nvram_stage1(vha, nv);
9231
9232 /* Reset Initialization control block */
9233 memset(icb, 0, ha->init_cb_size);
9234
9235 /* Copy 1st segment. */
9236 dptr1 = (uint8_t *)icb;
9237 dptr2 = (uint8_t *)&nv->version;
9238 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
9239 while (cnt--)
9240 *dptr1++ = *dptr2++;
9241
9242 icb->login_retry_count = nv->login_retry_count;
9243
9244 /* Copy 2nd segment. */
9245 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
9246 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
9247 cnt = (uint8_t *)&icb->reserved_5 -
9248 (uint8_t *)&icb->interrupt_delay_timer;
9249 while (cnt--)
9250 *dptr1++ = *dptr2++;
9251
9252 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
9253 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
9254 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
9255 icb->enode_mac[0] = 0x00;
9256 icb->enode_mac[1] = 0xC0;
9257 icb->enode_mac[2] = 0xDD;
9258 icb->enode_mac[3] = 0x04;
9259 icb->enode_mac[4] = 0x05;
9260 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
9261 }
9262
9263 /* Use extended-initialization control block. */
9264 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
9265 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
9266 /*
9267 * Setup driver NVRAM options.
9268 */
9269 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9270 "QLE8XXX");
9271
9272 qlt_81xx_config_nvram_stage2(vha, icb);
9273
9274 /* Use alternate WWN? */
9275 if (nv->host_p & cpu_to_le32(BIT_15)) {
9276 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
9277 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
9278 }
9279
9280 /* Prepare nodename */
9281 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
9282 /*
9283 * Firmware will apply the following mask if the nodename was
9284 * not provided.
9285 */
9286 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
9287 icb->node_name[0] &= 0xF0;
9288 }
9289
9290 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
9291 if ((nv->enhanced_features & BIT_7) == 0)
9292 ha->flags.scm_supported_a = 1;
9293 }
9294
9295 /* Set host adapter parameters. */
9296 ha->flags.disable_risc_code_load = 0;
9297 ha->flags.enable_lip_reset = 0;
9298 ha->flags.enable_lip_full_login =
9299 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
9300 ha->flags.enable_target_reset =
9301 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
9302 ha->flags.enable_led_scheme = 0;
9303 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
9304
9305 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
9306 (BIT_6 | BIT_5 | BIT_4)) >> 4;
9307
9308 /* save HBA serial number */
9309 ha->serial0 = icb->port_name[5];
9310 ha->serial1 = icb->port_name[6];
9311 ha->serial2 = icb->port_name[7];
9312 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
9313 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
9314
9315 icb->execution_throttle = cpu_to_le16(0xFFFF);
9316
9317 ha->retry_count = le16_to_cpu(nv->login_retry_count);
9318
9319 /* Set minimum login_timeout to 4 seconds. */
9320 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
9321 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
9322 if (le16_to_cpu(nv->login_timeout) < 4)
9323 nv->login_timeout = cpu_to_le16(4);
9324 ha->login_timeout = le16_to_cpu(nv->login_timeout);
9325
9326 /* Set minimum RATOV to 100 tenths of a second. */
9327 ha->r_a_tov = 100;
9328
9329 ha->loop_reset_delay = nv->reset_delay;
9330
9331 /* Link Down Timeout = 0:
9332 *
9333 * When Port Down timer expires we will start returning
9334 * I/O's to OS with "DID_NO_CONNECT".
9335 *
9336 * Link Down Timeout != 0:
9337 *
9338 * The driver waits for the link to come up after link down
9339 * before returning I/Os to OS with "DID_NO_CONNECT".
9340 */
9341 if (le16_to_cpu(nv->link_down_timeout) == 0) {
9342 ha->loop_down_abort_time =
9343 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
9344 } else {
9345 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
9346 ha->loop_down_abort_time =
9347 (LOOP_DOWN_TIME - ha->link_down_timeout);
9348 }
9349
9350 /* Need enough time to try and get the port back. */
9351 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
9352 if (qlport_down_retry)
9353 ha->port_down_retry_count = qlport_down_retry;
9354
9355 /* Set login_retry_count */
9356 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
9357 if (ha->port_down_retry_count ==
9358 le16_to_cpu(nv->port_down_retry_count) &&
9359 ha->port_down_retry_count > 3)
9360 ha->login_retry_count = ha->port_down_retry_count;
9361 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
9362 ha->login_retry_count = ha->port_down_retry_count;
9363 if (ql2xloginretrycount)
9364 ha->login_retry_count = ql2xloginretrycount;
9365
9366 /* if not running MSI-X we need handshaking on interrupts */
9367 if (!vha->hw->flags.msix_enabled &&
9368 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
9369 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
9370
9371 /* Enable ZIO. */
9372 if (!vha->flags.init_done) {
9373 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
9374 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
9375 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
9376 le16_to_cpu(icb->interrupt_delay_timer) : 2;
9377 }
9378 icb->firmware_options_2 &= cpu_to_le32(
9379 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
9380 vha->flags.process_response_queue = 0;
9381 if (ha->zio_mode != QLA_ZIO_DISABLED) {
9382 ha->zio_mode = QLA_ZIO_MODE_6;
9383
9384 ql_log(ql_log_info, vha, 0x0075,
9385 "ZIO mode %d enabled; timer delay (%d us).\n",
9386 ha->zio_mode,
9387 ha->zio_timer * 100);
9388
9389 icb->firmware_options_2 |= cpu_to_le32(
9390 (uint32_t)ha->zio_mode);
9391 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
9392 vha->flags.process_response_queue = 1;
9393 }
9394
9395 /* enable RIDA Format2 */
9396 icb->firmware_options_3 |= cpu_to_le32(BIT_0);
9397
9398 /* N2N: driver will initiate Login instead of FW */
9399 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
9400
9401 /* Determine NVMe/FCP priority for target ports */
9402 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
9403
9404 if (rval) {
9405 ql_log(ql_log_warn, vha, 0x0076,
9406 "NVRAM configuration failed.\n");
9407 }
9408 return (rval);
9409 }
9410
9411 int
qla82xx_restart_isp(scsi_qla_host_t * vha)9412 qla82xx_restart_isp(scsi_qla_host_t *vha)
9413 {
9414 int status, rval;
9415 struct qla_hw_data *ha = vha->hw;
9416 struct scsi_qla_host *vp, *tvp;
9417 unsigned long flags;
9418
9419 status = qla2x00_init_rings(vha);
9420 if (!status) {
9421 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
9422 ha->flags.chip_reset_done = 1;
9423
9424 status = qla2x00_fw_ready(vha);
9425 if (!status) {
9426 /* Issue a marker after FW becomes ready. */
9427 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
9428 vha->flags.online = 1;
9429 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
9430 }
9431
9432 /* if no cable then assume it's good */
9433 if ((vha->device_flags & DFLG_NO_CABLE))
9434 status = 0;
9435 }
9436
9437 if (!status) {
9438 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
9439
9440 if (!atomic_read(&vha->loop_down_timer)) {
9441 /*
9442 * Issue marker command only when we are going
9443 * to start the I/O .
9444 */
9445 vha->marker_needed = 1;
9446 }
9447
9448 ha->isp_ops->enable_intrs(ha);
9449
9450 ha->isp_abort_cnt = 0;
9451 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
9452
9453 /* Update the firmware version */
9454 status = qla82xx_check_md_needed(vha);
9455
9456 if (ha->fce) {
9457 ha->flags.fce_enabled = 1;
9458 memset(ha->fce, 0,
9459 fce_calc_size(ha->fce_bufs));
9460 rval = qla2x00_enable_fce_trace(vha,
9461 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
9462 &ha->fce_bufs);
9463 if (rval) {
9464 ql_log(ql_log_warn, vha, 0x8001,
9465 "Unable to reinitialize FCE (%d).\n",
9466 rval);
9467 ha->flags.fce_enabled = 0;
9468 }
9469 }
9470
9471 if (ha->eft) {
9472 memset(ha->eft, 0, EFT_SIZE);
9473 rval = qla2x00_enable_eft_trace(vha,
9474 ha->eft_dma, EFT_NUM_BUFFERS);
9475 if (rval) {
9476 ql_log(ql_log_warn, vha, 0x8010,
9477 "Unable to reinitialize EFT (%d).\n",
9478 rval);
9479 }
9480 }
9481 }
9482
9483 if (!status) {
9484 ql_dbg(ql_dbg_taskm, vha, 0x8011,
9485 "qla82xx_restart_isp succeeded.\n");
9486
9487 spin_lock_irqsave(&ha->vport_slock, flags);
9488 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
9489 if (vp->vp_idx) {
9490 atomic_inc(&vp->vref_count);
9491 spin_unlock_irqrestore(&ha->vport_slock, flags);
9492
9493 qla2x00_vp_abort_isp(vp);
9494
9495 spin_lock_irqsave(&ha->vport_slock, flags);
9496 atomic_dec(&vp->vref_count);
9497 }
9498 }
9499 spin_unlock_irqrestore(&ha->vport_slock, flags);
9500
9501 } else {
9502 ql_log(ql_log_warn, vha, 0x8016,
9503 "qla82xx_restart_isp **** FAILED ****.\n");
9504 }
9505
9506 return status;
9507 }
9508
9509 /*
9510 * qla24xx_get_fcp_prio
9511 * Gets the fcp cmd priority value for the logged in port.
9512 * Looks for a match of the port descriptors within
9513 * each of the fcp prio config entries. If a match is found,
9514 * the tag (priority) value is returned.
9515 *
9516 * Input:
9517 * vha = scsi host structure pointer.
9518 * fcport = port structure pointer.
9519 *
9520 * Return:
9521 * non-zero (if found)
9522 * -1 (if not found)
9523 *
9524 * Context:
9525 * Kernel context
9526 */
9527 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9528 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9529 {
9530 int i, entries;
9531 uint8_t pid_match, wwn_match;
9532 int priority;
9533 uint32_t pid1, pid2;
9534 uint64_t wwn1, wwn2;
9535 struct qla_fcp_prio_entry *pri_entry;
9536 struct qla_hw_data *ha = vha->hw;
9537
9538 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
9539 return -1;
9540
9541 priority = -1;
9542 entries = ha->fcp_prio_cfg->num_entries;
9543 pri_entry = &ha->fcp_prio_cfg->entry[0];
9544
9545 for (i = 0; i < entries; i++) {
9546 pid_match = wwn_match = 0;
9547
9548 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
9549 pri_entry++;
9550 continue;
9551 }
9552
9553 /* check source pid for a match */
9554 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
9555 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
9556 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
9557 if (pid1 == INVALID_PORT_ID)
9558 pid_match++;
9559 else if (pid1 == pid2)
9560 pid_match++;
9561 }
9562
9563 /* check destination pid for a match */
9564 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
9565 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
9566 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
9567 if (pid1 == INVALID_PORT_ID)
9568 pid_match++;
9569 else if (pid1 == pid2)
9570 pid_match++;
9571 }
9572
9573 /* check source WWN for a match */
9574 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
9575 wwn1 = wwn_to_u64(vha->port_name);
9576 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
9577 if (wwn2 == (uint64_t)-1)
9578 wwn_match++;
9579 else if (wwn1 == wwn2)
9580 wwn_match++;
9581 }
9582
9583 /* check destination WWN for a match */
9584 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
9585 wwn1 = wwn_to_u64(fcport->port_name);
9586 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
9587 if (wwn2 == (uint64_t)-1)
9588 wwn_match++;
9589 else if (wwn1 == wwn2)
9590 wwn_match++;
9591 }
9592
9593 if (pid_match == 2 || wwn_match == 2) {
9594 /* Found a matching entry */
9595 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9596 priority = pri_entry->tag;
9597 break;
9598 }
9599
9600 pri_entry++;
9601 }
9602
9603 return priority;
9604 }
9605
9606 /*
9607 * qla24xx_update_fcport_fcp_prio
9608 * Activates fcp priority for the logged in fc port
9609 *
9610 * Input:
9611 * vha = scsi host structure pointer.
9612 * fcp = port structure pointer.
9613 *
9614 * Return:
9615 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9616 *
9617 * Context:
9618 * Kernel context.
9619 */
9620 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9621 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9622 {
9623 int ret;
9624 int priority;
9625 uint16_t mb[5];
9626
9627 if (fcport->port_type != FCT_TARGET ||
9628 fcport->loop_id == FC_NO_LOOP_ID)
9629 return QLA_FUNCTION_FAILED;
9630
9631 priority = qla24xx_get_fcp_prio(vha, fcport);
9632 if (priority < 0)
9633 return QLA_FUNCTION_FAILED;
9634
9635 if (IS_P3P_TYPE(vha->hw)) {
9636 fcport->fcp_prio = priority & 0xf;
9637 return QLA_SUCCESS;
9638 }
9639
9640 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9641 if (ret == QLA_SUCCESS) {
9642 if (fcport->fcp_prio != priority)
9643 ql_dbg(ql_dbg_user, vha, 0x709e,
9644 "Updated FCP_CMND priority - value=%d loop_id=%d "
9645 "port_id=%02x%02x%02x.\n", priority,
9646 fcport->loop_id, fcport->d_id.b.domain,
9647 fcport->d_id.b.area, fcport->d_id.b.al_pa);
9648 fcport->fcp_prio = priority & 0xf;
9649 } else
9650 ql_dbg(ql_dbg_user, vha, 0x704f,
9651 "Unable to update FCP_CMND priority - ret=0x%x for "
9652 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9653 fcport->d_id.b.domain, fcport->d_id.b.area,
9654 fcport->d_id.b.al_pa);
9655 return ret;
9656 }
9657
9658 /*
9659 * qla24xx_update_all_fcp_prio
9660 * Activates fcp priority for all the logged in ports
9661 *
9662 * Input:
9663 * ha = adapter block pointer.
9664 *
9665 * Return:
9666 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9667 *
9668 * Context:
9669 * Kernel context.
9670 */
9671 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)9672 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9673 {
9674 int ret;
9675 fc_port_t *fcport;
9676
9677 ret = QLA_FUNCTION_FAILED;
9678 /* We need to set priority for all logged in ports */
9679 list_for_each_entry(fcport, &vha->vp_fcports, list)
9680 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9681
9682 return ret;
9683 }
9684
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)9685 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9686 int vp_idx, bool startqp)
9687 {
9688 int rsp_id = 0;
9689 int req_id = 0;
9690 int i;
9691 struct qla_hw_data *ha = vha->hw;
9692 uint16_t qpair_id = 0;
9693 struct qla_qpair *qpair = NULL;
9694 struct qla_msix_entry *msix;
9695
9696 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9697 ql_log(ql_log_warn, vha, 0x00181,
9698 "FW/Driver is not multi-queue capable.\n");
9699 return NULL;
9700 }
9701
9702 if (ql2xmqsupport || ql2xnvmeenable) {
9703 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9704 if (qpair == NULL) {
9705 ql_log(ql_log_warn, vha, 0x0182,
9706 "Failed to allocate memory for queue pair.\n");
9707 return NULL;
9708 }
9709
9710 qpair->hw = vha->hw;
9711 qpair->vha = vha;
9712 qpair->qp_lock_ptr = &qpair->qp_lock;
9713 spin_lock_init(&qpair->qp_lock);
9714 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9715
9716 /* Assign available que pair id */
9717 mutex_lock(&ha->mq_lock);
9718 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
9719 if (ha->num_qpairs >= ha->max_qpairs) {
9720 mutex_unlock(&ha->mq_lock);
9721 ql_log(ql_log_warn, vha, 0x0183,
9722 "No resources to create additional q pair.\n");
9723 goto fail_qid_map;
9724 }
9725 ha->num_qpairs++;
9726 set_bit(qpair_id, ha->qpair_qid_map);
9727 ha->queue_pair_map[qpair_id] = qpair;
9728 qpair->id = qpair_id;
9729 qpair->vp_idx = vp_idx;
9730 qpair->fw_started = ha->flags.fw_started;
9731 INIT_LIST_HEAD(&qpair->hints_list);
9732 qpair->chip_reset = ha->base_qpair->chip_reset;
9733 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9734 qpair->enable_explicit_conf =
9735 ha->base_qpair->enable_explicit_conf;
9736
9737 for (i = 0; i < ha->msix_count; i++) {
9738 msix = &ha->msix_entries[i];
9739 if (msix->in_use)
9740 continue;
9741 qpair->msix = msix;
9742 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9743 "Vector %x selected for qpair\n", msix->vector);
9744 break;
9745 }
9746 if (!qpair->msix) {
9747 ql_log(ql_log_warn, vha, 0x0184,
9748 "Out of MSI-X vectors!.\n");
9749 goto fail_msix;
9750 }
9751
9752 qpair->msix->in_use = 1;
9753 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9754 qpair->pdev = ha->pdev;
9755 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9756 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9757
9758 mutex_unlock(&ha->mq_lock);
9759
9760 /* Create response queue first */
9761 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9762 if (!rsp_id) {
9763 ql_log(ql_log_warn, vha, 0x0185,
9764 "Failed to create response queue.\n");
9765 goto fail_rsp;
9766 }
9767
9768 qpair->rsp = ha->rsp_q_map[rsp_id];
9769
9770 /* Create request queue */
9771 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9772 startqp);
9773 if (!req_id) {
9774 ql_log(ql_log_warn, vha, 0x0186,
9775 "Failed to create request queue.\n");
9776 goto fail_req;
9777 }
9778
9779 qpair->req = ha->req_q_map[req_id];
9780 qpair->rsp->req = qpair->req;
9781 qpair->rsp->qpair = qpair;
9782
9783 if (!qpair->cpu_mapped)
9784 qla_cpu_update(qpair, raw_smp_processor_id());
9785
9786 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9787 if (ha->fw_attributes & BIT_4)
9788 qpair->difdix_supported = 1;
9789 }
9790
9791 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9792 if (!qpair->srb_mempool) {
9793 ql_log(ql_log_warn, vha, 0xd036,
9794 "Failed to create srb mempool for qpair %d\n",
9795 qpair->id);
9796 goto fail_mempool;
9797 }
9798
9799 /* Mark as online */
9800 qpair->online = 1;
9801
9802 if (!vha->flags.qpairs_available)
9803 vha->flags.qpairs_available = 1;
9804
9805 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9806 "Request/Response queue pair created, id %d\n",
9807 qpair->id);
9808 ql_dbg(ql_dbg_init, vha, 0x0187,
9809 "Request/Response queue pair created, id %d\n",
9810 qpair->id);
9811 }
9812 return qpair;
9813
9814 fail_mempool:
9815 fail_req:
9816 qla25xx_delete_rsp_que(vha, qpair->rsp);
9817 fail_rsp:
9818 mutex_lock(&ha->mq_lock);
9819 qpair->msix->in_use = 0;
9820 list_del(&qpair->qp_list_elem);
9821 if (list_empty(&vha->qp_list))
9822 vha->flags.qpairs_available = 0;
9823 fail_msix:
9824 ha->queue_pair_map[qpair_id] = NULL;
9825 clear_bit(qpair_id, ha->qpair_qid_map);
9826 ha->num_qpairs--;
9827 mutex_unlock(&ha->mq_lock);
9828 fail_qid_map:
9829 kfree(qpair);
9830 return NULL;
9831 }
9832
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9833 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9834 {
9835 int ret = QLA_FUNCTION_FAILED;
9836 struct qla_hw_data *ha = qpair->hw;
9837
9838 qpair->delete_in_progress = 1;
9839
9840 ret = qla25xx_delete_req_que(vha, qpair->req);
9841 if (ret != QLA_SUCCESS)
9842 goto fail;
9843
9844 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9845 if (ret != QLA_SUCCESS)
9846 goto fail;
9847
9848 mutex_lock(&ha->mq_lock);
9849 ha->queue_pair_map[qpair->id] = NULL;
9850 clear_bit(qpair->id, ha->qpair_qid_map);
9851 ha->num_qpairs--;
9852 list_del(&qpair->qp_list_elem);
9853 if (list_empty(&vha->qp_list)) {
9854 vha->flags.qpairs_available = 0;
9855 vha->flags.qpairs_req_created = 0;
9856 vha->flags.qpairs_rsp_created = 0;
9857 }
9858 mempool_destroy(qpair->srb_mempool);
9859 kfree(qpair);
9860 mutex_unlock(&ha->mq_lock);
9861
9862 return QLA_SUCCESS;
9863 fail:
9864 return ret;
9865 }
9866
9867 uint64_t
qla2x00_count_set_bits(uint32_t num)9868 qla2x00_count_set_bits(uint32_t num)
9869 {
9870 /* Brian Kernighan's Algorithm */
9871 u64 count = 0;
9872
9873 while (num) {
9874 num &= (num - 1);
9875 count++;
9876 }
9877 return count;
9878 }
9879
9880 uint64_t
qla2x00_get_num_tgts(scsi_qla_host_t * vha)9881 qla2x00_get_num_tgts(scsi_qla_host_t *vha)
9882 {
9883 fc_port_t *f, *tf;
9884 u64 count = 0;
9885
9886 f = NULL;
9887 tf = NULL;
9888
9889 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
9890 if (f->port_type != FCT_TARGET)
9891 continue;
9892 count++;
9893 }
9894 return count;
9895 }
9896
qla2xxx_reset_stats(struct Scsi_Host * host,u32 flags)9897 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
9898 {
9899 scsi_qla_host_t *vha = shost_priv(host);
9900 fc_port_t *fcport = NULL;
9901 unsigned long int_flags;
9902
9903 if (flags & QLA2XX_HW_ERROR)
9904 vha->hw_err_cnt = 0;
9905 if (flags & QLA2XX_SHT_LNK_DWN)
9906 vha->short_link_down_cnt = 0;
9907 if (flags & QLA2XX_INT_ERR)
9908 vha->interface_err_cnt = 0;
9909 if (flags & QLA2XX_CMD_TIMEOUT)
9910 vha->cmd_timeout_cnt = 0;
9911 if (flags & QLA2XX_RESET_CMD_ERR)
9912 vha->reset_cmd_err_cnt = 0;
9913 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9914 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9915 list_for_each_entry(fcport, &vha->vp_fcports, list) {
9916 fcport->tgt_short_link_down_cnt = 0;
9917 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9918 }
9919 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
9920 }
9921 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9922 return 0;
9923 }
9924
qla2xxx_start_stats(struct Scsi_Host * host,u32 flags)9925 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
9926 {
9927 return qla2xxx_reset_stats(host, flags);
9928 }
9929
qla2xxx_stop_stats(struct Scsi_Host * host,u32 flags)9930 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
9931 {
9932 return qla2xxx_reset_stats(host, flags);
9933 }
9934
qla2xxx_get_ini_stats(struct Scsi_Host * host,u32 flags,void * data,u64 size)9935 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
9936 void *data, u64 size)
9937 {
9938 scsi_qla_host_t *vha = shost_priv(host);
9939 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
9940 struct ql_vnd_stats *rsp_data = &resp->stats;
9941 u64 ini_entry_count = 0;
9942 u64 i = 0;
9943 u64 entry_count = 0;
9944 u64 num_tgt = 0;
9945 u32 tmp_stat_type = 0;
9946 fc_port_t *fcport = NULL;
9947 unsigned long int_flags;
9948
9949 /* Copy stat type to work on it */
9950 tmp_stat_type = flags;
9951
9952 if (tmp_stat_type & BIT_17) {
9953 num_tgt = qla2x00_get_num_tgts(vha);
9954 /* unset BIT_17 */
9955 tmp_stat_type &= ~(1 << 17);
9956 }
9957 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type);
9958
9959 entry_count = ini_entry_count + num_tgt;
9960
9961 rsp_data->entry_count = entry_count;
9962
9963 i = 0;
9964 if (flags & QLA2XX_HW_ERROR) {
9965 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
9966 rsp_data->entry[i].tgt_num = 0x0;
9967 rsp_data->entry[i].cnt = vha->hw_err_cnt;
9968 i++;
9969 }
9970
9971 if (flags & QLA2XX_SHT_LNK_DWN) {
9972 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
9973 rsp_data->entry[i].tgt_num = 0x0;
9974 rsp_data->entry[i].cnt = vha->short_link_down_cnt;
9975 i++;
9976 }
9977
9978 if (flags & QLA2XX_INT_ERR) {
9979 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
9980 rsp_data->entry[i].tgt_num = 0x0;
9981 rsp_data->entry[i].cnt = vha->interface_err_cnt;
9982 i++;
9983 }
9984
9985 if (flags & QLA2XX_CMD_TIMEOUT) {
9986 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
9987 rsp_data->entry[i].tgt_num = 0x0;
9988 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
9989 i++;
9990 }
9991
9992 if (flags & QLA2XX_RESET_CMD_ERR) {
9993 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
9994 rsp_data->entry[i].tgt_num = 0x0;
9995 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
9996 i++;
9997 }
9998
9999 /* i will continue from previous loop, as target
10000 * entries are after initiator
10001 */
10002 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
10003 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
10004 list_for_each_entry(fcport, &vha->vp_fcports, list) {
10005 if (fcport->port_type != FCT_TARGET)
10006 continue;
10007 if (!fcport->rport)
10008 continue;
10009 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
10010 rsp_data->entry[i].tgt_num = fcport->rport->number;
10011 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
10012 i++;
10013 }
10014 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
10015 }
10016 resp->status = EXT_STATUS_OK;
10017
10018 return 0;
10019 }
10020
qla2xxx_get_tgt_stats(struct Scsi_Host * host,u32 flags,struct fc_rport * rport,void * data,u64 size)10021 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
10022 struct fc_rport *rport, void *data, u64 size)
10023 {
10024 struct ql_vnd_tgt_stats_resp *tgt_data = data;
10025 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
10026
10027 tgt_data->status = 0;
10028 tgt_data->stats.entry_count = 1;
10029 tgt_data->stats.entry[0].stat_type = flags;
10030 tgt_data->stats.entry[0].tgt_num = rport->number;
10031 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
10032
10033 return 0;
10034 }
10035
qla2xxx_disable_port(struct Scsi_Host * host)10036 int qla2xxx_disable_port(struct Scsi_Host *host)
10037 {
10038 scsi_qla_host_t *vha = shost_priv(host);
10039
10040 vha->hw->flags.port_isolated = 1;
10041
10042 if (qla2x00_isp_reg_stat(vha->hw)) {
10043 ql_log(ql_log_info, vha, 0x9006,
10044 "PCI/Register disconnect, exiting.\n");
10045 qla_pci_set_eeh_busy(vha);
10046 return FAILED;
10047 }
10048 if (qla2x00_chip_is_down(vha))
10049 return 0;
10050
10051 if (vha->flags.online) {
10052 qla2x00_abort_isp_cleanup(vha);
10053 qla2x00_wait_for_sess_deletion(vha);
10054 }
10055
10056 return 0;
10057 }
10058
qla2xxx_enable_port(struct Scsi_Host * host)10059 int qla2xxx_enable_port(struct Scsi_Host *host)
10060 {
10061 scsi_qla_host_t *vha = shost_priv(host);
10062
10063 if (qla2x00_isp_reg_stat(vha->hw)) {
10064 ql_log(ql_log_info, vha, 0x9001,
10065 "PCI/Register disconnect, exiting.\n");
10066 qla_pci_set_eeh_busy(vha);
10067 return FAILED;
10068 }
10069
10070 vha->hw->flags.port_isolated = 0;
10071 /* Set the flag to 1, so that isp_abort can proceed */
10072 vha->flags.online = 1;
10073 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
10074 qla2xxx_wake_dpc(vha);
10075
10076 return 0;
10077 }
10078