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Searched defs:N (Results 1 – 25 of 82) sorted by relevance

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/drivers/video/fbdev/
Dau1200fb.h103 #define LCD_BACKCOLOR_SBGR_N(N) ((N)<<16) argument
104 #define LCD_BACKCOLOR_SBGG_N(N) ((N)<<8) argument
105 #define LCD_BACKCOLOR_SBGB_N(N) ((N)<<0) argument
117 #define LCD_COLORKEY_CKR_N(N) ((N)<<16) argument
118 #define LCD_COLORKEY_CKG_N(N) ((N)<<8) argument
119 #define LCD_COLORKEY_CKB_N(N) ((N)<<0) argument
125 #define LCD_COLORKEYMSK_CKMR_N(N) ((N)<<16) argument
126 #define LCD_COLORKEYMSK_CKMG_N(N) ((N)<<8) argument
127 #define LCD_COLORKEYMSK_CKMB_N(N) ((N)<<0) argument
134 #define LCD_WINCTRL0_OX_N(N) ((N)<<21) argument
[all …]
Dau1100fb.h176 #define LCD_HORZTIMING_HN2_N(N) ((((N)-1) << LCD_HORZTIMING_HN2_BIT) & LCD_HORZTIMING_HN2_MASK) argument
179 #define LCD_HORZTIMING_HN1_N(N) ((((N)-1) << LCD_HORZTIMING_HN1_BIT) & LCD_HORZTIMING_HN1_MASK) argument
182 #define LCD_HORZTIMING_HPW_N(N) ((((N)-1) << LCD_HORZTIMING_HPW_BIT) & LCD_HORZTIMING_HPW_MASK) argument
185 #define LCD_HORZTIMING_PPL_N(N) ((((N)-1) << LCD_HORZTIMING_PPL_BIT) & LCD_HORZTIMING_PPL_MASK) argument
190 #define LCD_VERTTIMING_VN2_N(N) ((((N)-1) << LCD_VERTTIMING_VN2_BIT) & LCD_VERTTIMING_VN2_MASK) argument
193 #define LCD_VERTTIMING_VN1_N(N) ((((N)-1) << LCD_VERTTIMING_VN1_BIT) & LCD_VERTTIMING_VN1_MASK) argument
196 #define LCD_VERTTIMING_VPW_N(N) ((((N)-1) << LCD_VERTTIMING_VPW_BIT) & LCD_VERTTIMING_VPW_MASK) argument
199 #define LCD_VERTTIMING_LPP_N(N) ((((N)-1) << LCD_VERTTIMING_LPP_BIT) & LCD_VERTTIMING_LPP_MASK) argument
208 #define LCD_CLKCONTROL_BF_N(N) ((((N)-1) << LCD_CLKCONTROL_BF_BIT) & LCD_CLKCONTROL_BF_MASK) argument
211 #define LCD_CLKCONTROL_PCD_N(N) (((N) << LCD_CLKCONTROL_PCD_BIT) & LCD_CLKCONTROL_PCD_MASK) argument
[all …]
/drivers/gpu/drm/kmb/
Dkmb_regs.h110 #define LCD_LAYERn_CFG(N) (LCD_LAYER0_CFG + (0x400 * (N))) argument
177 #define LCD_LAYERn_COL_START(N) (LCD_LAYER0_COL_START + (0x400 * (N))) argument
179 #define LCD_LAYERn_ROW_START(N) (LCD_LAYER0_ROW_START + (0x400 * (N))) argument
181 #define LCD_LAYERn_WIDTH(N) (LCD_LAYER0_WIDTH + (0x400 * (N))) argument
183 #define LCD_LAYERn_HEIGHT(N) (LCD_LAYER0_HEIGHT + (0x400 * (N))) argument
185 #define LCD_LAYERn_SCALE_CFG(N) (LCD_LAYER0_SCALE_CFG + (0x400 * (N))) argument
187 #define LCD_LAYERn_ALPHA(N) (LCD_LAYER0_ALPHA + (0x400 * (N))) argument
189 #define LCD_LAYERn_INV_COLOUR_LS(N) (LCD_LAYER0_INV_COLOUR_LS + \ argument
192 #define LCD_LAYERn_INV_COLOUR_MS(N) (LCD_LAYER0_INV_COLOUR_MS + \ argument
195 #define LCD_LAYERn_TRANS_COLOUR_LS(N) (LCD_LAYER0_TRANS_COLOUR_LS + \ argument
[all …]
/drivers/media/pci/cx88/
Dcx88-dsp.c93 static u32 int_goertzel(s16 x[], u32 N, u32 freq) in int_goertzel()
127 static u32 freq_magnitude(s16 x[], u32 N, u32 freq) in freq_magnitude()
134 static u32 noise_magnitude(s16 x[], u32 N, u32 freq_start, u32 freq_end) in noise_magnitude()
157 static s32 detect_a2_a2m_eiaj(struct cx88_core *core, s16 x[], u32 N) in detect_a2_a2m_eiaj()
224 static s32 detect_btsc(struct cx88_core *core, s16 x[], u32 N) in detect_btsc()
237 static s16 *read_rds_samples(struct cx88_core *core, u32 *N) in read_rds_samples()
275 u32 N = 0; in cx88_dsp_detect_stereo_sap() local
/drivers/staging/sm750fb/
Dddk750_chip.c37 unsigned int M, N, OD, POD; in get_mxclk_freq() local
319 int N, M, X, d; in sm750_calc_pll_value() local
392 unsigned int N = p_PLL->N; in sm750_format_pll_reg() local
/drivers/soundwire/
Dsysfs_slave_dpn.c15 int N; member
167 static int add_all_attributes(struct device *dev, int N, int dir) in add_all_attributes()
/drivers/media/tuners/
Dtda827x.c152 u32 N; in tda827xo_set_params() local
242 u32 N; in tda827xo_set_analog_params() local
512 u32 N; in tda827xa_set_params() local
652 u32 N; in tda827xa_set_analog_params() local
Dtda18271-fe.c80 u32 N; in tda18271_channel_configuration() local
330 u32 N; in tda18271_calibrate_rf() local
699 u32 N = 0; in tda18271c1_rf_tracking_filter_calibration() local
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv50.c58 int P, N, M, id; in read_pll_src() local
326 calc_pll(struct nv50_clk *clk, u32 reg, u32 idx, int *N, int *M, int *P) in calc_pll()
381 int N, M, P1, P2; in nv50_clk_calc() local
Dmcp77.c163 u32 clock, int *N, int *M, int *P) in calc_pll()
208 int N, M, P1, P2 = 0; in mcp77_clk_calc() local
Dpllgt215.c34 int M, lM, hM, N, fN; in gt215_pll_calc() local
Dgt215.c112 u32 sclk = 0, P = 1, N = 1, M = 1; in read_pll() local
241 int P, N, M, diff; in gt215_pll_info() local
/drivers/pwm/
Dpwm-pca9685.c68 #define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N))) argument
69 #define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N))) argument
70 #define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N))) argument
71 #define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N))) argument
/drivers/staging/wlan-ng/
Dprism2mgmt.c440 #define REQBASICRATE(N) \ in prism2mgmt_scan_results() argument
459 #define REQSUPPRATE(N) \ in prism2mgmt_scan_results() argument
/drivers/firmware/xilinx/
Dzynqmp.c1228 #define GGS0_SHOW(N) \ argument
1242 #define GGS0_STORE(N) \ argument
1296 #define PGGS0_SHOW(N) \ argument
1304 #define PGGS0_STORE(N) \ argument
/drivers/video/fbdev/nvidia/
Dnv_hw.c144 unsigned int pll, N, M, MB, NB, P; in nvGetClocks() local
684 unsigned int M, N, P, pll, MClk, NVClk, memctrl; in nForceUpdateArbitrationSettings() local
772 unsigned M, N, P; in CalcVClock() local
818 unsigned M, N, P; in CalcVClock2Stage() local
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_afmt.c51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) in amdgpu_afmt_calc_cts()
/drivers/infiniband/hw/hfi1/
Dsysfs.c156 #define HFI1_SC2VL_ATTR(N) \ argument
254 #define HFI1_SL2SC_ATTR(N) \ argument
352 #define HFI1_VL2MTU_ATTR(N) \ argument
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c148 int32_t N; in dcn20_update_clocks_update_dentist() local
179 int32_t N; in dcn20_update_clocks_update_dentist() local
/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
Dga100.c35 int N, fN, M, P; in ga100_devinit_pll_set() local
Dgv100.c35 int N, fN, M, P; in gv100_devinit_pll_set() local
Dtu102.c35 int N, fN, M, P; in tu102_devinit_pll_set() local
Dgf100.c37 int N, fN, M, P; in gf100_devinit_pll_set() local
Dgt215.c37 int N, fN, M, P; in gt215_devinit_pll_set() local
/drivers/acpi/acpica/
Devgpeinit.c36 #define ACPI_FADT_GPE_BLOCK_ADDRESS(N) \ argument

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