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Searched defs:P (Results 1 – 25 of 41) sorted by relevance

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/drivers/isdn/mISDN/
Ddsp_blowfish.c374 u32 *P = dsp->bf_p; in dsp_bf_encrypt() local
466 u32 *P = dsp->bf_p; in dsp_bf_decrypt() local
563 encrypt_block(const u32 *P, const u32 *S, u32 *dst, u32 *src) in encrypt_block()
603 u32 *P = (u32 *)dsp->bf_p; in dsp_bf_init() local
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv50.c58 int P, N, M, id; in read_pll_src() local
198 u32 P = 0; in nv50_clk_read() local
326 calc_pll(struct nv50_clk *clk, u32 reg, u32 idx, int *N, int *M, int *P) in calc_pll()
Dnv40.c44 int P = (ctrl & 0x00070000) >> 16; in read_pll_1() local
65 int P = (ctrl & 0x00070000) >> 16; in read_pll_2() local
Dpllnv04.c49 int M, N, thisP, P; in getMNP_single() local
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc()
Dmcp77.c87 u32 P = 0; in mcp77_clk_read() local
163 u32 clock, int *N, int *M, int *P) in calc_pll()
Dpllgt215.c31 u32 freq, int *pN, int *pfN, int *pM, int *P) in gt215_pll_calc()
Dnv04.c35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
Dgt215.c112 u32 sclk = 0, P = 1, N = 1, M = 1; in read_pll() local
241 int P, N, M, diff; in gt215_pll_info() local
Dgf100.c64 u32 P = (coef & 0x003f0000) >> 16; in read_pll() local
255 int N, M, P, ret; in calc_pll() local
Dgk104.c65 u32 P = (coef & 0x003f0000) >> 16; in read_pll() local
268 int N, M, P, ret; in calc_pll() local
/drivers/video/fbdev/nvidia/
Dnv_hw.c144 unsigned int pll, N, M, MB, NB, P; in nvGetClocks() local
684 unsigned int M, N, P, pll, MClk, NVClk, memctrl; in nForceUpdateArbitrationSettings() local
772 unsigned M, N, P; in CalcVClock() local
818 unsigned M, N, P; in CalcVClock2Stage() local
/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
Dga100.c35 int N, fN, M, P; in ga100_devinit_pll_set() local
Dgv100.c35 int N, fN, M, P; in gv100_devinit_pll_set() local
Dtu102.c35 int N, fN, M, P; in tu102_devinit_pll_set() local
Dgf100.c37 int N, fN, M, P; in gf100_devinit_pll_set() local
Dgt215.c37 int N, fN, M, P; in gt215_devinit_pll_set() local
Dnv50.c41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
Dnv04.c363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
/drivers/video/fbdev/kyro/
DSTG4000Ramdac.c30 u32 F = 0, R = 0, P = 0; in InitialiseRamdac() local
DSTG4000InitDevice.c243 u32 F, R, P; in SetCoreClockPLL() local
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_dcb.c29 #define QLC_DCB_GET_TC_PRIO(X, P) ((X >> (P * 3)) & 0x7) argument
30 #define QLC_DCB_GET_PGID_PRIO(X, P) ((X >> (P * 8)) & 0xff) argument
31 #define QLC_DCB_GET_BWPER_PG(X, P) ((X >> (P * 8)) & 0xff) argument
32 #define QLC_DCB_GET_TSA_PG(X, P) ((X >> (P * 8)) & 0xff) argument
33 #define QLC_DCB_GET_PFC_PRIO(X, P) (((X >> 24) >> P) & 0x1) argument
/drivers/video/fbdev/riva/
Driva_hw.c618 unsigned int M, N, P, pll, MClk; in nv3UpdateArbitrationSettings() local
802 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
1051 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
1097 unsigned int M, N, P, pll, MClk, NVClk; in nForceUpdateArbitrationSettings() local
1163 unsigned M, N, P; in CalcVClock() local
/drivers/infiniband/hw/usnic/
Dusnic_ib.h131 #define UPDATE_PTR_LEFT(N, P, L) \ argument
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_type.h2531 #define IXGBE_PVFTDH(P) (0x06010 + (0x40 * (P))) argument
2532 #define IXGBE_PVFTDT(P) (0x06018 + (0x40 * (P))) argument
2533 #define IXGBE_PVFTXDCTL(P) (0x06028 + (0x40 * (P))) argument
2534 #define IXGBE_PVFTDWBAL(P) (0x06038 + (0x40 * (P))) argument
2535 #define IXGBE_PVFTDWBAH(P) (0x0603C + (0x40 * (P))) argument
3665 #define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P) ? 0x8010 : 0x4010) argument
3666 #define IXGBE_KRM_LINK_S1(P) ((P) ? 0x8200 : 0x4200) argument
3667 #define IXGBE_KRM_LINK_CTRL_1(P) ((P) ? 0x820C : 0x420C) argument
3668 #define IXGBE_KRM_AN_CNTL_1(P) ((P) ? 0x822C : 0x422C) argument
3669 #define IXGBE_KRM_AN_CNTL_8(P) ((P) ? 0x8248 : 0x4248) argument
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramnv50.c230 int N1, M1, N2, M2, P; in nv50_ram_calc() local

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