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Searched defs:_mask (Results 1 – 25 of 56) sorted by relevance

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/drivers/soc/mediatek/
Dmtk-pm-domains.h42 #define _BUS_PROT(_mask, _set, _clr, _sta, _update, _ignore) { \ argument
51 #define BUS_PROT_WR(_mask, _set, _clr, _sta) \ argument
54 #define BUS_PROT_WR_IGN(_mask, _set, _clr, _sta) \ argument
57 #define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \ argument
60 #define BUS_PROT_UPDATE_TOPAXI(_mask) \ argument
/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c21 #define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \ argument
30 #define VOP_REG(off, _mask, _shift) \ argument
33 #define VOP_REG_SYNC(off, _mask, _shift) \ argument
36 #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ argument
/drivers/bcma/
Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
/drivers/staging/iio/meter/
Dmeter.h352 #define IIO_EVENT_ATTR_AENERGY_HALF_FULL(_evlist, _show, _store, _mask) \ argument
356 #define IIO_EVENT_ATTR_LINE_VOLT_SAG(_evlist, _show, _store, _mask) \ argument
363 #define IIO_EVENT_ATTR_CYCEND(_evlist, _show, _store, _mask) \ argument
367 #define IIO_EVENT_ATTR_ZERO_CROSS(_evlist, _show, _store, _mask) \ argument
371 #define IIO_EVENT_ATTR_AENERGY_OVERFLOW(_evlist, _show, _store, _mask) \ argument
375 #define IIO_EVENT_ATTR_VAENERGY_OVERFLOW(_evlist, _show, _store, _mask) \ argument
379 #define IIO_EVENT_ATTR_VAENERGY_HALF_FULL(_evlist, _show, _store, _mask) \ argument
383 #define IIO_EVENT_ATTR_PPOS(_evlist, _show, _store, _mask) \ argument
387 #define IIO_EVENT_ATTR_PNEG(_evlist, _show, _store, _mask) \ argument
391 #define IIO_EVENT_ATTR_IPKLVL_EXC(_evlist, _show, _store, _mask) \ argument
[all …]
/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
Dpinctrl-armada-37xx.c113 #define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \ argument
123 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
133 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
143 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
153 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ argument
/drivers/pinctrl/ralink/
Dpinctrl-ralink.h12 #define GRP(_name, _func, _mask, _shift) \ argument
17 #define GRP_G(_name, _func, _mask, _gpio, _shift) \ argument
/drivers/ssb/
Dpci.c171 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
173 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
176 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
179 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
/drivers/net/ethernet/sfc/falcon/
Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
/drivers/net/ethernet/sfc/
Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
/drivers/clk/at91/
Dpmc.h101 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) argument
102 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) argument
/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_acl.c527 #define MLXSW_SP_ACL_MANGLE_ACTION(_htype, _offset, _mask, _shift, _field) \ argument
536 #define MLXSW_SP_ACL_MANGLE_ACTION_IP4(_offset, _mask, _shift, _field) \ argument
540 #define MLXSW_SP_ACL_MANGLE_ACTION_IP6(_offset, _mask, _shift, _field) \ argument
544 #define MLXSW_SP_ACL_MANGLE_ACTION_TCP(_offset, _mask, _shift, _field) \ argument
547 #define MLXSW_SP_ACL_MANGLE_ACTION_UDP(_offset, _mask, _shift, _field) \ argument
/drivers/clk/st/
Dclkgen.h38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ argument
/drivers/iio/adc/
Dmax1363.c192 #define MAX1363_MODE_SINGLE(_num, _mask) { \ argument
199 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \ argument
207 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \ argument
214 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \ argument
222 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \ argument
230 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \ argument
Dqcom-spmi-vadc.c510 #define VADC_CHAN(_dname, _type, _mask, _pre, _scale) \ argument
519 #define VADC_NO_CHAN(_dname, _type, _mask, _pre) \ argument
/drivers/mfd/
Dwcd934x.c20 #define WCD934X_REGMAP_IRQ_REG(_irq, _off, _mask) \ argument
Dmax8997-irq.c54 #define DECLARE_IRQ(idx, _group, _mask) \ argument
Dtps80031.c78 #define TPS80031_IRQ(_reg, _mask) \ argument
Daxp20x.c284 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \ argument
/drivers/pinctrl/
Dpinctrl-palmas.c392 #define PULL_UP_DN(_name, _rbase, _add, _mask, _nv, _uv, _dv) \ argument
428 #define OD_INFO(_name, _rbase, _add, _mask, _ev, _dv) \ argument
506 #define PALMAS_PINGROUP(pg_name, pin_id, base, reg, _mask, _bshift, o0, o1, o2, o3) \ argument
/drivers/regulator/
Dmax8998.c131 int *_reg, int *_shift, int *_mask) in max8998_get_voltage_register()
490 #define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \ argument
/drivers/clk/baikal-t1/
Dccu-pll.c322 #define CCU_PLL_DBGFS_BIT_ATTR(_name, _reg, _mask) \ argument
329 #define CCU_PLL_DBGFS_FLD_ATTR(_name, _reg, _lsb, _mask, _min, _max) \ argument
Dccu-div.c44 #define CCU_DIV_CLKDIV_MAX(_mask) \ argument
352 #define CCU_DIV_DBGFS_BIT_ATTR(_name, _mask) { \ argument
/drivers/iio/health/
Dafe440x.h83 #define AFE440X_INTENSITY_CHAN(_index, _mask) \ argument
/drivers/irqchip/
Dirq-pic32-evic.c118 #define IRQ_REG_MASK(_hwirq, _reg, _mask) \ argument

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