Searched refs:INTEL_PMC_IDX_FIXED (Results 1 – 8 of 8) sorted by relevance
11 #define INTEL_PMC_IDX_FIXED 32 macro228 #define INTEL_PMC_IDX_FIXED_INSTRUCTIONS (INTEL_PMC_IDX_FIXED + 0)232 #define INTEL_PMC_IDX_FIXED_CPU_CYCLES (INTEL_PMC_IDX_FIXED + 1)236 #define INTEL_PMC_IDX_FIXED_REF_CYCLES (INTEL_PMC_IDX_FIXED + 2)241 #define INTEL_PMC_IDX_FIXED_SLOTS (INTEL_PMC_IDX_FIXED + 3)256 #define INTEL_PMC_IDX_FIXED_BTS (INTEL_PMC_IDX_FIXED + 15)264 #define INTEL_PMC_IDX_METRIC_BASE (INTEL_PMC_IDX_FIXED + 16)
52 __set_bit(INTEL_PMC_IDX_FIXED + i, pmu->pmc_in_use); in reprogram_fixed_counters()115 if (pmc_idx < INTEL_PMC_IDX_FIXED) in intel_pmc_idx_to_pmc()119 u32 idx = pmc_idx - INTEL_PMC_IDX_FIXED; in intel_pmc_idx_to_pmc()526 (((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED); in intel_pmu_refresh()575 pmu->fixed_counters[i].idx = i + INTEL_PMC_IDX_FIXED; in intel_pmu_init()
1221 if (hwc->idx >= INTEL_PMC_IDX_FIXED) { in intel_pmu_pebs_via_pt_enable()1223 idx = hwc->idx - INTEL_PMC_IDX_FIXED; in intel_pmu_pebs_via_pt_enable()1253 if (idx >= INTEL_PMC_IDX_FIXED) in intel_pmu_pebs_enable()1254 idx = MAX_PEBS_EVENTS + (idx - INTEL_PMC_IDX_FIXED); in intel_pmu_pebs_enable()1999 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm()2000 short error[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm()2015 mask |= ((1ULL << x86_pmu.num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED; in intel_pmu_drain_pebs_nhm()2016 size = INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed; in intel_pmu_drain_pebs_nhm()2109 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_icl()2128 (((1ULL << num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED); in intel_pmu_drain_pebs_icl()[all …]
2365 mask = 0xfULL << ((idx - INTEL_PMC_IDX_FIXED) * 4); in intel_pmu_disable_fixed()2377 case 0 ... INTEL_PMC_IDX_FIXED - 1: in intel_pmu_disable_event()2381 case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1: in intel_pmu_disable_event()2668 idx -= INTEL_PMC_IDX_FIXED; in intel_pmu_enable_fixed()2692 case 0 ... INTEL_PMC_IDX_FIXED - 1: in intel_pmu_enable_event()2696 case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1: in intel_pmu_enable_event()5433 *intel_ctrl |= fixed_mask << INTEL_PMC_IDX_FIXED; in intel_pmu_check_num_counters()5478 ~(~0ULL << (INTEL_PMC_IDX_FIXED + num_counters_fixed)); in intel_pmu_check_event_constraints()
291 int idx = hwc->idx - INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_disable_fixed()315 int idx = hwc->idx - INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_enable_fixed()608 x86_pmu.intel_ctrl |= ((1LL << x86_pmu.num_counters_fixed)-1) << INTEL_PMC_IDX_FIXED; in zhaoxin_pmu_init()
870 if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) { in __perf_sched_find_counter()871 idx = INTEL_PMC_IDX_FIXED; in __perf_sched_find_counter()885 for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) { in __perf_sched_find_counter()1229 case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS-1: in x86_assign_hw_event()1232 (idx - INTEL_PMC_IDX_FIXED); in x86_assign_hw_event()1233 hwc->event_base_rdpmc = (idx - INTEL_PMC_IDX_FIXED) | in x86_assign_hw_event()2044 << INTEL_PMC_IDX_FIXED) & intel_ctrl)); in x86_pmu_show_pmu_cap()2491 if (i >= INTEL_PMC_IDX_FIXED) { in perf_clear_dirty_counters()2493 if ((i - INTEL_PMC_IDX_FIXED) >= hybrid(cpuc->pmu, num_counters_fixed)) in perf_clear_dirty_counters()2496 wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + (i - INTEL_PMC_IDX_FIXED), 0); in perf_clear_dirty_counters()
1261 return !(intel_ctrl >> (i + INTEL_PMC_IDX_FIXED)); in fixed_counter_disabled()
279 int idx = pmc_idx - INTEL_PMC_IDX_FIXED; in reprogram_counter()448 pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3; in pmc_speculative_in_use()