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Searched refs:MSR_ARCH_PERFMON_FIXED_CTR0 (Results 1 – 4 of 4) sorted by relevance

/arch/x86/include/asm/
Dperf_event.h227 #define MSR_ARCH_PERFMON_FIXED_CTR0 0x309 macro
/arch/x86/events/
Dcore.c1231 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + in x86_assign_hw_event()
1579 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count); in perf_event_print_debug()
2496 wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + (i - INTEL_PMC_IDX_FIXED), 0); in perf_clear_dirty_counters()
/arch/x86/events/intel/
Dcore.c2766 wrmsrl_safe(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull); in intel_pmu_reset()
/arch/x86/kvm/
Dx86.c1361 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1362 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,