Home
last modified time | relevance | path

Searched refs:cache (Results 1 – 25 of 523) sorted by relevance

12345678910>>...21

/arch/powerpc/kernel/
Dcacheinfo.c44 struct cache *cache; member
118 struct cache { struct
125 struct cache *next_local; /* next cache of >= level */ argument
140 static const char *cache_type_string(const struct cache *cache) in cache_type_string() argument
142 return cache_type_info[cache->type].name; in cache_type_string()
145 static void cache_init(struct cache *cache, int type, int level, in cache_init() argument
148 cache->type = type; in cache_init()
149 cache->level = level; in cache_init()
150 cache->ofnode = of_node_get(ofnode); in cache_init()
151 cache->group_id = group_id; in cache_init()
[all …]
/arch/arm64/boot/dts/amazon/
Dalpine-v3.dtsi28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 i-cache-size = <0xc000>;
32 i-cache-line-size = <64>;
33 i-cache-sets = <256>;
34 next-level-cache = <&cluster0_l2>;
42 d-cache-size = <0x8000>;
43 d-cache-line-size = <64>;
44 d-cache-sets = <256>;
[all …]
/arch/arm64/boot/dts/ti/
Dk3-am654.dtsi41 i-cache-size = <0x8000>;
42 i-cache-line-size = <64>;
43 i-cache-sets = <256>;
44 d-cache-size = <0x8000>;
45 d-cache-line-size = <64>;
46 d-cache-sets = <128>;
47 next-level-cache = <&L2_0>;
55 i-cache-size = <0x8000>;
56 i-cache-line-size = <64>;
57 i-cache-sets = <256>;
[all …]
Dk3-am642.dtsi34 i-cache-size = <0x8000>;
35 i-cache-line-size = <64>;
36 i-cache-sets = <256>;
37 d-cache-size = <0x8000>;
38 d-cache-line-size = <64>;
39 d-cache-sets = <128>;
40 next-level-cache = <&L2_0>;
48 i-cache-size = <0x8000>;
49 i-cache-line-size = <64>;
50 i-cache-sets = <256>;
[all …]
Dk3-j7200.dtsi58 i-cache-size = <0xc000>;
59 i-cache-line-size = <64>;
60 i-cache-sets = <256>;
61 d-cache-size = <0x8000>;
62 d-cache-line-size = <64>;
63 d-cache-sets = <256>;
64 next-level-cache = <&L2_0>;
72 i-cache-size = <0xc000>;
73 i-cache-line-size = <64>;
74 i-cache-sets = <256>;
[all …]
Dk3-j721e.dtsi59 i-cache-size = <0xC000>;
60 i-cache-line-size = <64>;
61 i-cache-sets = <256>;
62 d-cache-size = <0x8000>;
63 d-cache-line-size = <64>;
64 d-cache-sets = <256>;
65 next-level-cache = <&L2_0>;
73 i-cache-size = <0xC000>;
74 i-cache-line-size = <64>;
75 i-cache-sets = <256>;
[all …]
/arch/arm64/boot/dts/marvell/
Darmada-ap807-quad.dtsi25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2_0>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
[all …]
Darmada-ap806-quad.dtsi25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2_0>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
[all …]
Darmada-ap806-dual.dtsi25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
[all …]
/arch/arm64/boot/dts/arm/
Djuno-r1.dts92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
98 next-level-cache = <&A57_L2>;
109 i-cache-size = <0xc000>;
110 i-cache-line-size = <64>;
111 i-cache-sets = <256>;
[all …]
Djuno.dts91 i-cache-size = <0xc000>;
92 i-cache-line-size = <64>;
93 i-cache-sets = <256>;
94 d-cache-size = <0x8000>;
95 d-cache-line-size = <64>;
96 d-cache-sets = <256>;
97 next-level-cache = <&A57_L2>;
109 i-cache-size = <0xc000>;
110 i-cache-line-size = <64>;
111 i-cache-sets = <256>;
[all …]
Djuno-r2.dts92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
98 next-level-cache = <&A72_L2>;
110 i-cache-size = <0xc000>;
111 i-cache-line-size = <64>;
112 i-cache-sets = <256>;
[all …]
/arch/arm/boot/dts/
Dbcm2837.dtsi43 /* Source for d/i-cache-line-size and d/i-cache-sets
47 * Source for d/i-cache-size
56 d-cache-size = <0x8000>;
57 d-cache-line-size = <64>;
58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
59 i-cache-size = <0x8000>;
60 i-cache-line-size = <64>;
61 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
62 next-level-cache = <&l2>;
71 d-cache-size = <0x8000>;
[all …]
Dvf610.dtsi9 next-level-cache = <&L2>;
13 L2: cache-controller@40006000 {
14 compatible = "arm,pl310-cache";
16 cache-unified;
17 cache-level = <2>;
/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
30 i-cache-size = <16384>;
42 d-cache-block-size = <64>;
43 d-cache-sets = <64>;
44 d-cache-size = <32768>;
48 i-cache-block-size = <64>;
49 i-cache-sets = <64>;
50 i-cache-size = <32768>;
57 next-level-cache = <&l2cache>;
[all …]
Dfu740-c000.dtsi28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
30 i-cache-size = <16384>;
31 next-level-cache = <&ccache>;
43 d-cache-block-size = <64>;
44 d-cache-sets = <64>;
45 d-cache-size = <32768>;
49 i-cache-block-size = <64>;
50 i-cache-sets = <128>;
51 i-cache-size = <32768>;
[all …]
/arch/riscv/boot/dts/microchip/
Dmicrochip-mpfs.dtsi20 i-cache-block-size = <64>;
21 i-cache-sets = <128>;
22 i-cache-size = <16384>;
37 d-cache-block-size = <64>;
38 d-cache-sets = <64>;
39 d-cache-size = <32768>;
43 i-cache-block-size = <64>;
44 i-cache-sets = <64>;
45 i-cache-size = <32768>;
64 d-cache-block-size = <64>;
[all …]
/arch/powerpc/boot/dts/fsl/
Dp4080si-pre.dtsi98 next-level-cache = <&L2_0>;
100 L2_0: l2-cache {
101 next-level-cache = <&cpc>;
108 next-level-cache = <&L2_1>;
110 L2_1: l2-cache {
111 next-level-cache = <&cpc>;
118 next-level-cache = <&L2_2>;
120 L2_2: l2-cache {
121 next-level-cache = <&cpc>;
128 next-level-cache = <&L2_3>;
[all …]
Dmpc8641si-pre.dtsi33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
45 d-cache-line-size = <32>;
46 i-cache-line-size = <32>;
47 d-cache-size = <32768>;
48 i-cache-size = <32768>;
/arch/sh/mm/
Dcache-debugfs.c28 struct cache_info *cache; in cache_debugfs_show() local
49 cache = &current_cpu_data.dcache; in cache_debugfs_show()
52 cache = &current_cpu_data.icache; in cache_debugfs_show()
55 waysize = cache->sets; in cache_debugfs_show()
64 waysize <<= cache->entry_shift; in cache_debugfs_show()
66 for (way = 0; way < cache->ways; way++) { in cache_debugfs_show()
76 addr += cache->linesz, line++) { in cache_debugfs_show()
89 addrstart += cache->way_incr; in cache_debugfs_show()
DMakefile6 obj-y := alignment.o cache.o init.o consistent.o mmap.o
8 cacheops-$(CONFIG_CPU_J2) := cache-j2.o
9 cacheops-$(CONFIG_CPU_SUBTYPE_SH7619) := cache-sh2.o
10 cacheops-$(CONFIG_CPU_SH2A) := cache-sh2a.o
11 cacheops-$(CONFIG_CPU_SH3) := cache-sh3.o
12 cacheops-$(CONFIG_CPU_SH4) := cache-sh4.o flush-sh4.o
13 cacheops-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
14 cacheops-$(CONFIG_CPU_SHX3) += cache-shx3.o
26 debugfs-$(CONFIG_CPU_SH4) += cache-debugfs.o
/arch/arm64/boot/dts/freescale/
Dfsl-lx2160a.dtsi35 d-cache-size = <0x8000>;
36 d-cache-line-size = <64>;
37 d-cache-sets = <128>;
38 i-cache-size = <0xC000>;
39 i-cache-line-size = <64>;
40 i-cache-sets = <192>;
41 next-level-cache = <&cluster0_l2>;
52 d-cache-size = <0x8000>;
53 d-cache-line-size = <64>;
54 d-cache-sets = <128>;
[all …]
/arch/nds32/include/asm/
Dnds32.h35 static inline unsigned long CACHE_SET(unsigned char cache) in CACHE_SET() argument
38 if (cache == ICACHE) in CACHE_SET()
46 static inline unsigned long CACHE_WAY(unsigned char cache) in CACHE_WAY() argument
49 if (cache == ICACHE) in CACHE_WAY()
57 static inline unsigned long CACHE_LINE_SIZE(unsigned char cache) in CACHE_LINE_SIZE() argument
60 if (cache == ICACHE) in CACHE_LINE_SIZE()
/arch/powerpc/boot/dts/
Diss4xx-mpic.dts40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>;
43 d-cache-size = <32768>;
54 i-cache-line-size = <32>;
55 d-cache-line-size = <32>;
56 i-cache-size = <32768>;
57 d-cache-size = <32768>;
70 i-cache-line-size = <32>;
71 d-cache-line-size = <32>;
[all …]
/arch/m68k/kernel/
Dsys_m68k.c68 cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len) in cache_flush_040() argument
75 switch (cache) in cache_flush_040()
128 switch (cache) in cache_flush_040()
185 switch (cache) in cache_flush_040()
228 cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len) in cache_flush_060() argument
241 switch (cache) in cache_flush_060()
289 switch (cache) in cache_flush_060()
348 switch (cache) in cache_flush_060()
378 sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len) in sys_cacheflush() argument
383 cache & ~FLUSH_CACHE_BOTH) in sys_cacheflush()
[all …]

12345678910>>...21