Searched refs:ctrl_val (Results 1 – 7 of 7) sorted by relevance
| /arch/x86/events/zhaoxin/ |
| D | core.c | 292 u64 ctrl_val, mask; in zhaoxin_pmu_disable_fixed() local
296 rdmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed()
297 ctrl_val &= ~mask; in zhaoxin_pmu_disable_fixed()
298 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_disable_fixed()
316 u64 ctrl_val, bits, mask; in zhaoxin_pmu_enable_fixed() local
332 rdmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
333 ctrl_val &= ~mask; in zhaoxin_pmu_enable_fixed()
334 ctrl_val |= bits; in zhaoxin_pmu_enable_fixed()
335 wrmsrl(hwc->config_base, ctrl_val); in zhaoxin_pmu_enable_fixed()
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| /arch/x86/kernel/cpu/resctrl/ |
| D | ctrlmondata.c | 267 u32 *dc = !mba_sc ? hw_dom->ctrl_val : hw_dom->mbps_val; in apply_config()
434 return hw_dom->ctrl_val[idx]; in resctrl_arch_get_config()
443 u32 ctrl_val; in show_doms() local
450 ctrl_val = resctrl_arch_get_config(r, dom, closid, in show_doms()
453 ctrl_val); in show_doms()
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| D | core.c | 289 wrmsrl(hw_res->msr_base + i, hw_dom->ctrl_val[i]); in mba_wrmsr_amd()
316 wrmsrl(hw_res->msr_base + i, delay_bw_map(hw_dom->ctrl_val[i], r)); in mba_wrmsr_intel()
327 wrmsrl(hw_res->msr_base + i, hw_dom->ctrl_val[i]); in cat_wrmsr()
422 dc = kmalloc_array(hw_res->num_closid, sizeof(*hw_dom->ctrl_val), in domain_setup_ctrlval()
434 hw_dom->ctrl_val = dc; in domain_setup_ctrlval()
529 kfree(hw_dom->ctrl_val); in domain_add_cpu()
589 kfree(hw_dom->ctrl_val); in domain_remove_cpu()
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| D | rdtgroup.c | 932 u32 ctrl_val; in rdt_bit_usage_show() local
945 ctrl_val = resctrl_arch_get_config(r, dom, i, in rdt_bit_usage_show()
950 sw_shareable |= ctrl_val; in rdt_bit_usage_show()
953 exclusive |= ctrl_val; in rdt_bit_usage_show()
1930 setup_default_ctrlval(r, hw_dom->ctrl_val, hw_dom->mbps_val); in set_mba_sc()
2350 hw_dom->ctrl_val[i] = r->default_ctrl; in reset_all_ctrls()
2733 u32 peer_ctl, ctrl_val; in __init_one_rdt_domain() local
2760 ctrl_val = resctrl_arch_get_config(r, d, i, in __init_one_rdt_domain()
2762 used_b |= ctrl_val | peer_ctl; in __init_one_rdt_domain()
2764 cfg->new_ctrl |= ctrl_val | peer_ctl; in __init_one_rdt_domain()
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| D | monitor.c | 456 cur_msr_val = hw_dom_mba->ctrl_val[closid]; in update_mba_bw()
493 hw_dom_mba->ctrl_val[closid] = new_msr_val; in update_mba_bw()
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| D | internal.h | 318 u32 *ctrl_val; member
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| /arch/x86/events/intel/ |
| D | core.c | 2348 u64 ctrl_val, mask; in intel_pmu_disable_fixed() local
2366 rdmsrl(hwc->config_base, ctrl_val); in intel_pmu_disable_fixed()
2367 ctrl_val &= ~mask; in intel_pmu_disable_fixed()
2368 wrmsrl(hwc->config_base, ctrl_val); in intel_pmu_disable_fixed()
2633 u64 ctrl_val, mask, bits = 0; in intel_pmu_enable_fixed() local
2677 rdmsrl(hwc->config_base, ctrl_val); in intel_pmu_enable_fixed()
2678 ctrl_val &= ~mask; in intel_pmu_enable_fixed()
2679 ctrl_val |= bits; in intel_pmu_enable_fixed()
2680 wrmsrl(hwc->config_base, ctrl_val); in intel_pmu_enable_fixed()
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