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/arch/s390/kernel/
Drelocate_kernel.S36 tml %r5,0x1 # is it a destination page?
39 nill %r6,0xf000 # mask it out and...
42 tml %r5,0x2 # is it a indirection page?
45 lgr %r2,%r5 # move it into the right register,
48 tml %r5,0x4 # is it the done indicator?
49 je .source_test # NO! Well, then it should be the source indicator...
50 j .done # ok, lets finish it here...
52 tml %r5,0x8 # it should be a source indicator...
53 je .base # NO, ignore it...
/arch/arm/include/asm/
Dptrace.h182 unsigned long it = cpsr & mask; in it_advance() local
183 it <<= 1; in it_advance()
184 it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */ in it_advance()
185 it &= mask; in it_advance()
187 cpsr |= it; in it_advance()
/arch/mips/fw/arc/
Dpromlib.c42 O32_STATIC CHAR it; in prom_putchar() local
44 it = c; in prom_putchar()
47 ArcWrite(1, &it, 1, &cnt); in prom_putchar()
/arch/arm64/kvm/hyp/
Daarch32.c66 unsigned long it; in kvm_condition_valid32() local
68 it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); in kvm_condition_valid32()
71 if (it == 0) in kvm_condition_valid32()
75 cond = (it >> 4); in kvm_condition_valid32()
/arch/x86/kvm/mmu/
Dpaging_tmpl.h673 struct kvm_shadow_walk_iterator it; in FNAME() local
695 for (shadow_walk_init(&it, vcpu, addr); in FNAME()
696 shadow_walk_okay(&it) && it.level > gw->level; in FNAME()
697 shadow_walk_next(&it)) { in FNAME()
700 clear_sp_write_flooding_count(it.sptep); in FNAME()
701 drop_large_spte(vcpu, it.sptep); in FNAME()
704 if (!is_shadow_present_pte(*it.sptep)) { in FNAME()
705 table_gfn = gw->table_gfn[it.level - 2]; in FNAME()
706 access = gw->pt_access[it.level - 2]; in FNAME()
708 it.level-1, false, access); in FNAME()
[all …]
/arch/arm64/kernel/
Dtraps.c314 u32 it, pstate = regs->pstate; in compat_get_it_state() local
316 it = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT; in compat_get_it_state()
317 it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2; in compat_get_it_state()
319 return it; in compat_get_it_state()
322 static void compat_set_it_state(struct pt_regs *regs, u32 it) in compat_set_it_state() argument
326 pstate_it = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK; in compat_set_it_state()
327 pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK; in compat_set_it_state()
335 u32 it; in advance_itstate() local
342 it = compat_get_it_state(regs); in advance_itstate()
348 if (!(it & 7)) in advance_itstate()
[all …]
/arch/ia64/kernel/
Dmca.c363 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock) argument
364 #define IA64_LOG_LOCK(it) spin_lock_irqsave(&ia64_state_log[it].isl_lock, s) argument
365 #define IA64_LOG_UNLOCK(it) spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s) argument
366 #define IA64_LOG_NEXT_INDEX(it) ia64_state_log[it].isl_index argument
367 #define IA64_LOG_CURR_INDEX(it) 1 - ia64_state_log[it].isl_index argument
368 #define IA64_LOG_INDEX_INC(it) \ argument
369 {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
370 ia64_state_log[it].isl_count++;}
371 #define IA64_LOG_INDEX_DEC(it) \ argument
372 ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
[all …]
/arch/m68k/fpsp040/
Dget_op.S46 | normalized number it becomes a denormalized number. The
431 | ;know if it should set ete15 or fpte15
432 | ;ie, it doesn't know if this is the
498 bnes try_zero |if not equal, it is not special
501 bnes try_zero |if not on, it is not special
504 bnes fix_nan |if non-zero, it is a NaN
506 bnes fix_nan |if non-zero, it is a NaN
511 orl #snaniop_mask,USER_FPSR(%a6) |always set snan if it is so
535 fmovemx %fp0-%fp1,-(%a7) |save fp0 - decbin returns in it
550 bnes mtry_zero |if not equal, it is not special
[all …]
/arch/nios2/boot/compressed/
Dvmlinux.scr4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
9 * This program is distributed in the hope that it will be useful,
/arch/x86/um/
DKconfig39 However, this it experimental on 32-bit architectures, so if unsure say
40 N (on x86-64 it's automatically enabled, instead, as it's safe there).
/arch/arm64/boot/dts/qcom/
Dmsm8996-v3.0.dtsi15 * when it comes to voltage delivery to.. once again
16 * the GPU. Funnily enough, it's simpler to make it an
/arch/arm64/boot/dts/allwinner/
Dsun50i-h5-libretech-all-h3-it.dts6 #include <arm/sunxi-libretech-all-h3-it.dtsi>
10 compatible = "libretech,all-h3-it-h5", "allwinner,sun50i-h5";
/arch/arm/boot/dts/
Ddra71x.dtsi4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
Dsun6i-a31s.dtsi4 * This file is dual-licensed: you can use it either under the terms
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
14 * This library is distributed in the hope that it will be useful,
45 * reflected by it having different pinctrl compatible everything else is
Dsun8i-h2-plus-orangepi-r1.dts4 * This file is dual-licensed: you can use it either under the terms
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
14 * This file is distributed in the hope that it will be useful,
54 * regulator on the original Zero. However it's used for USB
82 * and it's a USB 2.0 device. So the OHCI1 controller
Dalpine-db.dts4 * This program is free software; you can redistribute it and/or modify it
20 * This program is distributed in the hope it will be useful, but WITHOUT
Daxp223.dtsi6 * This file is dual-licensed: you can use it either under the terms
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
16 * This file is distributed in the hope that it will be useful,
50 * The AXP223 shares most of its logic with the AXP221 but it has some
Dsun5i-gr8-chip-pro.dts7 * This file is dual-licensed: you can use it either under the terms
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
17 * This file is distributed in the hope that it will be useful,
219 * The CHIP Pro doesn't have a controllable VBUS, nor does it
222 * If one wants to use it as a true OTG port, it should be
223 * done in the baseboard, and its DT / overlay will add it.
Ddra74x-p.dtsi4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
/arch/powerpc/boot/
Dfixup-headers.sed3 # This program is free software; you can redistribute it and/or modify it
/arch/x86/ras/
DKconfig8 PFN overflows, we try to soft-offline that page as we take it to mean
9 that it has reached a relatively high error count and would probably
10 be best if we don't use it anymore.
/arch/um/drivers/
Drtc_user.c58 struct itimerspec it = { in uml_rtc_enable_alarm() local
64 if (timerfd_settime(uml_rtc_irq_fds[0], 0, &it, NULL)) in uml_rtc_enable_alarm()
/arch/sh/lib/
Dmemmove.S17 ! if dest > src, call memcpy (it copies in decreasing order)
33 bt/s 8f ! if it's too small, copy a byte at once
/arch/arm/mach-ux500/
Dpm.c113 u32 it, im; in prcmu_pending_irq() local
117 it = readl(PRCM_ARMITVAL31TO0 + i * 4); in prcmu_pending_irq()
119 if (it & im) in prcmu_pending_irq()
/arch/arm/mach-omap1/
Dams-delta-fiq-handler.S106 cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt?
107 beq gpio @ yes - process it
138 @ r10 now contains KEYBRD_CLK_MASK, use it
139 bic r11, r11, r10 @ unmask it
152 @ r8 contains KEYBRD_DATA_MASK, use it
154 @ r10 already contains 0, reuse it
179 @ r10 already contains 0, reuse it
204 str r8, [r12] @ append it to the buffer tail

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