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Searched refs:pmc (Results 1 – 25 of 146) sorted by relevance

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/arch/x86/kvm/
Dpmu.h9 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu) argument
27 unsigned int (*pmc_perf_hw_id)(struct kvm_pmc *pmc);
29 bool (*pmc_is_enabled)(struct kvm_pmc *pmc);
45 static inline u64 pmc_bitmask(struct kvm_pmc *pmc) in pmc_bitmask() argument
47 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in pmc_bitmask()
49 return pmu->counter_bitmask[pmc->type]; in pmc_bitmask()
52 static inline u64 pmc_read_counter(struct kvm_pmc *pmc) in pmc_read_counter() argument
56 counter = pmc->counter; in pmc_read_counter()
57 if (pmc->perf_event && !pmc->is_paused) in pmc_read_counter()
58 counter += perf_event_read_value(pmc->perf_event, in pmc_read_counter()
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Dpmu.c62 struct kvm_pmc *pmc = perf_event->overflow_handler_context; in kvm_perf_overflow() local
63 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in kvm_perf_overflow()
65 if (!test_and_set_bit(pmc->idx, pmu->reprogram_pmi)) { in kvm_perf_overflow()
66 __set_bit(pmc->idx, (unsigned long *)&pmu->global_status); in kvm_perf_overflow()
67 kvm_make_request(KVM_REQ_PMU, pmc->vcpu); in kvm_perf_overflow()
75 struct kvm_pmc *pmc = perf_event->overflow_handler_context; in kvm_perf_overflow_intr() local
76 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in kvm_perf_overflow_intr()
78 if (!test_and_set_bit(pmc->idx, pmu->reprogram_pmi)) { in kvm_perf_overflow_intr()
79 __set_bit(pmc->idx, (unsigned long *)&pmu->global_status); in kvm_perf_overflow_intr()
80 kvm_make_request(KVM_REQ_PMU, pmc->vcpu); in kvm_perf_overflow_intr()
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/arch/powerpc/perf/
Dppc970-pmu.c147 int pmc, psel, unit, byte, bit; in p970_marked_instr_event() local
150 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in p970_marked_instr_event()
152 if (pmc) { in p970_marked_instr_event()
153 if (direct_marked_event[pmc - 1] & (1 << psel)) in p970_marked_instr_event()
156 bit = (pmc <= 4)? pmc - 1: 8 - pmc; in p970_marked_instr_event()
195 int pmc, byte, unit, sh, spcsel; in p970_get_constraint() local
199 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in p970_get_constraint()
200 if (pmc) { in p970_get_constraint()
201 if (pmc > 8) in p970_get_constraint()
203 sh = (pmc - 1) * 2; in p970_get_constraint()
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Dpower7-pmu.c86 int pmc, sh, unit; in power7_get_constraint() local
89 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power7_get_constraint()
90 if (pmc) { in power7_get_constraint()
91 if (pmc > 6) in power7_get_constraint()
93 sh = (pmc - 1) * 2; in power7_get_constraint()
96 if (pmc >= 5 && !(event == 0x500fa || event == 0x600f4)) in power7_get_constraint()
99 if (pmc < 5) { in power7_get_constraint()
146 int pmc, psel; in find_alternative_decode() local
149 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in find_alternative_decode()
151 if ((pmc == 2 || pmc == 4) && (psel & ~7) == 0x40) in find_alternative_decode()
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Dpower6-pmu.c139 int pmc, psel, ptype; in power6_marked_instr_event() local
143 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power6_marked_instr_event()
145 if (pmc >= 5) in power6_marked_instr_event()
151 if (pmc == 0 || !(ptype & (1 << (pmc - 1)))) in power6_marked_instr_event()
159 bit = ptype ^ (pmc - 1); in power6_marked_instr_event()
182 unsigned int pmc, ev, b, u, s, psel; in p6_compute_mmcr() local
189 pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK; in p6_compute_mmcr()
190 if (pmc) { in p6_compute_mmcr()
191 if (pmc_inuse & (1 << (pmc - 1))) in p6_compute_mmcr()
193 pmc_inuse |= 1 << (pmc - 1); in p6_compute_mmcr()
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Dpower5-pmu.c141 int pmc, byte, unit, sh; in power5_get_constraint() local
146 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power5_get_constraint()
147 if (pmc) { in power5_get_constraint()
148 if (pmc > 6) in power5_get_constraint()
150 sh = (pmc - 1) * 2; in power5_get_constraint()
153 if (pmc <= 4) in power5_get_constraint()
154 grp = (pmc - 1) >> 1; in power5_get_constraint()
186 if (!pmc) in power5_get_constraint()
201 if (pmc < 5) { in power5_get_constraint()
253 int pmc, altpmc, pp, j; in find_alternative_bdecode() local
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Dpower5+-pmu.c137 int pmc, byte, unit, sh; in power5p_get_constraint() local
141 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power5p_get_constraint()
142 if (pmc) { in power5p_get_constraint()
143 if (pmc > 6) in power5p_get_constraint()
145 sh = (pmc - 1) * 2; in power5p_get_constraint()
148 if (pmc >= 5 && !(event == 0x500009 || event == 0x600005)) in power5p_get_constraint()
179 if (pmc < 5) { in power5p_get_constraint()
191 int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power5p_limited_pmc_event() local
193 return pmc == 5 || pmc == 6; in power5p_limited_pmc_event()
245 int pmc, altpmc, pp, j; in find_alternative_bdecode() local
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Dmpc7450-pmu.c39 int pmc; in mpc7450_classify_event() local
41 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_classify_event()
42 if (pmc) { in mpc7450_classify_event()
43 if (pmc > N_COUNTER) in mpc7450_classify_event()
79 int pmc, sel; in mpc7450_threshold_use() local
81 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_threshold_use()
83 switch (pmc) { in mpc7450_threshold_use()
153 int pmc, class; in mpc7450_get_constraint() local
161 pmc = ((unsigned int)event >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_get_constraint()
162 mask = pmcbits[pmc - 1][0]; in mpc7450_get_constraint()
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Disa207-common.h200 #define CNST_PMC_SHIFT(pmc) ((pmc - 1) * 2) argument
201 #define CNST_PMC_VAL(pmc) (1 << CNST_PMC_SHIFT(pmc)) argument
202 #define CNST_PMC_MASK(pmc) (2 << CNST_PMC_SHIFT(pmc)) argument
210 #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) argument
211 #define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) argument
212 #define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) argument
218 #define p9_MMCR1_COMBINE_SHIFT(pmc) (38 - ((pmc - 1) * 2)) argument
250 #define MMCR2_FCS(pmc) (1ull << (63 - (((pmc) - 1) * 9))) argument
251 #define MMCR2_FCP(pmc) (1ull << (62 - (((pmc) - 1) * 9))) argument
252 #define MMCR2_FCH(pmc) (1ull << (57 - (((pmc) - 1) * 9))) argument
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Disa207-common.c16 PMU_FORMAT_ATTR(pmc, "config:16-19");
172 static unsigned long combine_shift(unsigned long pmc) in combine_shift() argument
175 return p9_MMCR1_COMBINE_SHIFT(pmc); in combine_shift()
177 return MMCR1_COMBINE_SHIFT(pmc); in combine_shift()
357 unsigned int unit, pmc, cache, ebb; in isa207_get_constraint() local
365 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; in isa207_get_constraint()
375 if (pmc) { in isa207_get_constraint()
378 if (pmc > 6) in isa207_get_constraint()
384 if (pmc >= 5 && base_event != 0x500fa && in isa207_get_constraint()
388 mask |= CNST_PMC_MASK(pmc); in isa207_get_constraint()
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/arch/arm64/kvm/
Dpmu-emul.c19 static void kvm_pmu_stop_counter(struct kvm_vcpu *vcpu, struct kvm_pmc *pmc);
50 static struct kvm_vcpu *kvm_pmc_to_vcpu(struct kvm_pmc *pmc) in kvm_pmc_to_vcpu() argument
55 pmc -= pmc->idx; in kvm_pmc_to_vcpu()
56 pmu = container_of(pmc, struct kvm_pmu, pmc[0]); in kvm_pmc_to_vcpu()
65 static bool kvm_pmu_pmc_is_chained(struct kvm_pmc *pmc) in kvm_pmu_pmc_is_chained() argument
67 struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc); in kvm_pmu_pmc_is_chained()
69 return test_bit(pmc->idx >> 1, vcpu->arch.pmu.chained); in kvm_pmu_pmc_is_chained()
88 static struct kvm_pmc *kvm_pmu_get_canonical_pmc(struct kvm_pmc *pmc) in kvm_pmu_get_canonical_pmc() argument
90 if (kvm_pmu_pmc_is_chained(pmc) && in kvm_pmu_get_canonical_pmc()
91 kvm_pmu_idx_is_high_counter(pmc->idx)) in kvm_pmu_get_canonical_pmc()
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/arch/x86/kvm/svm/
Dpmu.c153 static unsigned int amd_pmc_perf_hw_id(struct kvm_pmc *pmc) in amd_pmc_perf_hw_id() argument
156 u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT; in amd_pmc_perf_hw_id()
157 u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; in amd_pmc_perf_hw_id()
160 if (guest_cpuid_family(pmc->vcpu) >= 0x17) in amd_pmc_perf_hw_id()
185 static bool amd_pmc_is_enabled(struct kvm_pmc *pmc) in amd_pmc_is_enabled() argument
240 struct kvm_pmc *pmc; in amd_msr_idx_to_pmc() local
242 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); in amd_msr_idx_to_pmc()
243 pmc = pmc ? pmc : get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); in amd_msr_idx_to_pmc()
245 return pmc; in amd_msr_idx_to_pmc()
251 struct kvm_pmc *pmc; in amd_pmu_get_msr() local
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/arch/arm/mach-at91/
Dpm_suspend.S18 pmc .req r0 label
38 2: ldr r8, [pmc, #AT91_PMC_SR]
50 1: ldr r7, [pmc, #AT91_PMC_SR]
61 1: ldr r7, [pmc, #AT91_PMC_SR]
75 str r7, [pmc, #AT91_PMC_SCDR]
472 ldr pmc, .pmc_base
481 ldr tmp1, [pmc, tmp3]
484 str tmp1, [pmc, tmp3]
492 ldr tmp1, [pmc, #AT91_CKGR_MOR]
495 str tmp1, [pmc, #AT91_CKGR_MOR]
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/arch/arm/boot/dts/
Dsama5d2.dtsi47 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
63 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
123 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
132 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
141 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
165 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
184 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
186 assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
195 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
197 assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
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Dsama7g5.dtsi81 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
113 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
116 pmc: pmc@e0018000 { label
117 compatible = "microchip,sama7g5-pmc", "syscon";
171 clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>;
173 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
174 assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
184 clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>;
186 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
187 assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
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Dsam9x60.dtsi83 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
85 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
94 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
103 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
105 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
123 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
140 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
142 assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
151 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_GCK 26>;
153 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
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Dat91sam9260.dtsi117 pmc: pmc@fffffc00 { label
118 compatible = "atmel,at91sam9260-pmc", "syscon";
129 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
135 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
142 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
153 …clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
165 …clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 2…
506 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
517 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
528 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
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Dat91sam9261.dtsi83 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
94 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
114 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
140 …clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
148 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
175 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
187 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
200 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
213 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
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Dat91sam9g35.dtsi28 pmc: pmc@fffffc00 { label
29 compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon";
Dat91sam9g45.dtsi110 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
117 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
131 pmc: pmc@fffffc00 { label
132 compatible = "atmel,at91sam9g45-pmc", "syscon";
150 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
166 …clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
176 …clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
185 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
628 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
639 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
[all …]
Dat91sam9x35.dtsi29 pmc: pmc@fffffc00 { label
30 compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon";
Dat91sam9g25.dtsi29 pmc: pmc@fffffc00 { label
30 compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
Dat91sam9x25.dtsi30 pmc: pmc@fffffc00 { label
31 compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon";
Dat91sam9g20.dtsi44 pmc: pmc@fffffc00 { label
45 compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
/arch/x86/kvm/vmx/
Dpmu_intel.c45 struct kvm_pmc *pmc; in reprogram_fixed_counters() local
47 pmc = get_fixed_pmc(pmu, MSR_CORE_PERF_FIXED_CTR0 + i); in reprogram_fixed_counters()
53 reprogram_fixed_counter(pmc, new_ctrl, i); in reprogram_fixed_counters()
71 static unsigned int intel_pmc_perf_hw_id(struct kvm_pmc *pmc) in intel_pmc_perf_hw_id() argument
73 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in intel_pmc_perf_hw_id()
74 u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT; in intel_pmc_perf_hw_id()
75 u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; in intel_pmc_perf_hw_id()
103 static bool intel_pmc_is_enabled(struct kvm_pmc *pmc) in intel_pmc_is_enabled() argument
105 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in intel_pmc_is_enabled()
110 return test_bit(pmc->idx, (unsigned long *)&pmu->global_ctrl); in intel_pmc_is_enabled()
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