Home
last modified time | relevance | path

Searched refs:read_sysreg_s (Results 1 – 19 of 19) sorted by relevance

/arch/arm64/include/asm/
Darm_dsu_pmu.h35 return read_sysreg_s(CLUSTERPMCR_EL1); in __dsu_pmu_read_pmcr()
46 u32 val = read_sysreg_s(CLUSTERPMOVSCLR_EL1); in __dsu_pmu_get_reset_overflow()
62 return read_sysreg_s(CLUSTERPMXEVCNTR_EL1); in __dsu_pmu_read_counter()
81 return read_sysreg_s(CLUSTERPMCCNTR_EL1); in __dsu_pmu_read_pmccntr()
119 return read_sysreg_s(CLUSTERPMCEID0_EL1); in __dsu_pmu_read_pmceid()
121 return read_sysreg_s(CLUSTERPMCEID1_EL1); in __dsu_pmu_read_pmceid()
Darch_gicv3.h19 #define read_gicreg(r) read_sysreg_s(SYS_ ## r)
39 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); in gic_read_iar_common()
56 irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1); in gic_read_iar_cavium_thunderx()
71 return read_sysreg_s(SYS_ICC_CTLR_EL1); in gic_read_ctlr()
87 return read_sysreg_s(SYS_ICC_SRE_EL1); in gic_read_sre()
103 return read_sysreg_s(SYS_ICC_PMR_EL1); in gic_read_pmr()
113 return read_sysreg_s(SYS_ICC_RPR_EL1); in gic_read_rpr()
Dkvm_host.h617 case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break; in __vcpu_read_sys_reg_from_cpu()
618 case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
619 case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
620 case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break; in __vcpu_read_sys_reg_from_cpu()
621 case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; in __vcpu_read_sys_reg_from_cpu()
622 case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
623 case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
624 case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break; in __vcpu_read_sys_reg_from_cpu()
625 case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break; in __vcpu_read_sys_reg_from_cpu()
626 case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
[all …]
Dirqflags.h30 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); in arch_local_irq_enable()
49 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); in arch_local_irq_disable()
Ddaifflags.h25 (read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF | in local_daif_mask()
49 if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON) in local_daif_save_flags()
Darchrandom.h111 unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1); in __early_cpu_has_rndr()
Dfpsimd.h135 u64 __zcr = read_sysreg_s((reg)); \
Dcpufeature.h647 pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1); in supports_csv2p3()
661 isar2 = read_sysreg_s(SYS_ID_AA64ISAR2_EL1); in supports_clearbhb()
Dcputype.h174 #define read_cpuid(reg) read_sysreg_s(SYS_ ## reg)
Dsysreg.h1307 #define read_sysreg_s(r) ({ \ macro
1330 u64 __scs_val = read_sysreg_s(sysreg); \
/arch/arm64/kvm/hyp/nvhe/
Ddebug-sr.c29 reg = read_sysreg_s(SYS_PMBLIMITR_EL1); in __debug_save_spe()
34 *pmscr_el1 = read_sysreg_s(SYS_PMSCR_EL1); in __debug_save_spe()
60 if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_ENABLE)) in __debug_save_trace()
67 *trfcr_el1 = read_sysreg_s(SYS_TRFCR_EL1); in __debug_save_trace()
/arch/arm64/kvm/
Ddebug.c282 !(read_sysreg_s(SYS_PMBIDR_EL1) & BIT(SYS_PMBIDR_EL1_P_SHIFT))) in kvm_arch_vcpu_load_debug_state_flags()
287 !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_PROG)) in kvm_arch_vcpu_load_debug_state_flags()
/arch/arm64/kernel/
Dtopology.c87 #define read_corecnt() read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0)
88 #define read_constcnt() read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0)
Dfpsimd.c709 zcr = read_sysreg_s(SYS_ZCR_EL1) & ~zcr; in sve_probe_vqs()
846 zcr = read_sysreg_s(SYS_ZCR_EL1); in read_zcr_features()
Dmte.c182 u64 tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1); in mte_check_tfsr_el1()
Dproton-pack.c937 mmfr1 = read_sysreg_s(SYS_ID_AA64MMFR1_EL1); in supports_ecbhb()
Dcpufeature.c1247 case r: val = read_sysreg_s(r); break;
1480 u64 mmfr2 = read_sysreg_s(SYS_ID_AA64MMFR2_EL1); in kaslr_requires_kpti()
1757 u64 val = read_sysreg_s(SYS_CLIDR_EL1); in cpu_has_fwb()
2467 mvfr1 = read_sysreg_s(SYS_MVFR1_EL1); in compat_has_neon()
/arch/arm64/kvm/hyp/include/hyp/
Dswitch.h225 __val = read_sysreg_s(SYS_ ## key ## KEYLO_EL1); \
227 __val = read_sysreg_s(SYS_ ## key ## KEYHI_EL1); \
Dsysreg-sr.h62 ctxt_sys_reg(ctxt, TFSRE0_EL1) = read_sysreg_s(SYS_TFSRE0_EL1); in __sysreg_save_el1_state()
81 ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2); in __sysreg_save_el2_return_state()