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Searched refs:DC_IP_REQUEST_CNTL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_hwseq.c171 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn302_dsc_pg_control()
173 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn302_dsc_pg_control()
222 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn302_dsc_pg_control()
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.h223 SR(DC_IP_REQUEST_CNTL)
288 SR(DC_IP_REQUEST_CNTL)
338 SR(DC_IP_REQUEST_CNTL)
419 SR(DC_IP_REQUEST_CNTL), \
479 SR(DC_IP_REQUEST_CNTL), \
558 uint32_t DC_IP_REQUEST_CNTL; member
768 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
833 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
873 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
919 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
[all …]
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hwseq.c322 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn31_dsc_pg_control()
324 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn31_dsc_pg_control()
357 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn31_dsc_pg_control()
Ddcn31_resource.c804 SR(DC_IP_REQUEST_CNTL), \
837 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c671 if (REG(DC_IP_REQUEST_CNTL)) { in power_on_plane()
672 REG_SET(DC_IP_REQUEST_CNTL, 0, in power_on_plane()
681 REG_SET(DC_IP_REQUEST_CNTL, 0, in power_on_plane()
698 REG_SET(DC_IP_REQUEST_CNTL, 0, in undo_DEGVIDCN10_253_wa()
702 REG_SET(DC_IP_REQUEST_CNTL, 0, in undo_DEGVIDCN10_253_wa()
727 REG_SET(DC_IP_REQUEST_CNTL, 0, in apply_DEGVIDCN10_253_wa()
731 REG_SET(DC_IP_REQUEST_CNTL, 0, in apply_DEGVIDCN10_253_wa()
1154 if (REG(DC_IP_REQUEST_CNTL)) { in dcn10_plane_atomic_power_down()
1155 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn10_plane_atomic_power_down()
1165 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn10_plane_atomic_power_down()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hwseq.c354 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn20_dsc_pg_control()
356 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn20_dsc_pg_control()
413 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn20_dsc_pg_control()
1063 if (REG(DC_IP_REQUEST_CNTL)) { in dcn20_power_on_plane()
1064 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn20_power_on_plane()
1073 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn20_power_on_plane()