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Searched refs:DENTIST_DISPCLK_CNTL (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr_internal.h90 .DENTIST_DISPCLK_CNTL = mmDENTIST_DISPCLK_CNTL
94 SR(DENTIST_DISPCLK_CNTL)
98 SR(DENTIST_DISPCLK_CNTL)
106 SR(DENTIST_DISPCLK_CNTL), \
112 SR(DENTIST_DISPCLK_CNTL)
119 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, mask_sh)
123 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, mask_sh),\
124 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, mask_sh)
128 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, mask_sh),\
129 CLK_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, mask_sh)
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c138 REG_GET(DENTIST_DISPCLK_CNTL, in dcn20_update_clocks_update_dentist()
171 REG_UPDATE(DENTIST_DISPCLK_CNTL, in dcn20_update_clocks_update_dentist()
173 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 100); in dcn20_update_clocks_update_dentist()
198 REG_UPDATE(DENTIST_DISPCLK_CNTL, in dcn20_update_clocks_update_dentist()
200 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_DONE, 1, 50, 1000); in dcn20_update_clocks_update_dentist()
201 REG_UPDATE(DENTIST_DISPCLK_CNTL, in dcn20_update_clocks_update_dentist()
203 REG_WAIT(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_CHG_DONE, 1, 5, 100); in dcn20_update_clocks_update_dentist()
424 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_WDIVIDER, &dispclk_wdivider); in dcn2_read_clocks_from_hw_dentist()
425 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPPCLK_WDIVIDER, &dppclk_wdivider); in dcn2_read_clocks_from_hw_dentist()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.h64 SR(DENTIST_DISPCLK_CNTL)
122 DCCG_SF(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_MODE, mask_sh)
Ddcn31_dccg.c238 REG_UPDATE(DENTIST_DISPCLK_CNTL, DENTIST_DISPCLK_CHG_MODE, in dccg31_set_dispclk_change_mode()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
Ddce60_clk_mgr.c94 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider); in dce60_get_dp_ref_freq_khz()
/drivers/gpu/drm/radeon/
Ddce6_afmt.c305 unsigned int div = (RREG32(DENTIST_DISPCLK_CNTL) & in dce6_dp_audio_set_dto()
Dsid.h918 #define DENTIST_DISPCLK_CNTL 0x0490 macro
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.h207 uint32_t DENTIST_DISPCLK_CNTL; member
/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
Ddce_clk_mgr.c143 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider); in dce_get_dp_ref_freq_khz()
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clk_mgr.c162 REG_GET(DENTIST_DISPCLK_CNTL, DENTIST_DPREFCLK_WDIVIDER, &dprefclk_wdivider); in dce_get_dp_ref_freq_khz()