Searched refs:RF_PATH_D (Results 1 – 5 of 5) sorted by relevance
396 …pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()402 …pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 MSBs if read 32-bit from … in phy_InitBBRFRegisterDefinition()420 pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; in phy_InitBBRFRegisterDefinition()426 pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */ in phy_InitBBRFRegisterDefinition()440 pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; in phy_InitBBRFRegisterDefinition()446 pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; in phy_InitBBRFRegisterDefinition()452 pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; in phy_InitBBRFRegisterDefinition()458 pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; in phy_InitBBRFRegisterDefinition()464 pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; in phy_InitBBRFRegisterDefinition()470 pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; in phy_InitBBRFRegisterDefinition()[all …]
477 case RF_PATH_D: in phy_RF6052_Config_ParaFile()508 case RF_PATH_D: in phy_RF6052_Config_ParaFile()518 case RF_PATH_D: in phy_RF6052_Config_ParaFile()
54 RF_PATH_D = 3, /* Radio Path D */ enumerator
141 #define RF_PATH_D 3 macro
136 RF_PATH_D = 3, enumerator