Searched refs:SW_RESET (Results 1 – 9 of 9) sorted by relevance
| /drivers/clk/qcom/ |
| D | gdsc.h | 55 #define SW_RESET BIT(3) macro
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| D | gpucc-sdm660.c | 258 .flags = CLAMP_IO | SW_RESET | AON_RESET | NO_RET_PERIPH,
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| D | gpucc-msm8998.c | 273 .flags = CLAMP_IO | SW_RESET | AON_RESET | NO_RET_PERIPH,
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| D | gdsc.c | 248 if (sc->flags & SW_RESET) { in gdsc_enable()
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| /drivers/watchdog/ |
| D | asm9260_wdt.c | 50 SW_RESET, enumerator
277 priv->mode = SW_RESET; in asm9260_wdt_get_dt_mode()
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| /drivers/net/wireless/intel/ipw2x00/ |
| D | ipw2100.h | 301 SW_RESET, enumerator
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| /drivers/phy/qualcomm/ |
| D | phy-qcom-qmp.c | 28 #define SW_RESET BIT(0) macro
4057 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET); in qcom_qmp_phy_serdes_init()
4617 qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); in qcom_qmp_phy_com_init()
4666 SW_RESET); in qcom_qmp_phy_com_exit()
4827 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qcom_qmp_phy_power_on()
4872 qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qcom_qmp_phy_power_off()
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| /drivers/net/dsa/microchip/ |
| D | ksz9477_reg.h | 168 #define SW_RESET BIT(1) macro
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| D | ksz9477.c | 202 ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true); in ksz9477_reset_switch()
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