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Searched refs:aenq (Results 1 – 9 of 9) sorted by relevance

/drivers/infiniband/hw/efa/
Defa_com.c192 struct efa_com_aenq *aenq = &edev->aenq; in efa_com_admin_init_aenq() local
202 size = EFA_ASYNC_QUEUE_DEPTH * sizeof(*aenq->entries); in efa_com_admin_init_aenq()
203 aenq->entries = dma_alloc_coherent(edev->dmadev, size, &aenq->dma_addr, in efa_com_admin_init_aenq()
205 if (!aenq->entries) in efa_com_admin_init_aenq()
208 aenq->aenq_handlers = aenq_handlers; in efa_com_admin_init_aenq()
209 aenq->depth = EFA_ASYNC_QUEUE_DEPTH; in efa_com_admin_init_aenq()
210 aenq->cc = 0; in efa_com_admin_init_aenq()
211 aenq->phase = 1; in efa_com_admin_init_aenq()
213 addr_low = lower_32_bits(aenq->dma_addr); in efa_com_admin_init_aenq()
214 addr_high = upper_32_bits(aenq->dma_addr); in efa_com_admin_init_aenq()
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Defa_com_cmd.c600 get_resp.u.aenq.supported_groups, in efa_com_set_aenq_config()
601 get_resp.u.aenq.enabled_groups); in efa_com_set_aenq_config()
603 if ((get_resp.u.aenq.supported_groups & groups) != groups) { in efa_com_set_aenq_config()
607 groups, get_resp.u.aenq.supported_groups); in efa_com_set_aenq_config()
611 cmd.u.aenq.enabled_groups = groups; in efa_com_set_aenq_config()
Defa_admin_cmds_defs.h724 struct efa_admin_feature_aenq_desc aenq; member
745 struct efa_admin_feature_aenq_desc aenq; member
Defa_com.h105 struct efa_com_aenq aenq; member
Defa_main.c468 edev->aenq.msix_vector_idx = dev->admin_msix_vector_idx; in efa_probe_device()
/drivers/net/ethernet/amazon/ena/
Dena_com.c133 struct ena_com_aenq *aenq = &ena_dev->aenq; in ena_com_admin_init_aenq() local
137 ena_dev->aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH; in ena_com_admin_init_aenq()
139 aenq->entries = dma_alloc_coherent(ena_dev->dmadev, size, in ena_com_admin_init_aenq()
140 &aenq->dma_addr, GFP_KERNEL); in ena_com_admin_init_aenq()
142 if (!aenq->entries) { in ena_com_admin_init_aenq()
147 aenq->head = aenq->q_depth; in ena_com_admin_init_aenq()
148 aenq->phase = 1; in ena_com_admin_init_aenq()
150 addr_low = ENA_DMA_ADDR_TO_UINT32_LOW(aenq->dma_addr); in ena_com_admin_init_aenq()
151 addr_high = ENA_DMA_ADDR_TO_UINT32_HIGH(aenq->dma_addr); in ena_com_admin_init_aenq()
157 aenq_caps |= ena_dev->aenq.q_depth & ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK; in ena_com_admin_init_aenq()
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Dena_com.h300 struct ena_com_aenq aenq; member
340 struct ena_admin_feature_aenq_desc aenq; member
Dena_admin_defs.h958 struct ena_admin_feature_aenq_desc aenq; member
993 struct ena_admin_feature_aenq_desc aenq; member
Dena_netdev.c3546 aenq_groups &= get_feat_ctx->aenq.supported_groups; in ena_device_init()