| /drivers/clk/ti/ |
| D | composite.c | 124 struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw); in _register_composite() local
134 if (!cclk->comp_nodes[i]) in _register_composite()
137 comp = _lookup_component(cclk->comp_nodes[i]); in _register_composite()
140 cclk->comp_nodes[i]->name, node); in _register_composite()
147 if (cclk->comp_clks[comp->type] != NULL) { in _register_composite()
153 cclk->comp_clks[comp->type] = comp; in _register_composite()
156 cclk->comp_nodes[i] = NULL; in _register_composite()
161 comp = cclk->comp_clks[i]; in _register_composite()
179 _get_hw(cclk, CLK_COMPONENT_TYPE_MUX), in _register_composite()
181 _get_hw(cclk, CLK_COMPONENT_TYPE_DIVIDER), in _register_composite()
[all …]
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| /drivers/clk/sprd/ |
| D | common.c | 27 struct sprd_clk_common *cclk; in sprd_clk_set_regmap() local
30 cclk = desc->clk_clks[i]; in sprd_clk_set_regmap()
31 if (!cclk) in sprd_clk_set_regmap()
34 cclk->regmap = regmap; in sprd_clk_set_regmap()
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| /drivers/spi/ |
| D | spi-qup.c | 128 struct clk *cclk; /* core clock */ member
672 ret = clk_set_rate(controller->cclk, xfer->speed_hz); in spi_qup_io_prep()
998 struct clk *iclk, *cclk; in spi_qup_probe() local
1016 cclk = devm_clk_get(dev, "core"); in spi_qup_probe()
1017 if (IS_ERR(cclk)) in spi_qup_probe()
1018 return PTR_ERR(cclk); in spi_qup_probe()
1063 controller->cclk = cclk; in spi_qup_probe()
1080 ret = clk_prepare_enable(cclk); in spi_qup_probe()
1088 clk_disable_unprepare(cclk); in spi_qup_probe()
1162 clk_disable_unprepare(cclk); in spi_qup_probe()
[all …]
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| /drivers/clk/sunxi-ng/ |
| D | ccu_common.c | 98 struct ccu_common *cclk = desc->ccu_clks[i]; in sunxi_ccu_probe() local
100 if (!cclk) in sunxi_ccu_probe()
103 cclk->base = reg; in sunxi_ccu_probe()
104 cclk->lock = &ccu_lock; in sunxi_ccu_probe()
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| /drivers/iio/adc/ |
| D | ti-adc12138.c | 41 struct clk *cclk; member
437 adc->cclk = devm_clk_get(&spi->dev, NULL); in adc12138_probe()
438 if (IS_ERR(adc->cclk)) in adc12138_probe()
439 return PTR_ERR(adc->cclk); in adc12138_probe()
461 ret = clk_prepare_enable(adc->cclk); in adc12138_probe()
499 clk_disable_unprepare(adc->cclk); in adc12138_probe()
514 clk_disable_unprepare(adc->cclk); in adc12138_remove()
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| /drivers/clk/rockchip/ |
| D | clk-cpu.c | 255 struct clk *clk, *cclk; in rockchip_clk_register_cpuclk() local
328 cclk = clk_register(NULL, &cpuclk->hw); in rockchip_clk_register_cpuclk()
329 if (IS_ERR(cclk)) { in rockchip_clk_register_cpuclk()
331 ret = PTR_ERR(cclk); in rockchip_clk_register_cpuclk()
335 return cclk; in rockchip_clk_register_cpuclk()
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| /drivers/net/ethernet/chelsio/cxgb4vf/ |
| D | t4vf_common.h | 198 u32 cclk; /* Core Clock (KHz) */ member
311 return adapter->params.vpd.cclk / 1000; in core_ticks_per_usec()
317 return (us * adapter->params.vpd.cclk) / 1000; in us_to_core_ticks()
323 return (ticks * 1000) / adapter->params.vpd.cclk; in core_ticks_to_us()
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| D | t4vf_hw.c | 977 vpd_params->cclk = vals[0]; in t4vf_get_vpd_params()
2156 adapter->params.vpd.cclk = 50000; in t4vf_prep_adapter()
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| /drivers/net/can/m_can/ |
| D | m_can_platform.c | 133 mcan_class->can.clock.freq = clk_get_rate(mcan_class->cclk); in m_can_plat_probe()
184 clk_disable_unprepare(mcan_class->cclk); in m_can_runtime_suspend()
200 err = clk_prepare_enable(mcan_class->cclk); in m_can_runtime_resume()
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| D | m_can.h | 81 struct clk *cclk; member
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| D | tcan4x5x-core.c | 321 if (IS_ERR(mcan_class->cclk)) { in tcan4x5x_can_probe()
325 freq = clk_get_rate(mcan_class->cclk); in tcan4x5x_can_probe()
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| D | m_can.c | 1948 cdev->cclk = devm_clk_get(cdev->dev, "cclk"); in m_can_class_get_clocks()
1950 if (IS_ERR(cdev->hclk) || IS_ERR(cdev->cclk)) { in m_can_class_get_clocks()
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| /drivers/scsi/csiostor/ |
| D | csio_hw.h | 265 uint32_t cclk; member
582 return (ticks * 1000 + hw->vpd.cclk/2) / hw->vpd.cclk; in csio_core_ticks_to_us()
588 return (us * hw->vpd.cclk) / 1000; in csio_us_to_core_ticks()
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| /drivers/mmc/host/ |
| D | mmci_stm32_sdmmc.c | 210 host->cclk = host->mclk; in mmci_sdmmc_set_clkreg()
215 host->cclk = host->mclk / (2 * clk); in mmci_sdmmc_set_clkreg()
224 host->cclk = host->mclk / (2 * clk); in mmci_sdmmc_set_clkreg()
229 host->mmc->actual_clock = host->cclk; in mmci_sdmmc_set_clkreg()
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| D | mmci.c | 359 if (host->cclk < 25000000) in mmci_reg_delay()
410 host->cclk = 0; in mmci_set_clkreg()
414 host->cclk = host->mclk; in mmci_set_clkreg()
419 host->cclk = host->mclk; in mmci_set_clkreg()
430 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
439 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
449 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
1143 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1246 clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk; in mmci_start_command()
1248 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
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| D | mmci.h | 406 unsigned int cclk; member
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| /drivers/clk/tegra/ |
| D | Makefile | 16 obj-y += clk-tegra-super-cclk.o
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| /drivers/net/ethernet/chelsio/cxgb4/ |
| D | cxgb4.h | 392 unsigned int cclk; member
1685 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
1691 return (us * adap->params.vpd.cclk) / 1000; in us_to_core_ticks()
1698 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / in core_ticks_to_us()
1699 adapter->params.vpd.cclk); in core_ticks_to_us()
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| D | cxgb4_uld.c | 618 lld->cclk_ps = 1000000000 / adap->params.vpd.cclk; in uld_init()
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| D | cudbg_lib.c | 1637 if (!padap->params.vpd.cclk) in cudbg_collect_hw_sched()
1970 if (!padap->params.vpd.cclk) in cudbg_collect_clk_info()
1979 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* psec */ in cudbg_collect_clk_info()
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| D | t4_hw.c | 2845 p->cclk = cclk_val; in t4_get_vpd_params()
5893 u64 v = bytes256 * adap->params.vpd.cclk; in chan_rate()
9187 adapter->params.vpd.cclk = 50000; in t4_prep_adapter()
10298 v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */ in t4_get_tx_sched()
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| D | sge.c | 3433 u64 tmp = (sgetstamp * 1000 * 1000 + adap->params.vpd.cclk / 2); in cxgb4_sgetim_to_hwtstamp()
3435 ns = div_u64(tmp, adap->params.vpd.cclk); in cxgb4_sgetim_to_hwtstamp()
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| /drivers/net/ethernet/chelsio/cxgb3/ |
| D | common.h | 355 unsigned int cclk; member
634 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
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| D | t3_hw.c | 198 u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1; in mi1_init()
583 VPD_ENTRY(cclk, 6); /* core clock */
730 ret = vpdstrtouint(vpd.cclk_data, vpd.cclk_len, 10, &p->cclk); in get_vpd_params()
3040 unsigned int clk = adap->params.vpd.cclk * 1000; in t3_config_sched()
3081 tp_set_timers(adap, adap->params.vpd.cclk * 1000); in tp_init()
3567 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); in early_hw_init()
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| D | xgmac.c | 407 thres = (adap->params.vpd.cclk * 1000) / 15625; in t3_mac_set_mtu()
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