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Searched refs:ch_num (Results 1 – 25 of 34) sorted by relevance

12

/drivers/usb/musb/
Dux500_dma.c37 u8 ch_num; member
135 u8 ch_num = hw_ep->epnum - 1; in ux500_dma_channel_allocate() local
141 if (ch_num > 7) in ux500_dma_channel_allocate()
142 ch_num -= 8; in ux500_dma_channel_allocate()
144 if (ch_num >= UX500_MUSB_DMA_NUM_RX_TX_CHANNELS) in ux500_dma_channel_allocate()
147 ux500_channel = is_tx ? &(controller->tx_channel[ch_num]) : in ux500_dma_channel_allocate()
148 &(controller->rx_channel[ch_num]) ; in ux500_dma_channel_allocate()
158 hw_ep->epnum, is_tx, ch_num); in ux500_dma_channel_allocate()
168 dev_dbg(musb->controller, "channel=%d\n", ux500_channel->ch_num); in ux500_dma_channel_release()
216 ux500_channel->ch_num, ux500_channel->is_tx); in ux500_dma_channel_abort()
[all …]
Dmusb_cppi41.c488 u8 ch_num = hw_ep->epnum - 1; in cppi41_dma_channel_allocate() local
490 if (ch_num >= controller->num_channels) in cppi41_dma_channel_allocate()
494 cppi41_channel = &controller->tx_channel[ch_num]; in cppi41_dma_channel_allocate()
496 cppi41_channel = &controller->rx_channel[ch_num]; in cppi41_dma_channel_allocate()
/drivers/gpu/drm/imx/dcss/
Ddcss-dev.h130 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres);
131 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr,
133 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en);
134 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num,
136 void dcss_dpr_set_rotation(struct dcss_dpr *dpr, int ch_num, u32 rotation);
150 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha);
151 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num,
153 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num,
155 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en);
169 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num,
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Ddcss-plane.c173 dcss_scaler_get_min_max_ratios(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_check()
242 dcss_dpr_addr_set(dcss->dpr, dcss_plane->ch_num, p1_ba, p2_ba, in dcss_plane_atomic_set_base()
310 dcss_dpr_format_set(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
314 dcss_dpr_set_res(dcss->dpr, dcss_plane->ch_num, src_w, src_h); in dcss_plane_atomic_update()
315 dcss_dpr_set_rotation(dcss->dpr, dcss_plane->ch_num, in dcss_plane_atomic_update()
323 dcss_scaler_set_filter(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_update()
326 dcss_scaler_setup(dcss->scaler, dcss_plane->ch_num, in dcss_plane_atomic_update()
333 dcss_dtg_plane_pos_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
335 dcss_dtg_plane_alpha_set(dcss->dtg, dcss_plane->ch_num, in dcss_plane_atomic_update()
338 if (!dcss_plane->ch_num && (new_state->alpha >> 8) == 0) in dcss_plane_atomic_update()
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Ddcss-dtg.c258 void dcss_dtg_plane_pos_set(struct dcss_dtg *dtg, int ch_num, in dcss_dtg_plane_pos_set() argument
270 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
271 dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
274 DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
276 DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num); in dcss_dtg_plane_pos_set()
280 bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha) in dcss_dtg_global_alpha_changed() argument
282 if (ch_num) in dcss_dtg_global_alpha_changed()
288 void dcss_dtg_plane_alpha_set(struct dcss_dtg *dtg, int ch_num, in dcss_dtg_plane_alpha_set() argument
292 if (ch_num) in dcss_dtg_plane_alpha_set()
340 void dcss_dtg_ch_enable(struct dcss_dtg *dtg, int ch_num, bool en) in dcss_dtg_ch_enable() argument
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Ddcss-dpr.c109 int ch_num; member
146 ch->ch_num = i; in dcss_dpr_ch_init_all()
232 void dcss_dpr_set_res(struct dcss_dpr *dpr, int ch_num, u32 xres, u32 yres) in dcss_dpr_set_res() argument
234 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_set_res()
259 void dcss_dpr_addr_set(struct dcss_dpr *dpr, int ch_num, u32 luma_base_addr, in dcss_dpr_addr_set() argument
262 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_addr_set()
340 void dcss_dpr_enable(struct dcss_dpr *dpr, int ch_num, bool en) in dcss_dpr_enable() argument
342 struct dcss_dpr_ch *ch = &dpr->ch[ch_num]; in dcss_dpr_enable()
477 switch (ch->ch_num) { in dcss_dpr_tile_set()
507 void dcss_dpr_format_set(struct dcss_dpr *dpr, int ch_num, in dcss_dpr_format_set() argument
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Ddcss-scaler.c362 void dcss_scaler_ch_enable(struct dcss_scaler *scl, int ch_num, bool en) in dcss_scaler_ch_enable() argument
364 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_ch_enable()
576 int dcss_scaler_get_min_max_ratios(struct dcss_scaler *scl, int ch_num, in dcss_scaler_get_min_max_ratios() argument
579 *min = upscale_fp(dcss_scaler_factors[ch_num].upscale, 16); in dcss_scaler_get_min_max_ratios()
580 *max = downscale_fp(dcss_scaler_factors[ch_num].downscale, 16); in dcss_scaler_get_min_max_ratios()
775 void dcss_scaler_set_filter(struct dcss_scaler *scl, int ch_num, in dcss_scaler_set_filter() argument
778 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_set_filter()
783 void dcss_scaler_setup(struct dcss_scaler *scl, int ch_num, in dcss_scaler_setup() argument
788 struct dcss_scaler_ch *ch = &scl->ch[ch_num]; in dcss_scaler_setup()
Ddcss-kms.h14 int ch_num; member
/drivers/hwmon/
Dpowr1220.c104 static int powr1220_read_adc(struct device *dev, int ch_num) in powr1220_read_adc() argument
113 if (time_after(jiffies, data->adc_last_updated[ch_num] + HZ) || in powr1220_read_adc()
114 !data->adc_valid[ch_num]) { in powr1220_read_adc()
121 if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV || in powr1220_read_adc()
122 data->adc_maxes[ch_num] == 0) in powr1220_read_adc()
127 adc_range | ch_num); in powr1220_read_adc()
153 data->adc_values[ch_num] = reading; in powr1220_read_adc()
154 data->adc_valid[ch_num] = true; in powr1220_read_adc()
155 data->adc_last_updated[ch_num] = jiffies; in powr1220_read_adc()
158 if (reading > data->adc_maxes[ch_num]) in powr1220_read_adc()
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Dmr75203.c528 u32 ts_num, vm_num, pd_num, ch_num, val, index, i; in mr75203_probe() local
570 ch_num = (val & CH_NUM_MSK) >> CH_NUM_SFT; in mr75203_probe()
574 pvt->c_num = ch_num; in mr75203_probe()
641 total_ch = ch_num * vm_num; in mr75203_probe()
/drivers/bus/mhi/host/
Dpci_generic.c50 #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ argument
52 .num = ch_num, \
65 #define MHI_CHANNEL_CONFIG_DL(ch_num, ch_name, el_count, ev_ring) \ argument
67 .num = ch_num, \
80 #define MHI_CHANNEL_CONFIG_DL_AUTOQUEUE(ch_num, ch_name, el_count, ev_ring) \ argument
82 .num = ch_num, \
109 #define MHI_CHANNEL_CONFIG_HW_UL(ch_num, ch_name, el_count, ev_ring) \ argument
111 .num = ch_num, \
124 #define MHI_CHANNEL_CONFIG_HW_DL(ch_num, ch_name, el_count, ev_ring) \ argument
126 .num = ch_num, \
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/drivers/input/misc/
Diqs269a.c302 unsigned int ch_num; member
308 unsigned int ch_num, unsigned int mode) in iqs269_ati_mode_set() argument
312 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_mode_set()
320 engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a); in iqs269_ati_mode_set()
325 iqs269->ch_reg[ch_num].engine_a = cpu_to_be16(engine_a); in iqs269_ati_mode_set()
334 unsigned int ch_num, unsigned int *mode) in iqs269_ati_mode_get() argument
338 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_mode_get()
342 engine_a = be16_to_cpu(iqs269->ch_reg[ch_num].engine_a); in iqs269_ati_mode_get()
352 unsigned int ch_num, unsigned int base) in iqs269_ati_base_set() argument
356 if (ch_num >= IQS269_NUM_CH) in iqs269_ati_base_set()
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/drivers/most/
Dmost_snd.c414 static int split_arg_list(char *buf, u16 *ch_num, char **sample_res) in split_arg_list() argument
422 ret = kstrtou16(num, 0, ch_num); in split_arg_list()
447 u16 ch_num, char *sample_res, in audio_set_hw_params() argument
460 if (!ch_num) { in audio_set_hw_params()
465 if (cfg->subbuffer_size != ch_num * sinfo[i].bytes) { in audio_set_hw_params()
479 pcm_hw->channels_min = ch_num; in audio_set_hw_params()
480 pcm_hw->channels_max = ch_num; in audio_set_hw_params()
522 u16 ch_num; in audio_probe_channel() local
531 ret = split_arg_list(arg_list_cpy, &ch_num, &sample_res); in audio_probe_channel()
587 ret = audio_set_hw_params(&channel->pcm_hardware, ch_num, sample_res, in audio_probe_channel()
/drivers/rapidio/
Drio_cm.c224 static struct rio_channel *riocm_ch_alloc(u16 ch_num);
1281 static struct rio_channel *riocm_ch_alloc(u16 ch_num) in riocm_ch_alloc() argument
1291 if (ch_num) { in riocm_ch_alloc()
1293 start = ch_num; in riocm_ch_alloc()
1294 end = ch_num + 1; in riocm_ch_alloc()
1344 static struct rio_channel *riocm_ch_create(u16 *ch_num) in riocm_ch_create() argument
1348 ch = riocm_ch_alloc(*ch_num); in riocm_ch_create()
1352 *ch_num, PTR_ERR(ch)); in riocm_ch_create()
1354 *ch_num = ch->id; in riocm_ch_create()
1659 u16 ch_num; in cm_chan_create() local
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/drivers/dma/ti/
Dedma.c230 int ch_num; member
445 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_set_chmap()
456 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_setup_interrupt()
601 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_start()
628 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_stop()
654 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_pause()
664 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_resume()
674 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_trigger_channel()
687 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_clean_channel()
706 int channel = EDMA_CHAN_SLOT(echan->ch_num); in edma_assign_channel_eventq()
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/drivers/i2c/busses/
Di2c-eg20t.c162 int ch_num; member
629 for (i = 0, flag = 0; i < adap_info->ch_num; i++) { in pch_i2c_handler()
766 adap_info->ch_num = id->driver_data; in pch_i2c_probe()
768 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_probe()
794 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_probe()
833 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_remove()
841 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_remove()
859 for (i = 0; i < adap_info->ch_num; i++) { in pch_i2c_suspend()
867 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_suspend()
883 for (i = 0; i < adap_info->ch_num; i++) in pch_i2c_resume()
/drivers/dma/
Dmoxart-dma.c143 int ch_num; member
354 __func__, ch->ch_num); in moxart_alloc_chan_resources()
367 __func__, ch->ch_num); in moxart_free_chan_resources()
599 ch->ch_num = i; in moxart_probe()
607 __func__, i, ch->ch_num, ch->base); in moxart_probe()
/drivers/net/ethernet/ti/
Dcpsw_ethtool.c238 static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir) in cpsw_add_ch_strings() argument
244 ch_stats_len = CPSW_STATS_CH_LEN * ch_num; in cpsw_add_ch_strings()
534 static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx, in cpsw_update_channels_res() argument
553 while (*ch < ch_num) { in cpsw_update_channels_res()
570 while (*ch > ch_num) { in cpsw_update_channels_res()
/drivers/staging/rtl8723bs/include/
Drtw_cmd.h243 u8 ch_num; member
583 …dapter, struct ndis_802_11_ssid *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num);
/drivers/tty/serial/
Drp2.c252 static void rp2_mask_ch_irq(struct rp2_uart_port *up, int ch_num, in rp2_mask_ch_irq() argument
261 irq_mask &= ~BIT(ch_num); in rp2_mask_ch_irq()
263 irq_mask |= BIT(ch_num); in rp2_mask_ch_irq()
/drivers/staging/r8188eu/include/
Drtw_cmd.h205 u8 ch_num; member
754 int ch_num);
/drivers/staging/media/imx/
Dimx-media-csi.c232 int ch_num, ret; in csi_idmac_get_ipu_resources() local
236 ch_num = IPUV3_CHANNEL_CSI0 + priv->smfc_id; in csi_idmac_get_ipu_resources()
238 smfc = ipu_smfc_get(priv->ipu, ch_num); in csi_idmac_get_ipu_resources()
246 idmac_ch = ipu_idmac_get(priv->ipu, ch_num); in csi_idmac_get_ipu_resources()
249 ch_num); in csi_idmac_get_ipu_resources()
/drivers/net/wireless/intel/iwlwifi/
Diwl-nvm-parse.c294 static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, enum nl80211_band band, in iwl_get_channel_flags() argument
300 if (ch_num <= LAST_2GHZ_HT_PLUS) in iwl_get_channel_flags()
302 if (ch_num >= FIRST_2GHZ_HT_MINUS) in iwl_get_channel_flags()
/drivers/net/wireless/intel/iwlegacy/
D4965.c684 ch_i1 = il->calib_info->band_info[s].ch1.ch_num; in il4965_interpolate_chan()
685 ch_i2 = il->calib_info->band_info[s].ch2.ch_num; in il4965_interpolate_chan()
686 chan_info->ch_num = (u8) channel; in il4965_interpolate_chan()
/drivers/gpu/ipu-v3/
Dipu-cpmem.c607 static int ipu_channel_albm(int ch_num) in ipu_channel_albm() argument
609 switch (ch_num) { in ipu_channel_albm()

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