Searched refs:clk_pol (Results 1 – 15 of 15) sorted by relevance
/drivers/media/platform/sti/c8sectpfe/ |
D | c8sectpfe-dvb.c | 82 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 89 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 96 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
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/drivers/media/platform/omap3isp/ |
D | omap3isp.h | 45 unsigned int clk_pol:1; member
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D | isp.c | 443 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT; in omap3isp_configure_bridge() 2072 buscfg->bus.parallel.clk_pol = in isp_parse_of_parallel_endpoint()
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/drivers/media/dvb-frontends/ |
D | stv0367.h | 27 int clk_pol; member
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D | mxl692_defs.h | 471 u8 clk_pol; member
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D | lgs8gxx.c | 518 u8 serial, u8 clk_pol, u8 clk_gated) in lgs8gxx_set_mpeg_mode() argument 530 t |= clk_pol ? TS_CLK_INVERTED : TS_CLK_NORMAL; in lgs8gxx_set_mpeg_mode()
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D | stv0367.c | 986 stv0367ter_set_clk_pol(state, state->config->clk_pol); in stv0367ter_init() 2299 switch (state->config->clk_pol) { in stv0367cab_init()
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/drivers/video/fbdev/ |
D | mx3fb.c | 126 unsigned clk_pol:1; /* true = rising edge */ member 600 sig->clk_pol << DI_D3_CLK_POL_SHIFT | in sdc_init_panel() 832 sig_cfg.clk_pol = true; in __set_par()
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/drivers/gpu/drm/imx/ |
D | ipuv3-crtc.c | 300 sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags & in ipu_crtc_mode_set_nofb()
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/drivers/media/i2c/ |
D | mt9v032.c | 332 if (mt9v032->pdata && mt9v032->pdata->clk_pol) { in __mt9v032_set_power() 1039 pdata->clk_pol = !!(endpoint.bus.parallel.flags & in mt9v032_get_pdata()
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D | mt9t001.c | 302 if (pdata->clk_pol) { in mt9t001_s_stream()
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/drivers/media/pci/ngene/ |
D | ngene-cards.c | 368 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 375 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
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/drivers/gpu/ipu-v3/ |
D | ipu-di.c | 617 if (sig->clk_pol) in ipu_di_init_sync_panel()
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/drivers/media/pci/cx23885/ |
D | cx23885-dvb.c | 839 .clk_pol = 0, 846 .clk_pol = 0,
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/drivers/media/pci/ddbridge/ |
D | ddbridge-core.c | 938 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, 945 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
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