1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Driver for the MaxLinear MxL69x family of combo tuners/demods 4 * 5 * Copyright (C) 2020 Brad Love <brad@nextdimension.cc> 6 * 7 * based on code: 8 * Copyright (c) 2016 MaxLinear, Inc. All rights reserved 9 * which was released under GPL V2 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * version 2, as published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 /***************************************************************************** 22 * Defines 23 ***************************************************************************** 24 */ 25 #define MXL_EAGLE_HOST_MSG_HEADER_SIZE 8 26 #define MXL_EAGLE_FW_MAX_SIZE_IN_KB 76 27 #define MXL_EAGLE_QAM_FFE_TAPS_LENGTH 16 28 #define MXL_EAGLE_QAM_SPUR_TAPS_LENGTH 32 29 #define MXL_EAGLE_QAM_DFE_TAPS_LENGTH 72 30 #define MXL_EAGLE_ATSC_FFE_TAPS_LENGTH 4096 31 #define MXL_EAGLE_ATSC_DFE_TAPS_LENGTH 384 32 #define MXL_EAGLE_VERSION_SIZE 5 /* A.B.C.D-RCx */ 33 #define MXL_EAGLE_FW_LOAD_TIME 50 34 35 #define MXL_EAGLE_FW_MAX_SIZE_IN_KB 76 36 #define MXL_EAGLE_FW_HEADER_SIZE 16 37 #define MXL_EAGLE_FW_SEGMENT_HEADER_SIZE 8 38 #define MXL_EAGLE_MAX_I2C_PACKET_SIZE 58 39 #define MXL_EAGLE_I2C_MHEADER_SIZE 6 40 #define MXL_EAGLE_I2C_PHEADER_SIZE 2 41 42 /* Enum of Eagle family devices */ 43 enum MXL_EAGLE_DEVICE_E { 44 MXL_EAGLE_DEVICE_691 = 1, /* Device Mxl691 */ 45 MXL_EAGLE_DEVICE_248 = 2, /* Device Mxl248 */ 46 MXL_EAGLE_DEVICE_692 = 3, /* Device Mxl692 */ 47 MXL_EAGLE_DEVICE_MAX, /* No such device */ 48 }; 49 50 #define VER_A 1 51 #define VER_B 1 52 #define VER_C 1 53 #define VER_D 3 54 #define VER_E 6 55 56 /* Enum of Host to Eagle I2C protocol opcodes */ 57 enum MXL_EAGLE_OPCODE_E { 58 /* DEVICE */ 59 MXL_EAGLE_OPCODE_DEVICE_DEMODULATOR_TYPE_SET, 60 MXL_EAGLE_OPCODE_DEVICE_MPEG_OUT_PARAMS_SET, 61 MXL_EAGLE_OPCODE_DEVICE_POWERMODE_SET, 62 MXL_EAGLE_OPCODE_DEVICE_GPIO_DIRECTION_SET, 63 MXL_EAGLE_OPCODE_DEVICE_GPO_LEVEL_SET, 64 MXL_EAGLE_OPCODE_DEVICE_INTR_MASK_SET, 65 MXL_EAGLE_OPCODE_DEVICE_IO_MUX_SET, 66 MXL_EAGLE_OPCODE_DEVICE_VERSION_GET, 67 MXL_EAGLE_OPCODE_DEVICE_STATUS_GET, 68 MXL_EAGLE_OPCODE_DEVICE_GPI_LEVEL_GET, 69 70 /* TUNER */ 71 MXL_EAGLE_OPCODE_TUNER_CHANNEL_TUNE_SET, 72 MXL_EAGLE_OPCODE_TUNER_LOCK_STATUS_GET, 73 MXL_EAGLE_OPCODE_TUNER_AGC_STATUS_GET, 74 75 /* ATSC */ 76 MXL_EAGLE_OPCODE_ATSC_INIT_SET, 77 MXL_EAGLE_OPCODE_ATSC_ACQUIRE_CARRIER_SET, 78 MXL_EAGLE_OPCODE_ATSC_STATUS_GET, 79 MXL_EAGLE_OPCODE_ATSC_ERROR_COUNTERS_GET, 80 MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_DFE_TAPS_GET, 81 MXL_EAGLE_OPCODE_ATSC_EQUALIZER_FILTER_FFE_TAPS_GET, 82 83 /* QAM */ 84 MXL_EAGLE_OPCODE_QAM_PARAMS_SET, 85 MXL_EAGLE_OPCODE_QAM_RESTART_SET, 86 MXL_EAGLE_OPCODE_QAM_STATUS_GET, 87 MXL_EAGLE_OPCODE_QAM_ERROR_COUNTERS_GET, 88 MXL_EAGLE_OPCODE_QAM_CONSTELLATION_VALUE_GET, 89 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_FFE_GET, 90 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_START_GET, 91 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_SPUR_END_GET, 92 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_TAPS_NUMBER_GET, 93 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_START_GET, 94 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET, 95 MXL_EAGLE_OPCODE_QAM_EQUALIZER_FILTER_DFE_END_GET, 96 97 /* OOB */ 98 MXL_EAGLE_OPCODE_OOB_PARAMS_SET, 99 MXL_EAGLE_OPCODE_OOB_RESTART_SET, 100 MXL_EAGLE_OPCODE_OOB_ERROR_COUNTERS_GET, 101 MXL_EAGLE_OPCODE_OOB_STATUS_GET, 102 103 /* SMA */ 104 MXL_EAGLE_OPCODE_SMA_INIT_SET, 105 MXL_EAGLE_OPCODE_SMA_PARAMS_SET, 106 MXL_EAGLE_OPCODE_SMA_TRANSMIT_SET, 107 MXL_EAGLE_OPCODE_SMA_RECEIVE_GET, 108 109 /* DEBUG */ 110 MXL_EAGLE_OPCODE_INTERNAL, 111 112 MXL_EAGLE_OPCODE_MAX = 70, 113 }; 114 115 /* Enum of Host to Eagle I2C protocol opcodes */ 116 static const char * const MXL_EAGLE_OPCODE_STRING[] = { 117 /* DEVICE */ 118 "DEVICE_DEMODULATOR_TYPE_SET", 119 "DEVICE_MPEG_OUT_PARAMS_SET", 120 "DEVICE_POWERMODE_SET", 121 "DEVICE_GPIO_DIRECTION_SET", 122 "DEVICE_GPO_LEVEL_SET", 123 "DEVICE_INTR_MASK_SET", 124 "DEVICE_IO_MUX_SET", 125 "DEVICE_VERSION_GET", 126 "DEVICE_STATUS_GET", 127 "DEVICE_GPI_LEVEL_GET", 128 129 /* TUNER */ 130 "TUNER_CHANNEL_TUNE_SET", 131 "TUNER_LOCK_STATUS_GET", 132 "TUNER_AGC_STATUS_GET", 133 134 /* ATSC */ 135 "ATSC_INIT_SET", 136 "ATSC_ACQUIRE_CARRIER_SET", 137 "ATSC_STATUS_GET", 138 "ATSC_ERROR_COUNTERS_GET", 139 "ATSC_EQUALIZER_FILTER_DFE_TAPS_GET", 140 "ATSC_EQUALIZER_FILTER_FFE_TAPS_GET", 141 142 /* QAM */ 143 "QAM_PARAMS_SET", 144 "QAM_RESTART_SET", 145 "QAM_STATUS_GET", 146 "QAM_ERROR_COUNTERS_GET", 147 "QAM_CONSTELLATION_VALUE_GET", 148 "QAM_EQUALIZER_FILTER_FFE_GET", 149 "QAM_EQUALIZER_FILTER_SPUR_START_GET", 150 "QAM_EQUALIZER_FILTER_SPUR_END_GET", 151 "QAM_EQUALIZER_FILTER_DFE_TAPS_NUMBER_GET", 152 "QAM_EQUALIZER_FILTER_DFE_START_GET", 153 "QAM_EQUALIZER_FILTER_DFE_MIDDLE_GET", 154 "QAM_EQUALIZER_FILTER_DFE_END_GET", 155 156 /* OOB */ 157 "OOB_PARAMS_SET", 158 "OOB_RESTART_SET", 159 "OOB_ERROR_COUNTERS_GET", 160 "OOB_STATUS_GET", 161 162 /* SMA */ 163 "SMA_INIT_SET", 164 "SMA_PARAMS_SET", 165 "SMA_TRANSMIT_SET", 166 "SMA_RECEIVE_GET", 167 168 /* DEBUG */ 169 "INTERNAL", 170 }; 171 172 /* Enum of Callabck function types */ 173 enum MXL_EAGLE_CB_TYPE_E { 174 MXL_EAGLE_CB_FW_DOWNLOAD = 0, 175 }; 176 177 /* Enum of power supply types */ 178 enum MXL_EAGLE_POWER_SUPPLY_SOURCE_E { 179 MXL_EAGLE_POWER_SUPPLY_SOURCE_SINGLE, /* Single supply of 3.3V */ 180 MXL_EAGLE_POWER_SUPPLY_SOURCE_DUAL, /* Dual supply, 1.8V & 3.3V */ 181 }; 182 183 /* Enum of I/O pad drive modes */ 184 enum MXL_EAGLE_IO_MUX_DRIVE_MODE_E { 185 MXL_EAGLE_IO_MUX_DRIVE_MODE_1X, 186 MXL_EAGLE_IO_MUX_DRIVE_MODE_2X, 187 MXL_EAGLE_IO_MUX_DRIVE_MODE_3X, 188 MXL_EAGLE_IO_MUX_DRIVE_MODE_4X, 189 MXL_EAGLE_IO_MUX_DRIVE_MODE_5X, 190 MXL_EAGLE_IO_MUX_DRIVE_MODE_6X, 191 MXL_EAGLE_IO_MUX_DRIVE_MODE_7X, 192 MXL_EAGLE_IO_MUX_DRIVE_MODE_8X, 193 }; 194 195 /* Enum of demodulator types. Used for selection of demodulator 196 * type in relevant devices, e.g. ATSC vs. QAM in Mxl691 197 */ 198 enum MXL_EAGLE_DEMOD_TYPE_E { 199 MXL_EAGLE_DEMOD_TYPE_QAM, /* Mxl248 or Mxl692 */ 200 MXL_EAGLE_DEMOD_TYPE_OOB, /* Mxl248 only */ 201 MXL_EAGLE_DEMOD_TYPE_ATSC /* Mxl691 or Mxl692 */ 202 }; 203 204 /* Enum of power modes. Used for initial 205 * activation, or for activating sleep mode 206 */ 207 enum MXL_EAGLE_POWER_MODE_E { 208 MXL_EAGLE_POWER_MODE_SLEEP, 209 MXL_EAGLE_POWER_MODE_ACTIVE 210 }; 211 212 /* Enum of GPIOs, used in device GPIO APIs */ 213 enum MXL_EAGLE_GPIO_NUMBER_E { 214 MXL_EAGLE_GPIO_NUMBER_0, 215 MXL_EAGLE_GPIO_NUMBER_1, 216 MXL_EAGLE_GPIO_NUMBER_2, 217 MXL_EAGLE_GPIO_NUMBER_3, 218 MXL_EAGLE_GPIO_NUMBER_4, 219 MXL_EAGLE_GPIO_NUMBER_5, 220 MXL_EAGLE_GPIO_NUMBER_6 221 }; 222 223 /* Enum of GPIO directions, used in GPIO direction configuration API */ 224 enum MXL_EAGLE_GPIO_DIRECTION_E { 225 MXL_EAGLE_GPIO_DIRECTION_INPUT, 226 MXL_EAGLE_GPIO_DIRECTION_OUTPUT 227 }; 228 229 /* Enum of GPIO level, used in device GPIO APIs */ 230 enum MXL_EAGLE_GPIO_LEVEL_E { 231 MXL_EAGLE_GPIO_LEVEL_LOW, 232 MXL_EAGLE_GPIO_LEVEL_HIGH, 233 }; 234 235 /* Enum of I/O Mux function, used in device I/O mux configuration API */ 236 enum MXL_EAGLE_IOMUX_FUNCTION_E { 237 MXL_EAGLE_IOMUX_FUNC_FEC_LOCK, 238 MXL_EAGLE_IOMUX_FUNC_MERR, 239 }; 240 241 /* Enum of MPEG Data format, used in MPEG and OOB output configuration */ 242 enum MXL_EAGLE_MPEG_DATA_FORMAT_E { 243 MXL_EAGLE_DATA_SERIAL_LSB_1ST = 0, 244 MXL_EAGLE_DATA_SERIAL_MSB_1ST, 245 246 MXL_EAGLE_DATA_SYNC_WIDTH_BIT = 0, 247 MXL_EAGLE_DATA_SYNC_WIDTH_BYTE 248 }; 249 250 /* Enum of MPEG Clock format, used in MPEG and OOB output configuration */ 251 enum MXL_EAGLE_MPEG_CLOCK_FORMAT_E { 252 MXL_EAGLE_CLOCK_ACTIVE_HIGH = 0, 253 MXL_EAGLE_CLOCK_ACTIVE_LOW, 254 255 MXL_EAGLE_CLOCK_POSITIVE = 0, 256 MXL_EAGLE_CLOCK_NEGATIVE, 257 258 MXL_EAGLE_CLOCK_IN_PHASE = 0, 259 MXL_EAGLE_CLOCK_INVERTED, 260 }; 261 262 /* Enum of MPEG Clock speeds, used in MPEG output configuration */ 263 enum MXL_EAGLE_MPEG_CLOCK_RATE_E { 264 MXL_EAGLE_MPEG_CLOCK_54MHZ, 265 MXL_EAGLE_MPEG_CLOCK_40_5MHZ, 266 MXL_EAGLE_MPEG_CLOCK_27MHZ, 267 MXL_EAGLE_MPEG_CLOCK_13_5MHZ, 268 }; 269 270 /* Enum of Interrupt mask bit, used in host interrupt configuration */ 271 enum MXL_EAGLE_INTR_MASK_BITS_E { 272 MXL_EAGLE_INTR_MASK_DEMOD = 0, 273 MXL_EAGLE_INTR_MASK_SMA_RX = 1, 274 MXL_EAGLE_INTR_MASK_WDOG = 31 275 }; 276 277 /* Enum of QAM Demodulator type, used in QAM configuration */ 278 enum MXL_EAGLE_QAM_DEMOD_ANNEX_TYPE_E { 279 MXL_EAGLE_QAM_DEMOD_ANNEX_B, /* J.83B */ 280 MXL_EAGLE_QAM_DEMOD_ANNEX_A, /* DVB-C */ 281 }; 282 283 /* Enum of QAM Demodulator modulation, used in QAM configuration and status */ 284 enum MXL_EAGLE_QAM_DEMOD_QAM_TYPE_E { 285 MXL_EAGLE_QAM_DEMOD_QAM16, 286 MXL_EAGLE_QAM_DEMOD_QAM64, 287 MXL_EAGLE_QAM_DEMOD_QAM256, 288 MXL_EAGLE_QAM_DEMOD_QAM1024, 289 MXL_EAGLE_QAM_DEMOD_QAM32, 290 MXL_EAGLE_QAM_DEMOD_QAM128, 291 MXL_EAGLE_QAM_DEMOD_QPSK, 292 MXL_EAGLE_QAM_DEMOD_AUTO, 293 }; 294 295 /* Enum of Demodulator IQ setup, used in QAM, OOB configuration and status */ 296 enum MXL_EAGLE_IQ_FLIP_E { 297 MXL_EAGLE_DEMOD_IQ_NORMAL, 298 MXL_EAGLE_DEMOD_IQ_FLIPPED, 299 MXL_EAGLE_DEMOD_IQ_AUTO, 300 }; 301 302 /* Enum of OOB Demodulator symbol rates, used in OOB configuration */ 303 enum MXL_EAGLE_OOB_DEMOD_SYMB_RATE_E { 304 MXL_EAGLE_OOB_DEMOD_SYMB_RATE_0_772MHZ, /* ANSI/SCTE 55-2 0.772 MHz */ 305 MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_024MHZ, /* ANSI/SCTE 55-1 1.024 MHz */ 306 MXL_EAGLE_OOB_DEMOD_SYMB_RATE_1_544MHZ, /* ANSI/SCTE 55-2 1.544 MHz */ 307 }; 308 309 /* Enum of tuner channel tuning mode */ 310 enum MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_E { 311 MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_VIEW, /* Normal "view" mode */ 312 MXL_EAGLE_TUNER_CHANNEL_TUNE_MODE_SCAN, /* Fast "scan" mode */ 313 }; 314 315 /* Enum of tuner bandwidth */ 316 enum MXL_EAGLE_TUNER_BW_E { 317 MXL_EAGLE_TUNER_BW_6MHZ, 318 MXL_EAGLE_TUNER_BW_7MHZ, 319 MXL_EAGLE_TUNER_BW_8MHZ, 320 }; 321 322 /* Enum of tuner bandwidth */ 323 enum MXL_EAGLE_JUNCTION_TEMPERATURE_E { 324 MXL_EAGLE_JUNCTION_TEMPERATURE_BELOW_0_CELSIUS = 0, 325 MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_0_TO_14_CELSIUS = 1, 326 MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_14_TO_28_CELSIUS = 3, 327 MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_28_TO_42_CELSIUS = 2, 328 MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_42_TO_57_CELSIUS = 6, 329 MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_57_TO_71_CELSIUS = 7, 330 MXL_EAGLE_JUNCTION_TEMPERATURE_BETWEEN_71_TO_85_CELSIUS = 5, 331 MXL_EAGLE_JUNCTION_TEMPERATURE_ABOVE_85_CELSIUS = 4, 332 }; 333 334 /* Struct passed in optional callback used during FW download */ 335 struct MXL_EAGLE_FW_DOWNLOAD_CB_PAYLOAD_T { 336 u32 total_len; 337 u32 downloaded_len; 338 }; 339 340 /* Struct used of I2C protocol between host and Eagle, internal use only */ 341 struct __packed MXL_EAGLE_HOST_MSG_HEADER_T { 342 u8 opcode; 343 u8 seqnum; 344 u8 payload_size; 345 u8 status; 346 u32 checksum; 347 }; 348 349 /* Device version information struct */ 350 struct __packed MXL_EAGLE_DEV_VER_T { 351 u8 chip_id; 352 u8 firmware_ver[MXL_EAGLE_VERSION_SIZE]; 353 u8 mxlware_ver[MXL_EAGLE_VERSION_SIZE]; 354 }; 355 356 /* Xtal configuration struct */ 357 struct __packed MXL_EAGLE_DEV_XTAL_T { 358 u8 xtal_cap; /* accepted range is 1..31 pF. Default is 26 */ 359 u8 clk_out_enable; 360 u8 clk_out_div_enable; /* clock out freq is xtal freq / 6 */ 361 u8 xtal_sharing_enable; /* if enabled set xtal_cap to 25 pF */ 362 u8 xtal_calibration_enable; /* enable for master, disable for slave */ 363 }; 364 365 /* GPIO direction struct, internally used in GPIO configuration API */ 366 struct __packed MXL_EAGLE_DEV_GPIO_DIRECTION_T { 367 u8 gpio_number; 368 u8 gpio_direction; 369 }; 370 371 /* GPO level struct, internally used in GPIO configuration API */ 372 struct __packed MXL_EAGLE_DEV_GPO_LEVEL_T { 373 u8 gpio_number; 374 u8 gpo_level; 375 }; 376 377 /* Device Status struct */ 378 struct MXL_EAGLE_DEV_STATUS_T { 379 u8 temperature; 380 u8 demod_type; 381 u8 power_mode; 382 u8 cpu_utilization_percent; 383 }; 384 385 /* Device interrupt configuration struct */ 386 struct __packed MXL_EAGLE_DEV_INTR_CFG_T { 387 u32 intr_mask; 388 u8 edge_trigger; 389 u8 positive_trigger; 390 u8 global_enable_interrupt; 391 }; 392 393 /* MPEG pad drive parameters, used on MPEG output configuration */ 394 /* See MXL_EAGLE_IO_MUX_DRIVE_MODE_E */ 395 struct MXL_EAGLE_MPEG_PAD_DRIVE_T { 396 u8 pad_drv_mpeg_syn; 397 u8 pad_drv_mpeg_dat; 398 u8 pad_drv_mpeg_val; 399 u8 pad_drv_mpeg_clk; 400 }; 401 402 /* MPEGOUT parameter struct, used in MPEG output configuration */ 403 struct MXL_EAGLE_MPEGOUT_PARAMS_T { 404 u8 mpeg_parallel; 405 u8 msb_first; 406 u8 mpeg_sync_pulse_width; /* See MXL_EAGLE_MPEG_DATA_FORMAT_E */ 407 u8 mpeg_valid_pol; 408 u8 mpeg_sync_pol; 409 u8 mpeg_clk_pol; 410 u8 mpeg3wire_mode_enable; 411 u8 mpeg_clk_freq; 412 struct MXL_EAGLE_MPEG_PAD_DRIVE_T mpeg_pad_drv; 413 }; 414 415 /* QAM Demodulator parameters struct, used in QAM params configuration */ 416 struct __packed MXL_EAGLE_QAM_DEMOD_PARAMS_T { 417 u8 annex_type; 418 u8 qam_type; 419 u8 iq_flip; 420 u8 search_range_idx; 421 u8 spur_canceller_enable; 422 u32 symbol_rate_hz; 423 u32 symbol_rate_256qam_hz; 424 }; 425 426 /* QAM Demodulator status */ 427 struct MXL_EAGLE_QAM_DEMOD_STATUS_T { 428 u8 annex_type; 429 u8 qam_type; 430 u8 iq_flip; 431 u8 interleaver_depth_i; 432 u8 interleaver_depth_j; 433 u8 qam_locked; 434 u8 fec_locked; 435 u8 mpeg_locked; 436 u16 snr_db_tenths; 437 s16 timing_offset; 438 s32 carrier_offset_hz; 439 }; 440 441 /* QAM Demodulator error counters */ 442 struct MXL_EAGLE_QAM_DEMOD_ERROR_COUNTERS_T { 443 u32 corrected_code_words; 444 u32 uncorrected_code_words; 445 u32 total_code_words_received; 446 u32 corrected_bits; 447 u32 error_mpeg_frames; 448 u32 mpeg_frames_received; 449 u32 erasures; 450 }; 451 452 /* QAM Demodulator constellation point */ 453 struct MXL_EAGLE_QAM_DEMOD_CONSTELLATION_VAL_T { 454 s16 i_value[12]; 455 s16 q_value[12]; 456 }; 457 458 /* QAM Demodulator equalizer filter taps */ 459 struct MXL_EAGLE_QAM_DEMOD_EQU_FILTER_T { 460 s16 ffe_taps[MXL_EAGLE_QAM_FFE_TAPS_LENGTH]; 461 s16 spur_taps[MXL_EAGLE_QAM_SPUR_TAPS_LENGTH]; 462 s16 dfe_taps[MXL_EAGLE_QAM_DFE_TAPS_LENGTH]; 463 u8 ffe_leading_tap_index; 464 u8 dfe_taps_number; 465 }; 466 467 /* OOB Demodulator parameters struct, used in OOB params configuration */ 468 struct __packed MXL_EAGLE_OOB_DEMOD_PARAMS_T { 469 u8 symbol_rate; 470 u8 iq_flip; 471 u8 clk_pol; 472 }; 473 474 /* OOB Demodulator error counters */ 475 struct MXL_EAGLE_OOB_DEMOD_ERROR_COUNTERS_T { 476 u32 corrected_packets; 477 u32 uncorrected_packets; 478 u32 total_packets_received; 479 }; 480 481 /* OOB status */ 482 struct __packed MXL_EAGLE_OOB_DEMOD_STATUS_T { 483 u16 snr_db_tenths; 484 s16 timing_offset; 485 s32 carrier_offsetHz; 486 u8 qam_locked; 487 u8 fec_locked; 488 u8 mpeg_locked; 489 u8 retune_required; 490 u8 iq_flip; 491 }; 492 493 /* ATSC Demodulator status */ 494 struct __packed MXL_EAGLE_ATSC_DEMOD_STATUS_T { 495 s16 snr_db_tenths; 496 s16 timing_offset; 497 s32 carrier_offset_hz; 498 u8 frame_lock; 499 u8 atsc_lock; 500 u8 fec_lock; 501 }; 502 503 /* ATSC Demodulator error counters */ 504 struct MXL_EAGLE_ATSC_DEMOD_ERROR_COUNTERS_T { 505 u32 error_packets; 506 u32 total_packets; 507 u32 error_bytes; 508 }; 509 510 /* ATSC Demodulator equalizers filter taps */ 511 struct __packed MXL_EAGLE_ATSC_DEMOD_EQU_FILTER_T { 512 s16 ffe_taps[MXL_EAGLE_ATSC_FFE_TAPS_LENGTH]; 513 s8 dfe_taps[MXL_EAGLE_ATSC_DFE_TAPS_LENGTH]; 514 }; 515 516 /* Tuner AGC Status */ 517 struct __packed MXL_EAGLE_TUNER_AGC_STATUS_T { 518 u8 locked; 519 u16 raw_agc_gain; /* AGC gain [dB] = rawAgcGain / 2^6 */ 520 s16 rx_power_db_hundredths; 521 }; 522 523 /* Tuner channel tune parameters */ 524 struct __packed MXL_EAGLE_TUNER_CHANNEL_PARAMS_T { 525 u32 freq_hz; 526 u8 tune_mode; 527 u8 bandwidth; 528 }; 529 530 /* Tuner channel lock indications */ 531 struct __packed MXL_EAGLE_TUNER_LOCK_STATUS_T { 532 u8 rf_pll_locked; 533 u8 ref_pll_locked; 534 }; 535 536 /* Smart antenna parameters used in Smart antenna params configuration */ 537 struct __packed MXL_EAGLE_SMA_PARAMS_T { 538 u8 full_duplex_enable; 539 u8 rx_disable; 540 u8 idle_logic_high; 541 }; 542 543 /* Smart antenna message format */ 544 struct __packed MXL_EAGLE_SMA_MESSAGE_T { 545 u32 payload_bits; 546 u8 total_num_bits; 547 }; 548 549