Home
last modified time | relevance | path

Searched refs:data1 (Results 1 – 25 of 121) sorted by relevance

12345

/drivers/input/touchscreen/
Ds3c2410_ts.c117 static inline bool get_down(unsigned long data0, unsigned long data1) in get_down() argument
121 !(data1 & S3C2410_ADCDAT0_UPDOWN)); in get_down()
127 unsigned long data1; in touch_timer_fire() local
131 data1 = readl(ts.io + S3C2410_ADCDAT1); in touch_timer_fire()
133 down = get_down(data0, data1); in touch_timer_fire()
179 unsigned long data1; in stylus_irq() local
183 data1 = readl(ts.io + S3C2410_ADCDAT1); in stylus_irq()
185 down = get_down(data0, data1); in stylus_irq()
214 unsigned data0, unsigned data1, in s3c24xx_ts_conversion() argument
217 dev_dbg(ts.dev, "%s: %d,%d\n", __func__, data0, data1); in s3c24xx_ts_conversion()
[all …]
/drivers/gpu/drm/amd/amdgpu/
Dmmhub_v2_3.c491 uint32_t def, data, def1, data1; in mmhub_v2_3_update_medium_grain_clock_gating() local
494 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_3_update_medium_grain_clock_gating()
498 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_3_update_medium_grain_clock_gating()
507 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_3_update_medium_grain_clock_gating()
517 if (def1 != data1) in mmhub_v2_3_update_medium_grain_clock_gating()
518 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v2_3_update_medium_grain_clock_gating()
525 uint32_t def, data, def1, data1, def2, data2; in mmhub_v2_3_update_medium_grain_light_sleep() local
528 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_WR_CGTT_CLK_CTRL); in mmhub_v2_3_update_medium_grain_light_sleep()
533 data1 &= ~(DAGB0_WR_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_update_medium_grain_light_sleep()
545 data1 |= (DAGB0_WR_CGTT_CLK_CTRL__LS_OVERRIDE_MASK | in mmhub_v2_3_update_medium_grain_light_sleep()
[all …]
Dmmhub_v2_0.c568 uint32_t def, data, def1, data1; in mmhub_v2_0_update_medium_grain_clock_gating() local
579 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_update_medium_grain_clock_gating()
583 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_update_medium_grain_clock_gating()
590 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
600 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
615 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
616 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
621 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
622 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
695 int data, data1; in mmhub_v2_0_get_clockgating() local
[all …]
Dmmhub_v1_0.c450 uint32_t def, data, def1, data1, def2 = 0, data2 = 0; in mmhub_v1_0_update_medium_grain_clock_gating() local
455 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v1_0_update_medium_grain_clock_gating()
458 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV); in mmhub_v1_0_update_medium_grain_clock_gating()
463 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v1_0_update_medium_grain_clock_gating()
480 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v1_0_update_medium_grain_clock_gating()
499 if (def1 != data1) { in mmhub_v1_0_update_medium_grain_clock_gating()
501 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v1_0_update_medium_grain_clock_gating()
503 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_RV, data1); in mmhub_v1_0_update_medium_grain_clock_gating()
552 int data, data1; in mmhub_v1_0_get_clockgating() local
559 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v1_0_get_clockgating()
[all …]
Damdgpu_vf_error.c54 u32 data1, data2, data3; in amdgpu_vf_error_trans_all() local
77 data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index], in amdgpu_vf_error_trans_all()
82 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3); in amdgpu_vf_error_trans_all()
Duvd_v5_0.c631 uint32_t data1, data3, suvd_flags; in uvd_v5_0_enable_clock_gating() local
633 data1 = RREG32(mmUVD_SUVD_CGC_GATE); in uvd_v5_0_enable_clock_gating()
665 data1 |= suvd_flags; in uvd_v5_0_enable_clock_gating()
668 data1 = 0; in uvd_v5_0_enable_clock_gating()
671 WREG32(mmUVD_SUVD_CGC_GATE, data1); in uvd_v5_0_enable_clock_gating()
725 uint32_t data, data1, cgc_flags, suvd_flags;
728 data1 = RREG32(mmUVD_SUVD_CGC_GATE);
756 data1 |= suvd_flags;
759 WREG32(mmUVD_SUVD_CGC_GATE, data1);
Duvd_v6_0.c647 u32 data, data1;
650 data1 = RREG32(mmUVD_SUVD_CGC_GATE);
670 data1 |= UVD_SUVD_CGC_GATE__SRE_MASK |
703 data1 &= ~(UVD_SUVD_CGC_GATE__SRE_MASK |
718 WREG32(mmUVD_SUVD_CGC_GATE, data1);
1288 uint32_t data1, data3; in uvd_v6_0_enable_clock_gating() local
1290 data1 = RREG32(mmUVD_SUVD_CGC_GATE); in uvd_v6_0_enable_clock_gating()
1293 data1 |= UVD_SUVD_CGC_GATE__SRE_MASK | in uvd_v6_0_enable_clock_gating()
1337 WREG32(mmUVD_SUVD_CGC_GATE, data1); in uvd_v6_0_enable_clock_gating()
1392 uint32_t data, data1, cgc_flags, suvd_flags;
[all …]
/drivers/input/rmi4/
Drmi_f12.c40 const struct rmi_register_desc_item *data1; member
144 static void rmi_f12_process_objects(struct f12_data *f12, u8 *data1, int size) in rmi_f12_process_objects() argument
148 int objects = f12->data1->num_subpackets; in rmi_f12_process_objects()
150 if ((f12->data1->num_subpackets * F12_DATA1_BYTES_PER_OBJ) > size) in rmi_f12_process_objects()
159 switch (data1[0]) { in rmi_f12_process_objects()
176 obj->x = (data1[2] << 8) | data1[1]; in rmi_f12_process_objects()
177 obj->y = (data1[4] << 8) | data1[3]; in rmi_f12_process_objects()
178 obj->z = data1[5]; in rmi_f12_process_objects()
179 obj->wx = data1[6]; in rmi_f12_process_objects()
180 obj->wy = data1[7]; in rmi_f12_process_objects()
[all …]
/drivers/net/wireless/intel/iwlwifi/fw/
Ddump.c30 u32 data1; /* error-specific data */ member
77 u32 data1; /* error-specific data */ member
131 u32 data1; /* error-specific data */ member
173 IWL_ERR(fwrt, "0x%08X | umac data1\n", table.data1); in iwl_fwrt_dump_umac_error_log()
244 IWL_ERR(fwrt, "0x%08X | data1\n", table.data1); in iwl_fwrt_dump_lmac_error_log()
287 u32 data1, data2, data3; member
317 IWL_ERR(fwrt, "0x%08X | tcm data1\n", table.data1); in iwl_fwrt_dump_tcm_error_log()
336 u32 error, data1; in iwl_fwrt_dump_iml_error_log() local
340 data1 = UMAG_SB_CPU_1_STATUS; in iwl_fwrt_dump_iml_error_log()
344 data1 = SB_CPU_1_STATUS; in iwl_fwrt_dump_iml_error_log()
[all …]
/drivers/media/test-drivers/vivid/
Dvivid-vbi-gen.c250 struct v4l2_sliced_vbi_data *data1 = vbi->data + 1; in vivid_vbi_gen_sliced() local
281 data1->id = V4L2_SLICED_CAPTION_525; in vivid_vbi_gen_sliced()
282 data1->field = 1; in vivid_vbi_gen_sliced()
283 data1->line = 21; in vivid_vbi_gen_sliced()
303 data1->data[0] = vbi->time_of_day_packet[frame * 2]; in vivid_vbi_gen_sliced()
304 data1->data[1] = vbi->time_of_day_packet[frame * 2 + 1]; in vivid_vbi_gen_sliced()
307 data1->data[0] = calc_parity(0); in vivid_vbi_gen_sliced()
308 data1->data[1] = calc_parity(0); in vivid_vbi_gen_sliced()
/drivers/media/usb/gspca/
Dspca508.c1352 int data1, data2; in sd_config() local
1358 data1 = reg_read(gspca_dev, 0x8104); in sd_config()
1361 data2, data1); in sd_config()
1363 data1 = reg_read(gspca_dev, 0x8106); in sd_config()
1366 data2, data1); in sd_config()
1368 data1 = reg_read(gspca_dev, 0x8621); in sd_config()
1370 data1); in sd_config()
Dpac7311.c616 u8 data0, data1; in sd_int_pkt_scan() local
620 data1 = data[1]; in sd_int_pkt_scan()
621 if ((data0 == 0x00 && data1 == 0x11) || in sd_int_pkt_scan()
622 (data0 == 0x22 && data1 == 0x33) || in sd_int_pkt_scan()
623 (data0 == 0x44 && data1 == 0x55) || in sd_int_pkt_scan()
624 (data0 == 0x66 && data1 == 0x77) || in sd_int_pkt_scan()
625 (data0 == 0x88 && data1 == 0x99) || in sd_int_pkt_scan()
626 (data0 == 0xaa && data1 == 0xbb) || in sd_int_pkt_scan()
627 (data0 == 0xcc && data1 == 0xdd) || in sd_int_pkt_scan()
628 (data0 == 0xee && data1 == 0xff)) { in sd_int_pkt_scan()
Dpac7302.c866 u8 data0, data1; in sd_int_pkt_scan() local
870 data1 = data[1]; in sd_int_pkt_scan()
871 if ((data0 == 0x00 && data1 == 0x11) || in sd_int_pkt_scan()
872 (data0 == 0x22 && data1 == 0x33) || in sd_int_pkt_scan()
873 (data0 == 0x44 && data1 == 0x55) || in sd_int_pkt_scan()
874 (data0 == 0x66 && data1 == 0x77) || in sd_int_pkt_scan()
875 (data0 == 0x88 && data1 == 0x99) || in sd_int_pkt_scan()
876 (data0 == 0xaa && data1 == 0xbb) || in sd_int_pkt_scan()
877 (data0 == 0xcc && data1 == 0xdd) || in sd_int_pkt_scan()
878 (data0 == 0xee && data1 == 0xff)) { in sd_int_pkt_scan()
Dt613.c86 const u8 data1[10]; member
144 .data1 =
166 .data1 =
188 .data1 =
209 .data1 = {0xc0, 0x38, 0x08, 0x10, 0xc0, 0x30, 0x10, 0x40,
642 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1); in sd_init()
664 reg_w_ixbuf(gspca_dev, 0xd0, sensor->data1, sizeof sensor->data1); in sd_init()
/drivers/input/joystick/
Dturbografx.c80 int data1, data2, i; in tgfx_timer() local
88 data1 = parport_read_status(tgfx->pd->port) ^ 0x7f; in tgfx_timer()
91 input_report_abs(dev, ABS_X, !!(data1 & TGFX_RIGHT) - !!(data1 & TGFX_LEFT)); in tgfx_timer()
92 input_report_abs(dev, ABS_Y, !!(data1 & TGFX_DOWN ) - !!(data1 & TGFX_UP )); in tgfx_timer()
94 input_report_key(dev, BTN_TRIGGER, (data1 & TGFX_TRIGGER)); in tgfx_timer()
/drivers/net/ethernet/neterion/vxge/
Dvxge-config.c158 u32 fw_memo, u32 offset, u64 *data0, u64 *data1, in vxge_hw_vpath_fw_api() argument
173 writeq(*data1, &vp_reg->rts_access_steer_data1); in vxge_hw_vpath_fw_api()
210 *data1 = readq(&vp_reg->rts_access_steer_data1); in vxge_hw_vpath_fw_api()
225 u64 data0 = 0, data1 = 0, steer_ctrl = 0; in vxge_hw_upgrade_read_version() local
235 &data0, &data1, &steer_ctrl); in vxge_hw_upgrade_read_version()
248 u64 data0 = 0, data1 = 0, steer_ctrl = 0; in vxge_hw_flash_fw() local
259 &data0, &data1, &steer_ctrl); in vxge_hw_flash_fw()
279 u64 data0 = 0, data1 = 0, steer_ctrl = 0; in vxge_update_fw_image() local
291 &data0, &data1, &steer_ctrl); in vxge_update_fw_image()
304 data1 = *((u64 *)fwdata + 1); in vxge_update_fw_image()
[all …]
Dvxge-traffic.c1709 u64 data1 = 0ULL; in vxge_hw_vpath_mac_addr_add() local
1719 data1 <<= 8; in vxge_hw_vpath_mac_addr_add()
1720 data1 |= (u8)macaddr[i]; in vxge_hw_vpath_mac_addr_add()
1745 VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR(data1), in vxge_hw_vpath_mac_addr_add()
1771 u64 data1 = 0ULL; in vxge_hw_vpath_mac_addr_get() local
1783 0, &data1, &data2); in vxge_hw_vpath_mac_addr_get()
1788 data1 = VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DA_MAC_ADDR(data1); in vxge_hw_vpath_mac_addr_get()
1793 macaddr[i-1] = (u8)(data1 & 0xFF); in vxge_hw_vpath_mac_addr_get()
1794 data1 >>= 8; in vxge_hw_vpath_mac_addr_get()
1822 u64 data1 = 0ULL; in vxge_hw_vpath_mac_addr_get_next() local
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgt215.c31 u32 process, u32 message, u32 data0, u32 data1) in gt215_pmu_send() argument
69 nvkm_wr32(device, 0x10a1c4, data1); in gt215_pmu_send()
91 u32 process, message, data0, data1; in gt215_pmu_recv() local
109 data1 = nvkm_rd32(device, 0x10a1c4); in gt215_pmu_recv()
120 pmu->recv.data[1] = data1; in gt215_pmu_recv()
135 process, message, data0, data1); in gt215_pmu_recv()
/drivers/hwmon/occ/
Dp8_i2c.c89 u32 data0, u32 data1) in p8_i2c_occ_putscom_u32() argument
94 memcpy(buf + 4, &data1, 4); in p8_i2c_occ_putscom_u32()
102 __be32 data0 = 0, data1 = 0; in p8_i2c_occ_putscom_be() local
107 memcpy(&data1, data + 4, min_t(size_t, len, 4)); in p8_i2c_occ_putscom_be()
111 be32_to_cpu(data1)); in p8_i2c_occ_putscom_be()
/drivers/hid/
Dhid-roccat-kovaplus.c312 roccat_report.data1 = profile + 1; in kovaplus_sysfs_set_actual_profile()
551 kovaplus_profile_activated(kovaplus, button_report->data1 - 1); in kovaplus_keep_values_up_to_date()
554 kovaplus->actual_cpi = kovaplus_convert_event_cpi(button_report->data1); in kovaplus_keep_values_up_to_date()
557 kovaplus->actual_x_sensitivity = button_report->data1; in kovaplus_keep_values_up_to_date()
586 roccat_report.button = button_report->data1; in kovaplus_report_to_chrdev()
591 roccat_report.data1 = kovaplus_convert_event_cpi(button_report->data1); in kovaplus_report_to_chrdev()
593 roccat_report.data1 = button_report->data1; in kovaplus_report_to_chrdev()
Dhid-roccat-isku.h69 uint8_t data1; member
83 uint8_t data1; member
Dhid-roccat-koneplus.h72 uint8_t data1; member
108 uint8_t data1; member
Dhid-roccat-kovaplus.h80 uint8_t data1; member
114 uint8_t data1; member
/drivers/net/ethernet/broadcom/bnxt/
Dbnxt_ptp.h54 #define EVENT_PPS_TS(data2, data1) \ argument
56 (((data1) & BNXT_DATA1_LOWER_MSK) >> BNXT_DATA1_LOWER_SFT))
131 void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);
/drivers/net/ethernet/apm/xgene/
Dxgene_enet_sgmac.c334 u32 data, data1, data2, offset; in xgene_sgmac_init() local
390 data1 = xgene_enet_rd_csr(p, pause_thres_reg); in xgene_sgmac_init()
394 data1 = (data1 & 0xffff0000) | DEF_PAUSE_THRES; in xgene_sgmac_init()
397 data1 = (data1 & 0xffff) | (DEF_PAUSE_THRES << 16); in xgene_sgmac_init()
401 xgene_enet_wr_csr(p, pause_thres_reg, data1); in xgene_sgmac_init()

12345