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Searched refs:dc_link (Results 1 – 25 of 62) sorted by relevance

123

/drivers/gpu/drm/amd/display/dc/
Ddc_link.h90 struct dc_link { struct
188 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link); argument
197 static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index) in dc_get_link_at_index()
203 struct dc_link **edp_links, in get_edp_links()
220 const struct dc_link *link, in dc_get_edp_link_panel_inst()
223 struct dc_link *edp_links[MAX_NUM_EDP]; in dc_get_edp_link_panel_inst()
240 bool dc_link_set_backlight_level(const struct dc_link *dc_link,
245 bool dc_link_set_backlight_level_nits(struct dc_link *link,
250 bool dc_link_get_backlight_level_nits(struct dc_link *link,
254 bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
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Ddm_helpers.h72 const struct dc_link *link);
88 const struct dc_link *link);
95 const struct dc_link *link);
113 const struct dc_link *link,
118 struct dc_link *link);
124 const struct dc_link *link,
134 const struct dc_link *link,
141 const struct dc_link *link,
150 struct dc_link *link);
156 struct dc_link *link,
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Ddm_cp_psp.h29 struct dc_link;
45 bool (*enable_assr)(void *handle, struct dc_link *link);
/drivers/gpu/drm/amd/display/dc/inc/
Ddc_link_dp.h36 struct dc_link;
57 struct dc_link *link,
62 struct dc_link *link,
67 struct dc_link *link);
70 struct dc_link *link,
73 bool decide_edp_link_settings(struct dc_link *link,
90 struct dc_link *link,
93 bool is_mst_supported(struct dc_link *link);
95 bool detect_dp_sink_caps(struct dc_link *link);
97 void detect_edp_sink_caps(struct dc_link *link);
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Dlink_hwss.h34 struct dc_link *link,
39 void dp_receiver_power_ctrl(struct dc_link *link, bool on);
40 void edp_add_delay_for_T9(struct dc_link *link);
41 bool edp_receiver_ready_T9(struct dc_link *link);
42 bool edp_receiver_ready_T7(struct dc_link *link);
44 void dp_disable_link_phy(struct dc_link *link, enum signal_type signal);
46 void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal);
49 struct dc_link *link,
54 struct dc_link *link,
59 struct dc_link *link,
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Dlink_dpcd.h33 struct dc_link *link,
39 struct dc_link *link,
Dcore_types.h67 struct dc_link *link_create(const struct link_init_data *init_params);
68 void link_destroy(struct dc_link **link);
72 struct dc_link *link,
75 void core_link_resume(struct dc_link *link);
95 void (*link_init)(struct dc_link *link);
Dlink_enc_cfg.h77 struct dc_link *link_enc_cfg_get_link_using_link_enc(
84 const struct dc_link *link);
Dhw_sequencer.h50 void (*edp_power_control)(struct dc_link *link, bool enable);
51 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
52 void (*edp_wait_for_T12)(struct dc_link *link);
79 struct dc_link *link,
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_mst_types.c127 dc_link_remove_remote_sink(aconnector->dc_link, in dm_dp_mst_connector_destroy()
181 static bool needs_dsc_aux_workaround(struct dc_link *link) in needs_dsc_aux_workaround()
191 bool is_synaptics_cascaded_panamera(struct dc_link *link, struct drm_dp_mst_port *port) in is_synaptics_cascaded_panamera()
226 needs_dsc_aux_workaround(aconnector->dc_link)) in validate_dsc_caps_on_connector()
230 if (!aconnector->dsc_aux && is_synaptics_cascaded_panamera(aconnector->dc_link, port)) in validate_dsc_caps_on_connector()
243 if (!dc_dsc_parse_dsc_dpcd(aconnector->dc_link->ctx->dc, in validate_dsc_caps_on_connector()
273 .link = aconnector->dc_link, in dm_dp_mst_get_modes()
277 aconnector->dc_link, in dm_dp_mst_get_modes()
305 .link = aconnector->dc_link, in dm_dp_mst_get_modes()
308 aconnector->dc_link, in dm_dp_mst_get_modes()
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Damdgpu_dm_debugfs.c183 struct dc_link *link = connector->dc_link; in dp_link_settings_read()
251 struct dc_link *link = connector->dc_link; in dp_link_settings_write()
370 struct dc_link *link = connector->dc_link; in dp_phy_settings_read()
412 struct dc_link *link = connector->dc_link; in dp_lttpr_status_show()
476 struct dc_link *link = connector->dc_link; in dp_phy_settings_write()
619 struct dc_link *link = connector->dc_link; in dp_phy_test_pattern_debugfs_write()
957 hdcp_cap = dc_link_is_hdcp14(aconnector->dc_link, aconnector->dc_sink->sink_signal); in hdcp_sink_capability_show()
958 hdcp2_cap = dc_link_is_hdcp22(aconnector->dc_link, aconnector->dc_sink->sink_signal); in hdcp_sink_capability_show()
983 struct dc_link *link = aconnector->dc_link; in internal_display_show()
1069 struct dc_link *link = connector->dc_link; in dp_dpcd_data_write()
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Damdgpu_dm_helpers.c170 const struct dc_link *link) in dm_helpers_dp_update_branch_info()
236 const struct dc_link *link) in dm_helpers_dp_mst_poll_pending_down_reply()
244 const struct dc_link *link) in dm_helpers_dp_mst_clear_payload_allocation_table()
397 const struct dc_link *link, in dm_helpers_dp_mst_start_top_mgr()
421 struct dc_link *link) in dm_helpers_dp_mst_stop_top_mgr()
448 aconnector->dc_link->cur_link_settings.lane_count = 0; in dm_helpers_dp_mst_stop_top_mgr()
457 const struct dc_link *link, in dm_helpers_dp_read_dpcd()
476 const struct dc_link *link, in dm_helpers_dp_write_dpcd()
494 const struct dc_link *link, in dm_helpers_submit_i2c()
555 bool dm_helpers_is_dp_sink_present(struct dc_link *link) in dm_helpers_is_dp_sink_present()
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Damdgpu_dm_irq.c894 const struct dc_link *dc_link = amdgpu_dm_connector->dc_link; in amdgpu_dm_hpd_init() local
896 if (DC_IRQ_SOURCE_INVALID != dc_link->irq_source_hpd) { in amdgpu_dm_hpd_init()
898 dc_link->irq_source_hpd, in amdgpu_dm_hpd_init()
902 if (DC_IRQ_SOURCE_INVALID != dc_link->irq_source_hpd_rx) { in amdgpu_dm_hpd_init()
904 dc_link->irq_source_hpd_rx, in amdgpu_dm_hpd_init()
929 const struct dc_link *dc_link = amdgpu_dm_connector->dc_link; in amdgpu_dm_hpd_fini() local
931 dc_interrupt_set(adev->dm.dc, dc_link->irq_source_hpd, false); in amdgpu_dm_hpd_fini()
933 if (DC_IRQ_SOURCE_INVALID != dc_link->irq_source_hpd_rx) { in amdgpu_dm_hpd_fini()
935 dc_link->irq_source_hpd_rx, in amdgpu_dm_hpd_fini()
Damdgpu_dm_psr.c35 void amdgpu_dm_set_psr_caps(struct dc_link *link) in amdgpu_dm_set_psr_caps()
71 struct dc_link *link = NULL; in amdgpu_dm_link_setup_psr()
104 struct dc_link *link = stream->link; in amdgpu_dm_psr_enable()
Damdgpu_dm_hdcp.c43 struct dc_link *link = handle; in lp_write_i2c()
53 struct dc_link *link = handle; in lp_read_i2c()
64 struct dc_link *link = handle; in lp_write_dpcd()
72 struct dc_link *link = handle; in lp_read_dpcd()
408 static bool enable_assr(void *handle, struct dc_link *link) in enable_assr()
447 int link_index = aconnector->dc_link->link_index; in update_config()
469 link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1; in update_config()
473 link->hdcp_supported_informational = dc_link_is_hdcp14(aconnector->dc_link, in update_config()
475 link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw; in update_config()
Damdgpu_dm.c144 static enum drm_mode_subconnector get_subconnector_type(struct dc_link *link) in get_subconnector_type()
165 struct dc_link *link = aconnector->dc_link; in update_subconnector_property()
683 struct dc_link *link; in dmub_hpd_callback()
707 if (link && aconnector->dc_link == link) { in dmub_hpd_callback()
856 if (aconn->dc_link->connector_signal != SIGNAL_TYPE_EDP) in amdgpu_dm_fbc_init()
1280 struct dc_link *dc_link; in dm_handle_hpd_rx_offload_work() local
1294 dc_link = aconnector->dc_link; in dm_handle_hpd_rx_offload_work()
1297 if (!dc_link_detect_sink(dc_link, &new_connection_type)) in dm_handle_hpd_rx_offload_work()
1309 dc_link_dp_handle_automated_test(dc_link); in dm_handle_hpd_rx_offload_work()
1310 else if ((dc_link->connector_signal != SIGNAL_TYPE_EDP) && in dm_handle_hpd_rx_offload_work()
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Damdgpu_dm.h454 const struct dc_link *backlight_link[AMDGPU_DM_MAX_NUM_EDP];
584 struct dc_link *dc_link; member
707 struct dc_link *link,
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dp.c72 static uint32_t get_cr_training_aux_rd_interval(struct dc_link *link, in get_cr_training_aux_rd_interval()
90 struct dc_link *link, in get_eq_training_aux_rd_interval()
115 struct dc_link *link, in dp_wait_for_training_aux_rd_interval()
127 struct dc_link *link, in dc_dp_training_pattern_to_dpcd_training_pattern()
160 struct dc_link *link, in dpcd_set_training_pattern()
187 static enum dc_dp_training_pattern decide_eq_training_pattern(struct dc_link *link, in decide_eq_training_pattern()
224 struct dc_link *link, in dpcd_set_link_settings()
302 struct dc_link *link, in dc_dp_initialize_scrambling_data_symbols()
325 static inline bool is_repeater(struct dc_link *link, uint32_t offset) in is_repeater()
331 struct dc_link *link, in dpcd_set_lt_pattern_and_lane_settings()
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Ddc_link.c67 static void dc_link_destruct(struct dc_link *link) in dc_link_destruct()
137 static bool program_hpd_filter(const struct dc_link *link) in program_hpd_filter()
203 bool dc_link_wait_for_t12(struct dc_link *link) in dc_link_wait_for_t12()
222 bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type) in dc_link_detect_sink()
368 bool dc_link_is_dp_sink_present(struct dc_link *link) in dc_link_is_dp_sink_present()
430 static enum signal_type link_detect_sink(struct dc_link *link, in link_detect_sink()
536 static void link_disconnect_sink(struct dc_link *link) in link_disconnect_sink()
547 static void link_disconnect_remap(struct dc_sink *prev_sink, struct dc_link *link) in link_disconnect_remap()
554 bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal) in dc_link_is_hdcp14()
578 bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal) in dc_link_is_hdcp22()
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Ddc_link_hwss.c46 static inline bool is_immediate_downstream(struct dc_link *link, uint32_t offset) in is_immediate_downstream()
51 void dp_receiver_power_ctrl(struct dc_link *link, bool on) in dp_receiver_power_ctrl()
65 struct dc_link *link, in dp_enable_link_phy()
138 void edp_add_delay_for_T9(struct dc_link *link) in edp_add_delay_for_T9()
145 bool edp_receiver_ready_T9(struct dc_link *link) in edp_receiver_ready_T9()
169 bool edp_receiver_ready_T7(struct dc_link *link) in edp_receiver_ready_T7()
205 void dp_disable_link_phy(struct dc_link *link, enum signal_type signal) in dp_disable_link_phy()
244 void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal) in dp_disable_link_phy_mst()
257 struct dc_link *link, in dp_set_hw_training_pattern()
286 struct dc_link *link, in dp_set_hw_lane_settings()
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Ddc_link_dpcd.c42 struct dc_link *link, in internal_link_read_dpcd()
57 struct dc_link *link, in internal_link_write_dpcd()
191 struct dc_link *link, in core_link_read_dpcd()
224 struct dc_link *link, in core_link_write_dpcd()
/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.h74 void dp_receiver_power_ctrl(struct dc_link *link, bool on);
77 struct dc_link *link,
81 struct dc_link *link,
85 struct dc_link *link,
/drivers/gpu/drm/amd/display/dc/hdcp/
Dhdcp_msg.c117 struct dc_link *link,
126 struct dc_link *link, in hdmi_14_process_transaction()
225 struct dc_link *link, in dpcd_access_helper()
311 struct dc_link *link, in dp_11_process_transaction()
328 struct dc_link *link, in get_protection_properties_by_signal()
374 struct dc_link *link, in dc_process_hdcp_msg()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.h163 struct dc_link *link,
166 struct dc_link *link);
168 struct dc_link *link,
171 struct dc_link *link,
/drivers/gpu/drm/amd/display/dc/clk_mgr/
Dclk_mgr.c91 struct dc_link *edp_links[MAX_NUM_EDP]; in clk_mgr_exit_optimized_pwr_state()
92 struct dc_link *edp_link = NULL; in clk_mgr_exit_optimized_pwr_state()
114 struct dc_link *edp_links[MAX_NUM_EDP]; in clk_mgr_optimize_pwr_state()
115 struct dc_link *edp_link = NULL; in clk_mgr_optimize_pwr_state()

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