Searched refs:dpp_regs (Results 1 – 5 of 5) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn302/ |
| D | dcn302_resource.c | 653 #define dpp_regs(id)\ macro
656 static const struct dcn3_dpp_registers dpp_regs[] = { variable
657 dpp_regs(0),
658 dpp_regs(1),
659 dpp_regs(2),
660 dpp_regs(3),
661 dpp_regs(4)
679 if (dpp3_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift, &tf_mask)) in dcn302_dpp_create()
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| /drivers/gpu/drm/amd/display/dc/dcn301/ |
| D | dcn301_resource.c | 575 #define dpp_regs(id)\ macro
580 static const struct dcn3_dpp_registers dpp_regs[] = { variable
581 dpp_regs(0),
582 dpp_regs(1),
583 dpp_regs(2),
584 dpp_regs(3),
914 &dpp_regs[inst], &tf_shift, &tf_mask)) in dcn301_dpp_create()
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 540 #define dpp_regs(id)\ macro
545 static const struct dcn3_dpp_registers dpp_regs[] = { variable
546 dpp_regs(0),
547 dpp_regs(1),
548 dpp_regs(2),
549 dpp_regs(3),
550 dpp_regs(4),
551 dpp_regs(5),
895 &dpp_regs[inst], &tf_shift, &tf_mask)) in dcn30_dpp_create()
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| /drivers/gpu/drm/amd/display/dc/dcn303/ |
| D | dcn303_resource.c | 615 #define dpp_regs(id)\ macro
618 static const struct dcn3_dpp_registers dpp_regs[] = { variable
619 dpp_regs(0),
620 dpp_regs(1)
638 if (dpp3_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift, &tf_mask)) in dcn303_dpp_create()
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| /drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_resource.c | 550 #define dpp_regs(id)\ macro
555 static const struct dcn3_dpp_registers dpp_regs[] = { variable
556 dpp_regs(0),
557 dpp_regs(1),
558 dpp_regs(2),
559 dpp_regs(3)
1000 &dpp_regs[inst], &tf_shift, &tf_mask)) in dcn31_dpp_create()
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