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Searched refs:dpps (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_resource.c990 if (pool->base.dpps[i] != NULL) in dcn10_resource_destruct()
991 dcn10_dpp_destroy(&pool->base.dpps[i]); in dcn10_resource_destruct()
1174 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
1175 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn10_acquire_idle_pipe_for_layer()
1592 pool->base.dpps[j] = dcn10_dpp_create(ctx, i); in dcn10_resource_construct()
1593 if (pool->base.dpps[j] == NULL) { in dcn10_resource_construct()
Ddcn10_hw_sequencer_debug.c342 struct dpp *dpp = pool->dpps[i]; in dcn10_get_cm_states()
Ddcn10_hw_sequencer.c294 struct dpp *dpp = pool->dpps[i]; in dcn10_log_hw_state()
1278 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn10_init_pipes()
/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c1329 split_pipe->plane_res.dpp = pool->dpps[i]; in acquire_first_split_pipe()
1331 split_pipe->plane_res.mpcc_inst = pool->dpps[i]->inst; in acquire_first_split_pipe()
1709 pipe_ctx->plane_res.dpp = pool->dpps[i]; in acquire_first_free_pipe()
1711 if (pool->dpps[i]) in acquire_first_free_pipe()
1712 pipe_ctx->plane_res.mpcc_inst = pool->dpps[i]->inst; in acquire_first_free_pipe()
1965 pipe_ctx->plane_res.dpp = pool->dpps[tg_inst]; in acquire_resource_from_hw_enabled_state()
1968 if (pool->dpps[tg_inst]) { in acquire_resource_from_hw_enabled_state()
1969 pipe_ctx->plane_res.mpcc_inst = pool->dpps[tg_inst]->inst; in acquire_resource_from_hw_enabled_state()
/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c1093 if (pool->dpps[i] != NULL) { in dcn303_resource_destruct()
1094 kfree(TO_DCN20_DPP(pool->dpps[i])); in dcn303_resource_destruct()
1095 pool->dpps[i] = NULL; in dcn303_resource_destruct()
1579 pool->dpps[i] = dcn303_dpp_create(ctx, i); in dcn303_resource_construct()
1580 if (pool->dpps[i] == NULL) { in dcn303_resource_construct()
/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c1167 if (pool->dpps[i] != NULL) { in dcn302_resource_destruct()
1168 kfree(TO_DCN20_DPP(pool->dpps[i])); in dcn302_resource_destruct()
1169 pool->dpps[i] = NULL; in dcn302_resource_destruct()
1648 pool->dpps[i] = dcn302_dpp_create(ctx, i); in dcn302_resource_construct()
1649 if (pool->dpps[i] == NULL) { in dcn302_resource_construct()
/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h214 struct dpp *dpps[MAX_PIPES]; member
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c1486 if (pool->base.dpps[i] != NULL) in dcn20_resource_destruct()
1487 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn20_resource_destruct()
1882 next_odm_pipe->plane_res.dpp = pool->dpps[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm()
1883 next_odm_pipe->plane_res.mpcc_inst = pool->dpps[next_odm_pipe->pipe_idx]->inst; in dcn20_split_stream_for_odm()
1967 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in dcn20_split_stream_for_mpc()
1968 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in dcn20_split_stream_for_mpc()
3307 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn20_acquire_idle_pipe_for_layer()
3308 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn20_acquire_idle_pipe_for_layer()
3936 pool->base.dpps[i] = dcn20_dpp_create(ctx, i); in dcn20_resource_construct()
3937 if (pool->base.dpps[i] == NULL) { in dcn20_resource_construct()
Ddcn20_hwseq.c2516 struct dpp *dpp = res_pool->dpps[i]; in dcn20_fpga_init_hw()
2536 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn20_fpga_init_hw()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c1242 if (pool->base.dpps[i] != NULL) in dcn30_resource_destruct()
1243 dcn30_dpp_destroy(&pool->base.dpps[i]); in dcn30_resource_destruct()
1776 sec_pipe->plane_res.dpp = pool->dpps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1777 sec_pipe->plane_res.mpcc_inst = pool->dpps[pipe_idx]->inst; in dcn30_split_stream_for_mpc_or_odm()
2762 pool->base.dpps[i] = dcn30_dpp_create(ctx, i); in dcn30_resource_construct()
2763 if (pool->base.dpps[i] == NULL) { in dcn30_resource_construct()
/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c1273 if (pool->base.dpps[i] != NULL) in dcn301_destruct()
1274 dcn301_dpp_destroy(&pool->base.dpps[i]); in dcn301_destruct()
1925 pool->base.dpps[j] = dcn301_dpp_create(ctx, i); in dcn301_resource_construct()
1926 if (pool->base.dpps[j] == NULL) { in dcn301_resource_construct()
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c944 if (pool->base.dpps[i] != NULL) in dcn21_resource_destruct()
945 dcn20_dpp_destroy(&pool->base.dpps[i]); in dcn21_resource_destruct()
2169 pool->base.dpps[j] = dcn21_dpp_create(ctx, i); in dcn21_resource_construct()
2170 if (pool->base.dpps[j] == NULL) { in dcn21_resource_construct()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c1369 if (pool->base.dpps[i] != NULL) in dcn31_resource_destruct()
1370 dcn31_dpp_destroy(&pool->base.dpps[i]); in dcn31_resource_destruct()
2167 pool->base.dpps[i] = dcn31_dpp_create(ctx, i); in dcn31_resource_construct()
2168 if (pool->base.dpps[i] == NULL) { in dcn31_resource_construct()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c114 dpp_inst = clk_mgr->base.ctx->dc->res_pool->dpps[i]->inst; in rn_update_clocks_update_dpp_dto()
/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c538 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
539 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in split_stream_across_pipes()