Home
last modified time | relevance | path

Searched refs:hi (Results 1 – 25 of 316) sorted by relevance

12345678910>>...13

/drivers/hsi/clients/
Dcmt_speech.c39 struct cs_hsi_iface *hi; member
123 static void cs_hsi_read_on_control(struct cs_hsi_iface *hi);
124 static void cs_hsi_read_on_data(struct cs_hsi_iface *hi);
211 struct cs_hsi_iface *hi = msg->context; in cs_release_cmd() local
213 list_add_tail(&msg->link, &hi->cmdqueue); in cs_release_cmd()
218 struct cs_hsi_iface *hi = msg->context; in cs_cmd_destructor() local
220 spin_lock(&hi->lock); in cs_cmd_destructor()
224 if (hi->iface_state != CS_STATE_CLOSED) in cs_cmd_destructor()
225 dev_err(&hi->cl->device, "Cmd flushed while driver active\n"); in cs_cmd_destructor()
228 hi->control_state &= in cs_cmd_destructor()
[all …]
/drivers/acpi/acpica/
Dutmath.c17 u32 hi; member
62 ACPI_MUL_64_BY_32(0, multiplicand_ovl.part.hi, multiplier, in acpi_ut_short_multiply()
63 product.part.hi, carry32); in acpi_ut_short_multiply()
68 product.part.hi += carry32; in acpi_ut_short_multiply()
100 operand_ovl.part.hi = operand_ovl.part.lo; in acpi_ut_short_shift_left()
104 ACPI_SHIFT_LEFT_64_BY_32(operand_ovl.part.hi, in acpi_ut_short_shift_left()
137 operand_ovl.part.lo = operand_ovl.part.hi; in acpi_ut_short_shift_right()
138 operand_ovl.part.hi = 0; in acpi_ut_short_shift_right()
141 ACPI_SHIFT_RIGHT_64_BY_32(operand_ovl.part.hi, in acpi_ut_short_shift_right()
278 ACPI_DIV_64_BY_32(0, dividend_ovl.part.hi, divisor, in acpi_ut_short_divide()
[all …]
/drivers/scsi/esas2r/
Desas2r_ioctl.c668 struct atto_ioctl *hi, in hba_ioctl_tunnel() argument
677 hi->status = ATTO_STS_OUT_OF_RSRC; in hba_ioctl_tunnel()
690 struct atto_ioctl *hi = (struct atto_ioctl *)rq->aux_req_cx; in scsi_passthru_comp_cb() local
691 struct atto_hba_scsi_pass_thru *spt = &hi->data.scsi_pass_thru; in scsi_passthru_comp_cb()
749 struct atto_ioctl *hi = (struct atto_ioctl *)esas2r_buffered_ioctl; in hba_ioctl_callback() local
751 hi->status = ATTO_STS_SUCCESS; in hba_ioctl_callback()
753 switch (hi->function) { in hba_ioctl_callback()
759 &hi->data.get_adap_info; in hba_ioctl_callback()
761 if (hi->flags & HBAF_TUNNEL) { in hba_ioctl_callback()
762 hi->status = ATTO_STS_UNSUPPORTED; in hba_ioctl_callback()
[all …]
/drivers/net/dsa/b53/
Db53_mmap.c84 u32 hi; in b53_mmap_read48() local
88 hi = ioread32be(regs + (page << 8) + reg + 2); in b53_mmap_read48()
91 hi = readl(regs + (page << 8) + reg + 2); in b53_mmap_read48()
94 *val = ((u64)hi << 16) | lo; in b53_mmap_read48()
97 u16 hi; in b53_mmap_read48() local
101 hi = ioread16be(regs + (page << 8) + reg + 4); in b53_mmap_read48()
104 hi = readw(regs + (page << 8) + reg + 4); in b53_mmap_read48()
107 *val = ((u64)hi << 32) | lo; in b53_mmap_read48()
117 u32 hi, lo; in b53_mmap_read64() local
124 hi = ioread32be(regs + (page << 8) + reg + 4); in b53_mmap_read64()
[all …]
/drivers/clk/meson/
Dsclk-div.c114 unsigned int hi = DIV_ROUND_CLOSEST(sclk->cached_div * in sclk_apply_ratio() local
118 if (hi) in sclk_apply_ratio()
119 hi -= 1; in sclk_apply_ratio()
121 meson_parm_write(clk->map, &sclk->hi, hi); in sclk_apply_ratio()
130 if (MESON_PARM_APPLICABLE(&sclk->hi)) { in sclk_div_set_duty_cycle()
143 int hi; in sclk_div_get_duty_cycle() local
145 if (!MESON_PARM_APPLICABLE(&sclk->hi)) { in sclk_div_get_duty_cycle()
151 hi = meson_parm_read(clk->map, &sclk->hi); in sclk_div_get_duty_cycle()
152 duty->num = hi + 1; in sclk_div_get_duty_cycle()
160 if (MESON_PARM_APPLICABLE(&sclk->hi)) in sclk_apply_divider()
/drivers/cpufreq/
De_powersaver.c94 u32 lo, hi; in eps_get() local
103 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_get()
111 u32 lo, hi; in eps_set_state() local
115 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state()
119 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state()
131 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state()
143 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in eps_set_state()
175 u32 lo, hi; in eps_cpu_init() local
199 rdmsr(0x1153, lo, hi); in eps_cpu_init()
204 rdmsr(0x1154, lo, hi); in eps_cpu_init()
[all …]
/drivers/net/hamradio/
Dbaycom_epp.c1012 struct hdlcdrv_ioctl hi; in baycom_siocdevprivate() local
1017 if (copy_from_user(&hi, data, sizeof(hi))) in baycom_siocdevprivate()
1019 switch (hi.cmd) { in baycom_siocdevprivate()
1024 hi.data.cp.tx_delay = bc->ch_params.tx_delay; in baycom_siocdevprivate()
1025 hi.data.cp.tx_tail = bc->ch_params.tx_tail; in baycom_siocdevprivate()
1026 hi.data.cp.slottime = bc->ch_params.slottime; in baycom_siocdevprivate()
1027 hi.data.cp.ppersist = bc->ch_params.ppersist; in baycom_siocdevprivate()
1028 hi.data.cp.fulldup = bc->ch_params.fulldup; in baycom_siocdevprivate()
1034 bc->ch_params.tx_delay = hi.data.cp.tx_delay; in baycom_siocdevprivate()
1035 bc->ch_params.tx_tail = hi.data.cp.tx_tail; in baycom_siocdevprivate()
[all …]
Dbaycom_par.c384 struct hdlcdrv_ioctl *hi, int cmd);
412 struct hdlcdrv_ioctl *hi, int cmd) in baycom_ioctl() argument
425 switch (hi->cmd) { in baycom_ioctl()
430 strcpy(hi->data.modename, bc->options ? "par96" : "picpar"); in baycom_ioctl()
431 if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl))) in baycom_ioctl()
438 hi->data.modename[sizeof(hi->data.modename)-1] = '\0'; in baycom_ioctl()
439 return baycom_setmode(bc, hi->data.modename); in baycom_ioctl()
442 strcpy(hi->data.modename, "par96,picpar"); in baycom_ioctl()
443 if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl))) in baycom_ioctl()
/drivers/char/
Dds1620.c204 ds1620_out(THERM_WRITE_TH, 9, therm->hi); in ds1620_write_state()
211 therm->hi = cvt_9_to_int(ds1620_in(THERM_READ_TH, 9)); in ds1620_read_state()
255 if (get_user(therm.hi, uarg.i)) in ds1620_ioctl()
257 therm.lo = therm.hi - 3; in ds1620_ioctl()
264 therm.hi <<= 1; in ds1620_ioctl()
274 therm.hi >>= 1; in ds1620_ioctl()
277 if (put_user(therm.hi, uarg.i)) in ds1620_ioctl()
343 th.hi >> 1, th.hi & 1 ? 5 : 0, in ds1620_proc_therm_show()
384 th_start.hi = 1; in ds1620_init()
405 th.hi >> 1, th.hi & 1 ? 5 : 0, in ds1620_init()
/drivers/infiniband/hw/mthca/
Dmthca_doorbell.h59 static inline void mthca_write64(u32 hi, u32 lo, void __iomem *dest, in mthca_write64() argument
62 __raw_writeq((__force u64) cpu_to_be64((u64) hi << 32 | lo), dest); in mthca_write64()
88 static inline void mthca_write64(u32 hi, u32 lo, void __iomem *dest, in mthca_write64() argument
93 hi = (__force u32) cpu_to_be32(hi); in mthca_write64()
97 __raw_writel(hi, dest); in mthca_write64()
/drivers/net/ethernet/xscale/
Dptp_ixp46x.c45 u32 lo, hi; in ixp_systime_read() local
48 hi = __raw_readl(&regs->systime_hi); in ixp_systime_read()
50 ns = ((u64) hi) << 32; in ixp_systime_read()
59 u32 hi, lo; in ixp_systime_write() local
62 hi = ns >> 32; in ixp_systime_write()
66 __raw_writel(hi, &regs->systime_hi); in ixp_systime_write()
78 u32 ack = 0, lo, hi, val; in isr() local
85 hi = __raw_readl(&regs->asms_hi); in isr()
89 event.timestamp = ((u64) hi) << 32; in isr()
99 hi = __raw_readl(&regs->amms_hi); in isr()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
Dnv04.c32 u32 hi = upper_32_bits(time); in nv04_timer_time() local
36 nvkm_debug(subdev, "time high : %08x\n", hi); in nv04_timer_time()
38 nvkm_wr32(device, NV04_PTIMER_TIME_1, hi); in nv04_timer_time()
46 u32 hi, lo; in nv04_timer_read() local
49 hi = nvkm_rd32(device, NV04_PTIMER_TIME_1); in nv04_timer_read()
51 } while (hi != nvkm_rd32(device, NV04_PTIMER_TIME_1)); in nv04_timer_read()
53 return ((u64)hi << 32 | lo); in nv04_timer_read()
/drivers/staging/media/atomisp/pci/isp/kernels/s3a/s3a_1.0/
Dia_css_s3a.host.c326 merge_hi_lo_14(unsigned short hi, unsigned short lo) in merge_hi_lo_14() argument
328 int val = (int)((((unsigned int)hi << 14) & 0xfffc000) | in merge_hi_lo_14()
340 const u16 *hi, *lo; in ia_css_s3a_vmem_decode() local
351 hi = isp_stats_hi; in ia_css_s3a_vmem_decode()
367 hi[elm + chunk * 0], lo[elm + chunk * 0]); in ia_css_s3a_vmem_decode()
369 hi[elm + chunk * 1], lo[elm + chunk * 1]); in ia_css_s3a_vmem_decode()
371 hi[elm + chunk * 2], lo[elm + chunk * 2]); in ia_css_s3a_vmem_decode()
373 hi[elm + chunk * 3], lo[elm + chunk * 3]); in ia_css_s3a_vmem_decode()
375 hi[elm + chunk * 4], lo[elm + chunk * 4]); in ia_css_s3a_vmem_decode()
377 hi[elm + chunk * 5], lo[elm + chunk * 5]); in ia_css_s3a_vmem_decode()
[all …]
/drivers/ptp/
Dptp_pch.c151 u32 lo, hi; in pch_systime_read() local
154 hi = ioread32(&regs->systime_hi); in pch_systime_read()
156 ns = ((u64) hi) << 32; in pch_systime_read()
165 u32 hi, lo; in pch_systime_write() local
168 hi = ns >> 32; in pch_systime_write()
172 iowrite32(hi, &regs->systime_hi); in pch_systime_write()
238 u32 lo, hi; in pch_rx_snap_read() local
241 hi = ioread32(&chip->regs->rx_snap_hi); in pch_rx_snap_read()
243 ns = ((u64) hi) << 32; in pch_rx_snap_read()
255 u32 lo, hi; in pch_tx_snap_read() local
[all …]
/drivers/hid/
Dhid-microsoft.c78 #define ms_map_key_clear(c) hid_map_usage_clear(hi, usage, bit, max, \
80 static int ms_ergonomy_kb_quirk(struct hid_input *hi, struct hid_usage *usage, in ms_ergonomy_kb_quirk() argument
83 struct input_dev *input = hi->input; in ms_ergonomy_kb_quirk()
115 hid_map_usage_clear(hi, usage, bit, max, EV_REL, REL_WHEEL); in ms_ergonomy_kb_quirk()
142 static int ms_presenter_8k_quirk(struct hid_input *hi, struct hid_usage *usage, in ms_presenter_8k_quirk() argument
148 set_bit(EV_REP, hi->input->evbit); in ms_presenter_8k_quirk()
161 static int ms_surface_dial_quirk(struct hid_input *hi, struct hid_field *field, in ms_surface_dial_quirk() argument
182 static int ms_input_mapping(struct hid_device *hdev, struct hid_input *hi, in ms_input_mapping() argument
190 int ret = ms_ergonomy_kb_quirk(hi, usage, bit, max); in ms_input_mapping()
196 ms_presenter_8k_quirk(hi, usage, bit, max)) in ms_input_mapping()
[all …]
Dhid-icade.c188 static int icade_input_mapping(struct hid_device *hdev, struct hid_input *hi, in icade_input_mapping() argument
200 hid_map_usage(hi, usage, bit, max, EV_KEY, trans->to); in icade_input_mapping()
201 set_bit(trans->to, hi->input->keybit); in icade_input_mapping()
211 static int icade_input_mapped(struct hid_device *hdev, struct hid_input *hi, in icade_input_mapped() argument
216 set_bit(usage->type, hi->input->evbit); in icade_input_mapped()
Dhid-multitouch.c716 static int mt_touch_input_mapping(struct hid_device *hdev, struct hid_input *hi, in mt_touch_input_mapping() argument
754 set_abs(hi->input, code, field, cls->sn_move); in mt_touch_input_mapping()
762 hi->input->propbit); in mt_touch_input_mapping()
763 input_set_abs_params(hi->input, in mt_touch_input_mapping()
779 set_abs(hi->input, code, field, cls->sn_move); in mt_touch_input_mapping()
789 input_set_abs_params(hi->input, in mt_touch_input_mapping()
804 input_set_abs_params(hi->input, in mt_touch_input_mapping()
813 input_set_capability(hi->input, in mt_touch_input_mapping()
823 set_abs(hi->input, ABS_MT_TOUCH_MAJOR, field, in mt_touch_input_mapping()
829 set_abs(hi->input, ABS_MT_TOUCH_MINOR, field, in mt_touch_input_mapping()
[all …]
Dhid-uclogic-core.c85 struct hid_input *hi, in uclogic_input_mapping() argument
103 struct hid_input *hi) in uclogic_input_configured() argument
113 if (!hi->report) in uclogic_input_configured()
120 if (hi->report->id == params->pen.id) { in uclogic_input_configured()
122 drvdata->pen_input = hi->input; in uclogic_input_configured()
125 field = hi->report->field[0]; in uclogic_input_configured()
150 name = devm_kzalloc(&hi->input->dev, len, GFP_KERNEL); in uclogic_input_configured()
153 hi->input->name = name; in uclogic_input_configured()
Dhid-lenovo.c62 #define map_key_clear(c) hid_map_usage_clear(hi, usage, bit, max, EV_KEY, (c))
139 struct hid_input *hi, struct hid_field *field, in lenovo_input_mapping_tpkbd() argument
152 struct hid_input *hi, struct hid_field *field, in lenovo_input_mapping_cptkbd() argument
212 hid_map_usage(hi, usage, bit, max, EV_REL, REL_HWHEEL); in lenovo_input_mapping_cptkbd()
215 hid_map_usage(hi, usage, bit, max, EV_REL, REL_WHEEL); in lenovo_input_mapping_cptkbd()
226 struct hid_input *hi, struct hid_field *field, in lenovo_input_mapping_scrollpoint() argument
230 hid_map_usage(hi, usage, bit, max, EV_REL, REL_HWHEEL); in lenovo_input_mapping_scrollpoint()
237 struct hid_input *hi, struct hid_field *field, in lenovo_input_mapping_tp10_ultrabook_kbd() argument
275 struct hid_input *hi, struct hid_field *field, in lenovo_input_mapping_x1_tab_kbd() argument
323 struct hid_input *hi, struct hid_field *field, in lenovo_input_mapping() argument
[all …]
/drivers/crypto/vmx/
Dppc-xlate.pl77 my ($hi,$lo);
80 { $hi=$1?"0x$1":"0"; $lo="0x$2"; }
82 { $hi=$1>>32; $lo=$1&0xffffffff; } # error-prone with 32-bit perl
84 { $hi=undef; $lo=$_; }
86 if (defined($hi))
87 { push(@ret,$flavour=~/le$/o?".long\t$lo,$hi":".long\t$hi,$lo"); }
/drivers/gpu/drm/nouveau/nvif/
Duserc361.c27 u32 hi, lo; in nvif_userc361_time() local
30 hi = nvif_rd32(&user->object, 0x084); in nvif_userc361_time()
32 } while (hi != nvif_rd32(&user->object, 0x084)); in nvif_userc361_time()
34 return ((u64)hi << 32 | lo); in nvif_userc361_time()
/drivers/md/
Dmd-cluster.c33 __le64 hi; member
259 sector_t lo, sector_t hi) in add_resync_info() argument
265 ri->hi = cpu_to_le64(hi); in add_resync_info()
277 if (le64_to_cpu(ri.hi) > 0) { in read_resync_info()
278 cinfo->suspend_hi = le64_to_cpu(ri.hi); in read_resync_info()
293 sector_t lo, hi; in recover_bitmaps() local
311 ret = md_bitmap_copy_from_slot(mddev, slot, &lo, &hi, true); in recover_bitmaps()
330 if (hi > 0) { in recover_bitmaps()
444 int slot, sector_t lo, sector_t hi) in process_suspend_info() argument
450 if (!hi) { in process_suspend_info()
[all …]
/drivers/scsi/qedf/
Ddrv_scsi_fw_funcs.c27 val = cpu_to_le32(sgl_task_params->sgl_phys_addr.hi); in init_scsi_sgl_context()
28 ctx_sgl_params->sgl_addr.hi = val; in init_scsi_sgl_context()
36 val = cpu_to_le32(sgl_task_params->sgl[sge_index].sge_addr.hi); in init_scsi_sgl_context()
37 ctx_data_desc->sge[sge_index].sge_addr.hi = val; in init_scsi_sgl_context()
/drivers/pwm/
Dpwm-meson.c89 unsigned int hi; member
207 channel->hi = cnt; in meson_pwm_calc()
211 channel->hi = 0; in meson_pwm_calc()
225 channel->hi = duty_cnt; in meson_pwm_calc()
249 value = FIELD_PREP(PWM_HIGH_MASK, channel->hi) | in meson_pwm_enable()
299 channel->hi = ~0; in meson_pwm_apply()
362 channel->hi = FIELD_GET(PWM_HIGH_MASK, value); in meson_pwm_get_state()
365 state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->hi); in meson_pwm_get_state()
367 } else if (channel->lo >= channel->hi) { in meson_pwm_get_state()
369 channel->lo + channel->hi); in meson_pwm_get_state()
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dctrl.c78 u32 lo, hi; in nvkm_control_mthd_pstate_attr() local
112 hi = lo; in nvkm_control_mthd_pstate_attr()
115 hi = max(hi, cstate->domain[domain->name]); in nvkm_control_mthd_pstate_attr()
121 hi = lo; in nvkm_control_mthd_pstate_attr()
127 args->v0.max = hi / domain->mdiv; in nvkm_control_mthd_pstate_attr()

12345678910>>...13