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Searched refs:icr (Results 1 – 25 of 26) sorted by relevance

12

/drivers/i2c/busses/
Di2c-pxa.c137 u32 icr; member
159 .icr = 0x10,
168 .icr = 0x08,
177 .icr = 0x00,
186 .icr = 0x10,
197 .icr = 0x08,
407 unsigned long icr = readl(_ICR(i2c)); in i2c_pxa_abort() local
409 icr &= ~ICR_START; in i2c_pxa_abort()
410 icr |= ICR_ACKNAK | ICR_STOP | ICR_TB; in i2c_pxa_abort()
412 writel(icr, _ICR(i2c)); in i2c_pxa_abort()
[all …]
/drivers/char/
Ddsp56k.c52 #define DSP56K_TX_INT_ON dsp56k_host_interface.icr |= DSP56K_ICR_TREQ
53 #define DSP56K_RX_INT_ON dsp56k_host_interface.icr |= DSP56K_ICR_RREQ
54 #define DSP56K_TX_INT_OFF dsp56k_host_interface.icr &= ~DSP56K_ICR_TREQ
55 #define DSP56K_RX_INT_OFF dsp56k_host_interface.icr &= ~DSP56K_ICR_RREQ
369 dsp56k_host_interface.icr |= DSP56K_ICR_HF0; in dsp56k_ioctl()
371 dsp56k_host_interface.icr &= ~DSP56K_ICR_HF0; in dsp56k_ioctl()
373 dsp56k_host_interface.icr |= DSP56K_ICR_HF1; in dsp56k_ioctl()
375 dsp56k_host_interface.icr &= ~DSP56K_ICR_HF1; in dsp56k_ioctl()
378 if (dsp56k_host_interface.icr & DSP56K_ICR_HF0) status |= 0x1; in dsp56k_ioctl()
379 if (dsp56k_host_interface.icr & DSP56K_ICR_HF1) status |= 0x2; in dsp56k_ioctl()
[all …]
/drivers/misc/vmw_vmci/
Dvmci_guest.c384 unsigned int icr; in vmci_interrupt() local
387 icr = ioread32(dev->iobase + VMCI_ICR_ADDR); in vmci_interrupt()
388 if (icr == 0 || icr == ~0) in vmci_interrupt()
391 if (icr & VMCI_ICR_DATAGRAM) { in vmci_interrupt()
393 icr &= ~VMCI_ICR_DATAGRAM; in vmci_interrupt()
396 if (icr & VMCI_ICR_NOTIFICATION) { in vmci_interrupt()
398 icr &= ~VMCI_ICR_NOTIFICATION; in vmci_interrupt()
401 if (icr != 0) in vmci_interrupt()
404 icr); in vmci_interrupt()
/drivers/rtc/
Drtc-isl1208.c243 int icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); in isl1208_rtc_toggle_alarm() local
245 if (icr < 0) { in isl1208_rtc_toggle_alarm()
247 return icr; in isl1208_rtc_toggle_alarm()
251 icr |= ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM; in isl1208_rtc_toggle_alarm()
253 icr &= ~(ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM); in isl1208_rtc_toggle_alarm()
255 icr = i2c_smbus_write_byte_data(client, ISL1208_REG_INT, icr); in isl1208_rtc_toggle_alarm()
256 if (icr < 0) { in isl1208_rtc_toggle_alarm()
258 return icr; in isl1208_rtc_toggle_alarm()
351 int icr, yr, sr = isl1208_i2c_get_sr(client); in isl1208_i2c_read_alarm() local
383 icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); in isl1208_i2c_read_alarm()
[all …]
/drivers/tty/serial/
Dstm32-usart.h20 u8 icr; member
54 .icr = UNDEF_REG,
73 .icr = 0x20,
95 .icr = 0x20,
Dstm32-usart.c297 if ((sr & USART_SR_ERR_MASK) && ofs->icr != UNDEF_REG) in stm32_usart_receive_chars()
299 port->membase + ofs->icr); in stm32_usart_receive_chars()
538 if (ofs->icr == UNDEF_REG) in stm32_usart_transmit_chars()
541 writel_relaxed(USART_ICR_TCCF, port->membase + ofs->icr); in stm32_usart_transmit_chars()
578 if ((sr & USART_SR_RTOF) && ofs->icr != UNDEF_REG) in stm32_usart_interrupt()
580 port->membase + ofs->icr); in stm32_usart_interrupt()
582 if ((sr & USART_SR_WUF) && ofs->icr != UNDEF_REG) { in stm32_usart_interrupt()
585 port->membase + ofs->icr); in stm32_usart_interrupt()
/drivers/net/fjes/
Dfjes_main.c1002 u32 icr; in fjes_intr() local
1004 icr = fjes_hw_capture_interrupt_status(hw); in fjes_intr()
1006 if (icr & REG_IS_MASK_IS_ASSERT) { in fjes_intr()
1007 if (icr & REG_ICTL_MASK_RX_DATA) { in fjes_intr()
1008 fjes_rx_irq(adapter, icr & REG_IS_MASK_EPID); in fjes_intr()
1009 hw->ep_shm_info[icr & REG_IS_MASK_EPID].ep_stats in fjes_intr()
1013 if (icr & REG_ICTL_MASK_DEV_STOP_REQ) { in fjes_intr()
1014 fjes_stop_req_irq(adapter, icr & REG_IS_MASK_EPID); in fjes_intr()
1015 hw->ep_shm_info[icr & REG_IS_MASK_EPID].ep_stats in fjes_intr()
1019 if (icr & REG_ICTL_MASK_TXRX_STOP_REQ) { in fjes_intr()
[all …]
/drivers/net/can/sja1000/
Dpeak_pci.c543 u16 icr; in peak_pci_post_irq() local
546 icr = readw(chan->cfg_base + PITA_ICR); in peak_pci_post_irq()
547 if (icr & chan->icr_mask) in peak_pci_post_irq()
557 u16 sub_sys_id, icr; in peak_pci_probe() local
628 icr = readw(cfg_base + PITA_ICR + 2); in peak_pci_probe()
659 icr |= chan->icr_mask; in peak_pci_probe()
695 writew(icr, cfg_base + PITA_ICR + 2); in peak_pci_probe()
/drivers/spi/
Datmel-quadspi.c303 u32 iar, icr, ifr; in atmel_qspi_set_cfg() local
308 icr = QSPI_ICR_INST(op->cmd.opcode); in atmel_qspi_set_cfg()
337 icr |= QSPI_ICR_OPT(op->addr.val & 0xff); in atmel_qspi_set_cfg()
397 atmel_qspi_write(icr, aq, QSPI_RICR); in atmel_qspi_set_cfg()
399 atmel_qspi_write(icr, aq, QSPI_WICR); in atmel_qspi_set_cfg()
404 atmel_qspi_write(icr, aq, QSPI_ICR); in atmel_qspi_set_cfg()
/drivers/mfd/
Dstmpe.c1243 u8 icr = 0; in stmpe_chip_init() local
1272 icr = STMPE_SYS_CTRL_INT_EN; in stmpe_chip_init()
1274 icr = STMPE_ICR_LSB_GIM; in stmpe_chip_init()
1280 icr |= STMPE_ICR_LSB_EDGE; in stmpe_chip_init()
1286 icr |= STMPE_SYS_CTRL_INT_HI; in stmpe_chip_init()
1288 icr |= STMPE_ICR_LSB_HIGH; in stmpe_chip_init()
1298 return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); in stmpe_chip_init()
/drivers/iio/proximity/
Dvcnl3020.c276 unsigned int icr; in vcnl3020_is_thr_enabled() local
278 rc = regmap_read(data->regmap, VCNL_PS_ICR, &icr); in vcnl3020_is_thr_enabled()
285 return !!(icr & VCNL_ICR_THRES_EN); in vcnl3020_is_thr_enabled()
/drivers/iio/light/
Dvcnl4000.c675 int icr; in vcnl4010_config_threshold() local
690 icr = VCNL4010_INT_THR_EN; in vcnl4010_config_threshold()
696 icr = 0; in vcnl4010_config_threshold()
704 ret = i2c_smbus_write_byte_data(data->client, VCNL4010_INT_CTRL, icr); in vcnl4010_config_threshold()
/drivers/net/ethernet/marvell/
Dpxa168_eth.c843 u32 icr; in pxa168_eth_collect_events() local
846 icr = rdl(pep, INT_CAUSE); in pxa168_eth_collect_events()
847 if (icr == 0) in pxa168_eth_collect_events()
850 wrl(pep, INT_CAUSE, ~icr); in pxa168_eth_collect_events()
851 if (icr & (ICR_TXBUF_H | ICR_TXBUF_L)) { in pxa168_eth_collect_events()
855 if (icr & ICR_RXBUF) in pxa168_eth_collect_events()
/drivers/atm/
Diphase.c365 srv_p->icr = 0x055cb7; in init_abr_vc()
382 u32 icr; in ia_open_abr_vc() local
398 if (!(srv_p->icr)) in ia_open_abr_vc()
399 srv_p->icr = srv_p->pcr; in ia_open_abr_vc()
400 if ((srv_p->icr < srv_p->mcr) || (srv_p->icr > srv_p->pcr)) in ia_open_abr_vc()
433 icr = min( srv_p->icr, (srv_p->tbe > srv_p->frtt) ? in ia_open_abr_vc()
436 f_abr_vc->f_icr = cellrate_to_float(icr); in ia_open_abr_vc()
1855 if (vcc->qos.txtp.icr)
1856 srv_p.icr = vcc->qos.txtp.icr;
1873 if (srv_p.icr > srv_p.pcr)
[all …]
Diphase.h251 u_short icr; member
817 u32 icr; /* Initial Cell Rate (24-bit) */ member
/drivers/infiniband/hw/vmw_pvrdma/
Dpvrdma_main.c266 u32 icr = PVRDMA_INTR_CAUSE_RESPONSE; in pvrdma_intr0_handler() local
273 icr = pvrdma_read_reg(dev, PVRDMA_REG_ICR); in pvrdma_intr0_handler()
274 if (icr == 0) in pvrdma_intr0_handler()
278 if (icr == PVRDMA_INTR_CAUSE_RESPONSE) in pvrdma_intr0_handler()
/drivers/net/ethernet/intel/igc/
Digc_main.c5279 u32 icr = rd32(IGC_ICR); in igc_msix_other() local
5282 if (icr & IGC_ICR_DRSTA) in igc_msix_other()
5285 if (icr & IGC_ICR_DOUTSYNC) { in igc_msix_other()
5290 if (icr & IGC_ICR_LSC) { in igc_msix_other()
5297 if (icr & IGC_ICR_TS) in igc_msix_other()
5657 u32 icr = rd32(IGC_ICR); in igc_intr_msi() local
5661 if (icr & IGC_ICR_DRSTA) in igc_intr_msi()
5664 if (icr & IGC_ICR_DOUTSYNC) { in igc_intr_msi()
5669 if (icr & (IGC_ICR_RXSEQ | IGC_ICR_LSC)) { in igc_intr_msi()
5675 if (icr & IGC_ICR_TS) in igc_intr_msi()
[all …]
/drivers/scsi/
DNCR5380.c300 unsigned char status, basr, mr, icr, i; in NCR5380_print() local
304 icr = NCR5380_read(INITIATOR_COMMAND_REG); in NCR5380_print()
315 printk(KERN_CONT "\nICR = 0x%02x : ", icr); in NCR5380_print()
317 if (icr & icrs[i].mask) in NCR5380_print()
/drivers/net/ethernet/intel/e1000e/
Dnetdev.c1763 u32 icr = er32(ICR); in e1000_intr_msi() local
1766 if (icr & E1000_ICR_LSC) { in e1000_intr_msi()
1793 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) { in e1000_intr_msi()
1830 u32 rctl, icr = er32(ICR); in e1000_intr() local
1832 if (!icr || test_bit(__E1000_DOWN, &adapter->state)) in e1000_intr()
1838 if (!(icr & E1000_ICR_INT_ASSERTED)) in e1000_intr()
1846 if (icr & E1000_ICR_LSC) { in e1000_intr()
1873 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) { in e1000_intr()
1905 u32 icr = er32(ICR); in e1000_msix_other() local
1907 if (icr & adapter->eiac_mask) in e1000_msix_other()
[all …]
/drivers/net/ethernet/intel/igb/
Digb_main.c6836 u32 icr = rd32(E1000_ICR); in igb_msix_other() local
6839 if (icr & E1000_ICR_DRSTA) in igb_msix_other()
6842 if (icr & E1000_ICR_DOUTSYNC) { in igb_msix_other()
6853 if (icr & E1000_ICR_VMMB) in igb_msix_other()
6856 if (icr & E1000_ICR_LSC) { in igb_msix_other()
6863 if (icr & E1000_ICR_TS) in igb_msix_other()
7918 u32 icr = rd32(E1000_ICR); in igb_intr_msi() local
7922 if (icr & E1000_ICR_DRSTA) in igb_intr_msi()
7925 if (icr & E1000_ICR_DOUTSYNC) { in igb_intr_msi()
7930 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { in igb_intr_msi()
[all …]
/drivers/net/ethernet/atheros/atlx/
Datl2.c2068 u32 icr; in atl2_reset_hw() local
2100 icr = ATL2_READ_REG(hw, REG_IDLE_STATUS); in atl2_reset_hw()
2101 if (!icr) in atl2_reset_hw()
2107 if (icr) in atl2_reset_hw()
2108 return icr; in atl2_reset_hw()
Datl1.c242 u32 icr; in atl1_reset_hw() local
271 icr = ioread32(hw->hw_addr + REG_IDLE_STATUS); in atl1_reset_hw()
272 if (!icr) in atl1_reset_hw()
280 if (icr) { in atl1_reset_hw()
282 dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr); in atl1_reset_hw()
283 return icr; in atl1_reset_hw()
/drivers/net/ethernet/intel/ixgb/
Dixgb_main.c1727 u32 icr = IXGB_READ_REG(hw, ICR); in ixgb_intr() local
1729 if (unlikely(!icr)) in ixgb_intr()
1732 if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) in ixgb_intr()
/drivers/net/ethernet/intel/e1000/
De1000_hw.c2373 u32 icr; in e1000_check_for_link() local
2437 icr = er32(ICR); in e1000_check_for_link()
2438 ew32(ICS, (icr & ~E1000_ICS_LSC)); in e1000_check_for_link()
De1000_main.c3749 u32 icr = er32(ICR); in e1000_intr() local
3751 if (unlikely((!icr))) in e1000_intr()
3761 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { in e1000_intr()

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