/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_hdcp.c | 164 unsigned int link_index, in hdcp_update_display() argument 169 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index]; in hdcp_update_display() 170 struct mod_hdcp_display *display = &hdcp_work[link_index].display; in hdcp_update_display() 171 struct mod_hdcp_link *link = &hdcp_work[link_index].link; in hdcp_update_display() 221 unsigned int link_index, in hdcp_remove_display() argument 224 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index]; in hdcp_remove_display() 247 void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index) in hdcp_reset_display() argument 249 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index]; in hdcp_reset_display() 263 void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index) in hdcp_handle_cpirq() argument 265 struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index]; in hdcp_handle_cpirq() [all …]
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D | amdgpu_dm_hdcp.h | 79 unsigned int link_index, 84 void hdcp_reset_display(struct hdcp_workqueue *work, unsigned int link_index); 85 void hdcp_handle_cpirq(struct hdcp_workqueue *work, unsigned int link_index);
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D | amdgpu_dm_mst_types.h | 48 int link_index);
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D | amdgpu_dm_mst_types.c | 338 &hdcp_work[aconnector->dc_link->link_index]; in dm_dp_mst_get_modes() 544 int link_index) in amdgpu_dm_initialize_dp_connector() argument 550 link_index); in amdgpu_dm_initialize_dp_connector()
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D | amdgpu_dm.c | 197 uint32_t link_index); 200 uint32_t link_index, 204 uint32_t link_index); 684 uint8_t link_index = 0; in dmub_hpd_callback() local 695 if (notify->link_index > adev->dm.dc->link_count) { in dmub_hpd_callback() 696 DRM_ERROR("DMUB HPD index (%u)is abnormal", notify->link_index); in dmub_hpd_callback() 700 link_index = notify->link_index; in dmub_hpd_callback() 701 link = adev->dm.dc->links[link_index]; in dmub_hpd_callback() 708 DRM_INFO("DMUB HPD callback: link_index=%u\n", link_index); in dmub_hpd_callback() 3088 hdcp_reset_display(adev->dm.hdcp_workqueue, aconnector->dc_link->link_index); in handle_hpd_irq_helper() [all …]
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D | amdgpu_dm.h | 708 int link_index);
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D | amdgpu_dm_helpers.c | 651 return amdgpu_dm_process_dmub_aux_transfer_sync(ctx, link->link_index, payload, operation_result); in dm_helper_dmub_aux_transfer_sync()
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/drivers/gpu/drm/amd/display/dc/ |
D | dc_link.h | 94 unsigned int link_index; member 197 static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index) in dc_get_link_at_index() argument 199 return dc->links[link_index]; in dc_get_link_at_index() 229 if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index)) in dc_get_edp_link_panel_inst() 407 uint32_t link_index,
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D | dc.h | 1294 struct dc *dc, uint32_t link_index); 1353 uint32_t link_index,
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/drivers/gpu/drm/amd/display/dmub/src/ |
D | dmub_srv_stat.c | 74 notify->link_index = cmd.dp_aux_reply.control.instance; in dmub_srv_stat_get_notification()
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/drivers/soc/ti/ |
D | knav_qmss.h | 200 unsigned link_index; member
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D | knav_qmss_queue.c | 1042 region->link_index, ®ion->dma_start, ®ion->dma_end, in knav_queue_setup_region() 1051 writel_relaxed(region->link_index, ®s->start_index); in knav_queue_setup_region() 1113 ®ion->link_index); in knav_queue_setup_regions()
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/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_aux.c | 711 ddc && ddc->link ? ddc->link->link_index : UINT_MAX, in dce_aux_transfer_with_retries() 724 ddc && ddc->link ? ddc->link->link_index : UINT_MAX, in dce_aux_transfer_with_retries()
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/drivers/gpu/drm/amd/display/dmub/ |
D | dmub_srv.h | 440 uint8_t link_index; member
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/drivers/gpu/drm/amd/display/dc/inc/ |
D | core_types.h | 63 uint32_t link_index; /* this is mapped to DAL display_index member
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/drivers/gpu/drm/amd/display/dc/core/ |
D | dc_link.c | 933 link->link_index); in dc_link_detect_helper() 1166 link->link_index); in dc_link_detect_helper() 1187 link->link_index, sink, in dc_link_detect_helper() 1407 link->link_index = init_params->link_index; in dc_link_construct() 3339 pipe_ctx->stream->link->link_index, in core_link_enable_stream()
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D | dc.c | 219 link_init_params.link_index = dc->link_count; in create_links() 241 link->link_index = dc->link_count; in create_links() 3474 uint32_t link_index, in dc_submit_i2c() argument 3478 struct dc_link *link = dc->links[link_index]; in dc_submit_i2c() 3747 uint32_t link_index, in dc_process_dmub_aux_transfer_async() argument 3759 cmd.dp_aux_access.aux_control.instance = dc->links[link_index]->ddc_hw_inst; in dc_process_dmub_aux_transfer_async()
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D | dc_stream.c | 735 stream->link->link_index); in dc_stream_log()
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D | dc_link_dp.c | 3278 __func__, link->link_index); in dc_link_handle_hpd_rx_irq() 3313 __func__, link->link_index); in dc_link_handle_hpd_rx_irq() 4651 link->link_index, in dp_set_panel_mode() 4852 link->link_index, in dpcd_set_source_specific_data()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
D | dcn20_clk_mgr.c | 496 …clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_RE… in dcn2_notify_link_rate_change()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 490 …clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_RE… in dcn30_notify_link_rate_change()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr.c | 554 …clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_RE… in rn_notify_link_rate_change()
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_resource.c | 3075 if ((link->link_index == 0 && link->psr_settings.psr_feature_enabled) in decide_zstate_support()
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