/drivers/staging/media/atomisp/pci/isp/kernels/bnlm/ |
D | ia_css_bnlm.host.c | 46 const s32 *lut_val, const uint32_t lut_size) in bnlm_lut_encode() argument 62 assert((lut_size >= 2) && (lut_size <= block_size)); in bnlm_lut_encode() 64 for (i = 0; i < lut_size - 2; i++) { in bnlm_lut_encode() 76 for (i = 0; i < lut_size - 1; i++) { in bnlm_lut_encode() 86 for (i = 1; i < lut_size; i++) { in bnlm_lut_encode()
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_color.c | 194 const struct drm_color_lut *lut, uint32_t lut_size, in __set_legacy_tf() argument 201 ASSERT(lut && lut_size == MAX_COLOR_LEGACY_LUT_ENTRIES); in __set_legacy_tf() 210 gamma->num_entries = lut_size; in __set_legacy_tf() 223 const struct drm_color_lut *lut, uint32_t lut_size, in __set_output_tf() argument 230 ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES); in __set_output_tf() 238 gamma->num_entries = lut_size; in __set_output_tf() 267 const struct drm_color_lut *lut, uint32_t lut_size) in __set_input_tf() argument 277 gamma->num_entries = lut_size; in __set_input_tf()
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/drivers/gpu/drm/i915/display/ |
D | intel_color.c | 573 int i, lut_size = drm_color_lut_size(blob); in i965_load_lut_10p6() local 576 for (i = 0; i < lut_size - 1; i++) { in i965_load_lut_10p6() 628 int i, lut_size = drm_color_lut_size(blob); in ilk_load_lut_10() local 631 for (i = 0; i < lut_size; i++) in ilk_load_lut_10() 674 int i, lut_size = drm_color_lut_size(blob); in ivb_load_lut_10() local 680 &lut[i * (lut_size - 1) / (hw_lut_size - 1)]; in ivb_load_lut_10() 702 int i, lut_size = drm_color_lut_size(blob); in bdw_load_lut_10() local 711 &lut[i * (lut_size - 1) / (hw_lut_size - 1)]; in bdw_load_lut_10() 814 int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; in glk_load_degamma_lut() local 826 for (i = 0; i < lut_size; i++) { in glk_load_degamma_lut() [all …]
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/drivers/rapidio/switches/ |
D | tsi568.c | 86 u32 lut_size; in tsi568_route_clr_table() local 88 lut_size = (mport->sys_size) ? 0x1ff : 0xff; in tsi568_route_clr_table() 93 for (route_idx = 0; route_idx <= lut_size; route_idx++) in tsi568_route_clr_table() 101 for (route_idx = 0; route_idx <= lut_size; route_idx++) in tsi568_route_clr_table()
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D | tsi57x.c | 94 u32 lut_size; in tsi57x_route_clr_table() local 96 lut_size = (mport->sys_size) ? 0x1ff : 0xff; in tsi57x_route_clr_table() 101 for (route_idx = 0; route_idx <= lut_size; route_idx++) in tsi57x_route_clr_table() 108 for (route_idx = 0; route_idx <= lut_size; route_idx++) in tsi57x_route_clr_table()
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dpp_cm.c | 917 uint32_t i_mode, i_enable_10bits, lut_size; in get3dlut_config() local 944 REG_GET(CM_3DLUT_MODE, CM_3DLUT_SIZE, &lut_size); in get3dlut_config() 946 if (lut_size == 0) in get3dlut_config() 1072 int lut_size; in dpp20_program_3dlut() local 1094 lut_size = sizeof(params->tetrahedral_17.lut1)/ in dpp20_program_3dlut() 1103 lut_size = sizeof(params->tetrahedral_9.lut1)/ in dpp20_program_3dlut() 1117 dpp20_set3dlut_ram12(dpp_base, lut1, lut_size); in dpp20_program_3dlut() 1119 dpp20_set3dlut_ram10(dpp_base, lut1, lut_size); in dpp20_program_3dlut() 1123 dpp20_set3dlut_ram12(dpp_base, lut2, lut_size); in dpp20_program_3dlut() 1125 dpp20_set3dlut_ram10(dpp_base, lut2, lut_size); in dpp20_program_3dlut() [all …]
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/drivers/power/supply/ |
D | s3c_adc_battery.c | 143 unsigned int lut_size; in s3c_adc_bat_get_property() local 151 lut_size = bat->pdata->lut_noac_cnt; in s3c_adc_bat_get_property() 169 lut_size = bat->pdata->lut_acin_cnt; in s3c_adc_bat_get_property() 178 lut_size--; in s3c_adc_bat_get_property() 179 while (lut_size--) { in s3c_adc_bat_get_property()
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/drivers/net/ethernet/intel/iavf/ |
D | iavf_prototype.h | 44 bool pf_lut, u8 *lut, u16 lut_size); 46 bool pf_lut, u8 *lut, u16 lut_size);
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D | iavf_common.c | 359 u8 *lut, u16 lut_size, in iavf_aq_get_set_rss_lut() argument 395 status = iavf_asq_send_command(hw, &desc, lut, lut_size, NULL); in iavf_aq_get_set_rss_lut() 411 bool pf_lut, u8 *lut, u16 lut_size) in iavf_aq_get_rss_lut() argument 413 return iavf_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, in iavf_aq_get_rss_lut() 428 bool pf_lut, u8 *lut, u16 lut_size) in iavf_aq_set_rss_lut() argument 430 return iavf_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true); in iavf_aq_set_rss_lut()
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dpp.c | 1157 uint32_t i_mode, i_enable_10bits, lut_size; in get3dlut_config() local 1185 REG_GET(CM_3DLUT_MODE, CM_3DLUT_SIZE, &lut_size); in get3dlut_config() 1187 if (lut_size == 0) in get3dlut_config() 1313 int lut_size; in dpp3_program_3dlut() local 1341 lut_size = sizeof(params->tetrahedral_17.lut1)/ in dpp3_program_3dlut() 1350 lut_size = sizeof(params->tetrahedral_9.lut1)/ in dpp3_program_3dlut() 1364 dpp3_set3dlut_ram12(dpp_base, lut1, lut_size); in dpp3_program_3dlut() 1366 dpp3_set3dlut_ram10(dpp_base, lut1, lut_size); in dpp3_program_3dlut() 1370 dpp3_set3dlut_ram12(dpp_base, lut2, lut_size); in dpp3_program_3dlut() 1372 dpp3_set3dlut_ram10(dpp_base, lut2, lut_size); in dpp3_program_3dlut() [all …]
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D | dcn30_mpc.c | 921 uint32_t i_mode, i_enable_10bits, lut_size; in get3dlut_config() local 950 REG_GET(RMU_3DLUT_MODE[rmu_idx], MPC_RMU_3DLUT_SIZE, &lut_size); in get3dlut_config() 952 if (lut_size == 0) in get3dlut_config() 1162 int lut_size; in mpc3_program_3dlut() local 1186 lut_size = sizeof(params->tetrahedral_17.lut1)/ in mpc3_program_3dlut() 1195 lut_size = sizeof(params->tetrahedral_9.lut1)/ in mpc3_program_3dlut() 1209 mpc3_set3dlut_ram12(mpc, lut1, lut_size, rmu_idx); in mpc3_program_3dlut() 1211 mpc3_set3dlut_ram10(mpc, lut1, lut_size, rmu_idx); in mpc3_program_3dlut() 1215 mpc3_set3dlut_ram12(mpc, lut2, lut_size, rmu_idx); in mpc3_program_3dlut() 1217 mpc3_set3dlut_ram10(mpc, lut2, lut_size, rmu_idx); in mpc3_program_3dlut() [all …]
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/drivers/gpu/drm/arm/ |
D | malidp_crtc.c | 155 size_t lut_size; in malidp_crtc_atomic_check_gamma() local 168 lut_size = state->gamma_lut->length / sizeof(struct drm_color_lut); in malidp_crtc_atomic_check_gamma() 169 if (lut_size != MALIDP_GAMMA_LUT_SIZE) in malidp_crtc_atomic_check_gamma() 173 for (i = 0; i < lut_size; ++i) in malidp_crtc_atomic_check_gamma()
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/drivers/hwmon/ |
D | lm63.c | 151 int lut_size; /* 8 or 12 */ member 210 for (i = 0; i < data->lut_size; i++) { in lm63_update_lut() 313 for (i = 1; i < data->lut_size; i++) { in lm63_lut_looks_bad() 324 return i == data->lut_size ? 0 : 1; in lm63_lut_looks_bad() 1044 data->lut_size = 8; in lm63_init_client() 1048 data->lut_size = 12; in lm63_init_client()
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/drivers/clk/tegra/ |
D | clk-dfll.c | 305 int lut_size; member 746 td->lut_max = td->lut_size - 1; in dfll_init_out_if() 808 for (i = td->lut_bottom; i < td->lut_size; i++) { in find_lut_index_for_rate() 1666 td->lut_size = i; in dfll_build_pwm_lut() 1668 (lut_bottom + 1 >= td->lut_size)) { in dfll_build_pwm_lut() 1748 td->lut_size = j; in dfll_build_i2c_lut() 1755 for (j = 0; j < td->lut_size; j++) in dfll_build_i2c_lut()
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/drivers/gpu/drm/i915/gem/ |
D | i915_gem_execbuffer.c | 294 int lut_size; member 351 eb->lut_size = size; in eb_create() 353 eb->lut_size = -eb->buffer_count; in eb_create() 548 if (eb->lut_size > 0) { in eb_add_vma() 552 eb->lut_size)]); in eb_add_vma() 979 if (eb->lut_size < 0) { in eb_get_vma() 980 if (handle >= -eb->lut_size) in eb_get_vma() 987 head = &eb->buckets[hash_32(handle, eb->lut_size)]; in eb_get_vma() 1019 if (eb->lut_size > 0) in eb_destroy() 2919 GEM_BUG_ON(!eb.lut_size); in i915_gem_do_execbuffer()
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/drivers/net/ethernet/intel/ice/ |
D | ice.h | 657 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 658 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
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D | ice_common.c | 3485 u16 flags = 0, vsi_id, lut_type, lut_size, glob_lut_idx, vsi_handle; in __ice_aq_get_set_rss_lut() local 3500 lut_size = params->lut_size; in __ice_aq_get_set_rss_lut() 3545 switch (lut_size) { in __ice_aq_get_set_rss_lut() 3568 status = ice_aq_send_cmd(hw, &desc, lut, lut_size, NULL); in __ice_aq_get_set_rss_lut()
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D | ice_type.h | 972 u16 lut_size; /* size of the LUT buffer */ member
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/drivers/staging/media/atomisp/pci/ |
D | atomisp_compat_ioctl32.h | 291 unsigned int lut_size; member
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/drivers/net/ethernet/intel/i40e/ |
D | i40e_prototype.h | 41 bool pf_lut, u8 *lut, u16 lut_size); 43 bool pf_lut, u8 *lut, u16 lut_size);
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D | i40e.h | 1113 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 1114 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
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D | i40e_common.c | 239 u8 *lut, u16 lut_size, in i40e_aq_get_set_rss_lut() argument 275 status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL); in i40e_aq_get_set_rss_lut() 291 bool pf_lut, u8 *lut, u16 lut_size) in i40e_aq_get_rss_lut() argument 293 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, in i40e_aq_get_rss_lut() 308 bool pf_lut, u8 *lut, u16 lut_size) in i40e_aq_set_rss_lut() argument 310 return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true); in i40e_aq_set_rss_lut()
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/drivers/gpu/drm/rockchip/ |
D | rockchip_drm_vop.h | 210 unsigned int lut_size; member
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D | rockchip_drm_vop.c | 1832 drm_mode_crtc_set_gamma_size(crtc, vop_data->lut_size); in vop_create_crtc() 1833 drm_crtc_enable_color_mgmt(crtc, 0, false, vop_data->lut_size); in vop_create_crtc() 2142 if (!vop_data->lut_size) { in vop_bind()
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/drivers/staging/media/atomisp/include/linux/ |
D | atomisp.h | 971 unsigned int lut_size; member
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