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Searched refs:max_retries (Results 1 – 25 of 31) sorted by relevance

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/drivers/crypto/cavium/nitrox/
Dnitrox_hal.c69 int max_retries = MAX_CSR_RETRIES; in reset_pkt_input_ring() local
85 } while (max_retries--); in reset_pkt_input_ring()
97 int max_retries = MAX_CSR_RETRIES; in enable_pkt_input_ring() local
113 } while (max_retries--); in enable_pkt_input_ring()
165 int max_retries = MAX_CSR_RETRIES; in reset_pkt_solicit_port() local
182 } while (max_retries--); in reset_pkt_solicit_port()
194 int max_retries = MAX_CSR_RETRIES; in enable_pkt_solicit_port() local
215 } while (max_retries--); in enable_pkt_solicit_port()
314 int max_retries = MAX_CSR_RETRIES; in reset_aqm_ring() local
331 } while (max_retries--); in reset_aqm_ring()
[all …]
/drivers/bcma/
Ddriver_pci.c60 int max_retries = 10; in bcma_pcie_mdio_read() local
71 max_retries = 200; in bcma_pcie_mdio_read()
88 for (i = 0; i < max_retries; i++) { in bcma_pcie_mdio_read()
104 int max_retries = 10; in bcma_pcie_mdio_write() local
114 max_retries = 200; in bcma_pcie_mdio_write()
131 for (i = 0; i < max_retries; i++) { in bcma_pcie_mdio_write()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_vbios_smu.c84 …ait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in rv1_smu_wait_for_response() argument
97 } while (max_retries--); in rv1_smu_wait_for_response()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_stream_encoder.c65 uint32_t max_retries = 50; in enc1_update_generic_info_packet() local
81 0, 10, max_retries); in enc1_update_generic_info_packet()
775 uint32_t max_retries = 50; in enc1_stream_encoder_send_immediate_sdp_message() local
779 0, 10, max_retries); in enc1_stream_encoder_send_immediate_sdp_message()
792 0, 10, max_retries); in enc1_stream_encoder_send_immediate_sdp_message()
835 0, 10, max_retries); in enc1_stream_encoder_send_immediate_sdp_message()
891 uint32_t max_retries = DP_BLANK_MAX_RETRY * 10; in enc1_stream_encoder_dp_blank() local
912 max_retries = DP_BLANK_MAX_RETRY * 501; in enc1_stream_encoder_dp_blank()
924 10, max_retries); in enc1_stream_encoder_dp_blank()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_vpg.c57 uint32_t max_retries = 50; in vpg3_update_generic_info_packet() local
72 0, 10, max_retries); in vpg3_update_generic_info_packet()
Ddcn30_mpc.c817 int max_retries = 10; in mpc3_power_on_shaper_3dlut() local
824 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU0_SHAPER_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
825 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU0_3DLUT_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
835 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU1_SHAPER_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
836 REG_WAIT(MPC_RMU_MEM_PWR_CTRL, MPC_RMU1_3DLUT_MEM_PWR_STATE, 0, 1, max_retries); in mpc3_power_on_shaper_3dlut()
/drivers/ssb/
Ddriver_pcicore.c609 int max_retries = 10; in ssb_pcie_mdio_read() local
619 max_retries = 200; in ssb_pcie_mdio_read()
632 for (i = 0; i < max_retries; i++) { in ssb_pcie_mdio_read()
650 int max_retries = 10; in ssb_pcie_mdio_write() local
659 max_retries = 200; in ssb_pcie_mdio_write()
673 for (i = 0; i < max_retries; i++) { in ssb_pcie_mdio_write()
/drivers/scsi/
Dsd.c196 sdkp->max_retries, &data, NULL)) in cache_type_store()
214 sdkp->max_retries, &data, &sshdr)) { in cache_type_store()
558 sdkp->max_retries = retries; in max_retries_store()
573 return sprintf(buf, "%d\n", sdkp->max_retries); in max_retries_show()
576 static DEVICE_ATTR_RW(max_retries);
710 buffer, len, NULL, NULL, SD_TIMEOUT, sdkp->max_retries, 0, in sd_sec_submit()
899 cmd->allowed = sdkp->max_retries; in sd_setup_unmap_cmnd()
931 cmd->allowed = sdkp->max_retries; in sd_setup_write_same16_cmnd()
963 cmd->allowed = sdkp->max_retries; in sd_setup_write_same10_cmnd()
1098 cmd->allowed = sdkp->max_retries; in sd_setup_write_same_cmnd()
[all …]
Dsd.h93 int max_retries; member
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Ddcn301_smu.c73 …ait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in dcn301_smu_wait_for_response() argument
86 } while (max_retries--); in dcn301_smu_wait_for_response()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr_vbios_smu.c70 …ait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in rn_smu_wait_for_response() argument
83 } while (max_retries--); in rn_smu_wait_for_response()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr_smu_msg.c52 …ait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in dcn30_smu_wait_for_response() argument
65 } while (max_retries--); in dcn30_smu_wait_for_response()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_smu.c80 …ait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in dcn31_smu_wait_for_response() argument
93 } while (max_retries--); in dcn31_smu_wait_for_response()
/drivers/gpu/drm/amd/display/include/
Dhdcp_types.h98 uint8_t max_retries; member
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_stream_encoder.c73 uint32_t max_retries = 50; in dce110_update_generic_info_packet() local
91 0, 10, max_retries); in dce110_update_generic_info_packet()
926 uint32_t max_retries = DP_BLANK_MAX_RETRY * 10; in dce110_stream_encoder_dp_blank() local
945 max_retries = DP_BLANK_MAX_RETRY * 150; in dce110_stream_encoder_dp_blank()
957 10, max_retries); in dce110_stream_encoder_dp_blank()
/drivers/infiniband/core/
Dmad_priv.h132 int max_retries; member
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_stream_encoder.c219 uint32_t max_retries = 50; in enc2_update_gsp7_128_info_packet() local
237 0, 10, max_retries); in enc2_update_gsp7_128_info_packet()
/drivers/mtd/nand/raw/
Dmxc_nand.c466 int max_retries = 8000; in wait_op_done() local
476 } while (--max_retries); in wait_op_done()
511 int max_retries = 100; in send_cmd_v1_v2() local
514 while (max_retries-- > 0) { in send_cmd_v1_v2()
520 if (max_retries < 0) in send_cmd_v1_v2()
/drivers/gpu/drm/amd/display/dc/hdcp/
Dhdcp_msg.c403 for (i = 0; i < message_info->max_retries; i++) { in dc_process_hdcp_msg()
/drivers/net/ethernet/qlogic/qed/
Dqed_mcp.c461 u32 max_retries, u32 usecs) in _qed_mcp_cmd_and_union() argument
492 } while (++cnt < max_retries); in _qed_mcp_cmd_and_union()
494 if (cnt >= max_retries) { in _qed_mcp_cmd_and_union()
537 } while (++cnt < max_retries); in _qed_mcp_cmd_and_union()
539 if (cnt >= max_retries) { in _qed_mcp_cmd_and_union()
582 u32 max_retries = QED_DRV_MB_MAX_RETRIES; in qed_mcp_cmd_and_union() local
608 max_retries = DIV_ROUND_UP(max_retries, 1000); in qed_mcp_cmd_and_union()
612 return _qed_mcp_cmd_and_union(p_hwfn, p_ptt, p_mb_params, max_retries, in qed_mcp_cmd_and_union()
/drivers/nfc/pn533/
Dpn533.c2645 struct pn533_config_max_retries max_retries; in pn533_setup() local
2656 max_retries.mx_rty_atr = 0x2; in pn533_setup()
2657 max_retries.mx_rty_psl = 0x1; in pn533_setup()
2658 max_retries.mx_rty_passive_act = in pn533_setup()
2674 (u8 *)&max_retries, sizeof(max_retries)); in pn533_setup()
/drivers/net/ethernet/marvell/
Dpxa168_eth.c286 int max_retries = 40; in abort_dma() local
297 } while (max_retries-- > 0 && delay <= 0); in abort_dma()
299 if (max_retries <= 0) in abort_dma()
/drivers/net/wireless/
Drayctl.h545 UCHAR max_retries; member
/drivers/media/cec/core/
Dcec-adap.c1258 const unsigned int max_retries = 2; in cec_config_log_addr() local
1269 for (i = 0; i < max_retries; i++) { in cec_config_log_addr()
1305 if (i == max_retries) in cec_config_log_addr()
/drivers/gpu/drm/
Ddrm_dp_helper.c1410 int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz)); in drm_dp_i2c_do_msg() local
1412 for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) { in drm_dp_i2c_do_msg()

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