Searched refs:plane_states (Results 1 – 15 of 15) sorted by relevance
1420 stream_status->plane_states[stream_status->plane_count] = plane_state; in dc_add_plane_to_context()1479 if (stream_status->plane_states[i] == plane_state) { in dc_remove_plane_from_context()1481 dc_plane_state_release(stream_status->plane_states[i]); in dc_remove_plane_from_context()1495 stream_status->plane_states[i] = stream_status->plane_states[i + 1]; in dc_remove_plane_from_context()1497 stream_status->plane_states[stream_status->plane_count] = NULL; in dc_remove_plane_from_context()1525 del_planes[i] = stream_status->plane_states[i]; in dc_rem_all_planes_for_stream()1553 if (!dc_add_plane_to_context(dc, stream, set[i].plane_states[j], context)) in add_all_planes_for_stream()1562 struct dc_plane_state * const *plane_states, in dc_add_all_planes_for_stream() argument1573 set.plane_states[i] = plane_states[i]; in dc_add_all_planes_for_stream()2559 context->stream_status[i].plane_states[j]); in dc_resource_state_destruct()[all …]
59 const struct dc_plane_state *const *plane_states, in pre_surface_trace() argument66 const struct dc_plane_state *plane_state = plane_states[i]; in pre_surface_trace()
1877 new_ctx->stream_status[i].plane_states[j]); in dc_copy_state()3099 struct dc_plane_state *plane_state = stream_status->plane_states[j]; in commit_minimal_transition_state()3126 dc->current_state->stream_status[i].plane_states[j]->update_flags.raw = 0xFFFFFFFF; in commit_minimal_transition_state()
489 struct drm_plane_state *plane_states[SUN4I_BACKEND_NUM_LAYERS] = { 0 }; in sun4i_backend_atomic_check() local538 plane_states[plane_state->normalized_zpos] = plane_state; in sun4i_backend_atomic_check()591 (plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE)) in sun4i_backend_atomic_check()595 struct drm_plane_state *p_state = plane_states[i]; in sun4i_backend_atomic_check()
45 const struct dc_plane_state *const *plane_states,
47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; member387 struct dc_plane_state * const *plane_states,
1046 struct dc_plane_state *plane_states[MAX_SURFACES]; member
873 if (context->stream_status[i].plane_states[0]->format in dce100_validate_surface_sets()
771 plane = (stream ? dc->current_state->stream_status[0].plane_states[0] : NULL); in dcn30_apply_idle_power_optimizations()
1002 if (context->stream_status[i].plane_states[0]->format in dce112_validate_surface_sets()
902 if (context->stream_status[i].plane_states[0]->format in dce60_validate_surface_sets()
907 if (context->stream_status[i].plane_states[0]->format in dce80_validate_surface_sets()
1061 context->stream_status[i].plane_states[j]; in dce110_validate_surface_sets()
1230 context->stream_status[i].plane_states[j]; in dcn10_validate_global()
2583 dc_state->stream_status->plane_states[m]; in dm_gpureset_commit_state()2666 dc_state->stream_status[i].plane_states[j]->update_flags.raw in dm_resume()9833 dummy_updates[j].surface = status->plane_states[0]; in amdgpu_dm_atomic_commit_tail()