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Searched refs:pll_value (Results 1 – 5 of 5) sorted by relevance

/drivers/staging/sm750fb/
Dddk750_chip.h42 struct pll_value { struct
97 unsigned int sm750_calc_pll_value(unsigned int request, struct pll_value *pll);
98 unsigned int sm750_format_pll_reg(struct pll_value *p_PLL);
Dddk750_chip.c58 struct pll_value pll; in set_chip_clock()
313 struct pll_value *pll) in sm750_calc_pll_value()
385 unsigned int sm750_format_pll_reg(struct pll_value *p_PLL) in sm750_format_pll_reg()
Dddk750_mode.c79 struct pll_value *pll) in programModeRegisters()
212 struct pll_value pll; in ddk750_setModeTiming()
/drivers/video/fbdev/geode/
Dvideo_cs5530.c25 u32 pll_value; member
76 value = cs5530_pll_table[0].pll_value; in cs5530_set_dclk_frequency()
84 value = cs5530_pll_table[i].pll_value; in cs5530_set_dclk_frequency()
/drivers/mmc/host/
Dsdhci-pci-gli.c186 u32 pll_value; in gli_set_9750() local
196 pll_value = sdhci_readl(host, SDHCI_GLI_9750_PLL); in gli_set_9750()
218 pll_value &= ~SDHCI_GLI_9750_PLL_TX2_INV; in gli_set_9750()
219 pll_value &= ~SDHCI_GLI_9750_PLL_TX2_DLY; in gli_set_9750()
220 pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_INV, in gli_set_9750()
222 pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_DLY, in gli_set_9750()
246 sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL); in gli_set_9750()