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Searched refs:reg_bases (Results 1 – 4 of 4) sorted by relevance

/drivers/cpufreq/
Dmediatek-cpufreq-hw.c42 void __iomem *reg_bases[REG_ARRAY_SIZE]; member
76 *mW = readl_relaxed(data->reg_bases[REG_EM_POWER_TBL] + in mtk_cpufreq_get_cpu_power()
87 writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]); in mtk_cpufreq_hw_target_index()
104 index = readl_relaxed(data->reg_bases[REG_FREQ_PERF_STATE]); in mtk_cpufreq_hw_get()
118 writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]); in mtk_cpufreq_hw_fast_switch()
135 base_table = data->reg_bases[REG_FREQ_LUT_TABLE]; in mtk_cpu_create_freq_table()
182 data->reg_bases[i] = base + offsets[i]; in mtk_cpu_resources_init()
213 latency = readl_relaxed(data->reg_bases[REG_FREQ_LATENCY]) * 1000; in mtk_cpufreq_hw_cpu_init()
221 writel_relaxed(0x1, data->reg_bases[REG_FREQ_ENABLE]); in mtk_cpufreq_hw_cpu_init()
222 if (readl_poll_timeout(data->reg_bases[REG_FREQ_HW_STATE], sig, in mtk_cpufreq_hw_cpu_init()
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/drivers/staging/media/hantro/
Dhantro_drv.c891 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, in hantro_probe()
892 sizeof(*vpu->reg_bases), GFP_KERNEL); in hantro_probe()
893 if (!vpu->reg_bases) in hantro_probe()
901 vpu->reg_bases[i] = devm_ioremap_resource(vpu->dev, res); in hantro_probe()
902 if (IS_ERR(vpu->reg_bases[i])) in hantro_probe()
903 return PTR_ERR(vpu->reg_bases[i]); in hantro_probe()
905 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; in hantro_probe()
906 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; in hantro_probe()
Dimx8m_vpu_hw.c193 vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; in imx8mq_vpu_hw_init()
Dhantro.h189 void __iomem **reg_bases; member