| /drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ |
| D | ia_css_sdis2.host.c | 210 unsigned int src_offset = 0, dst_offset = 0; in ia_css_translate_dvs2_statistics() local
247 &htemp_ptr[0 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
249 &htemp_ptr[1 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
251 &htemp_ptr[2 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
253 &htemp_ptr[3 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
257 &vtemp_ptr[0 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
259 &vtemp_ptr[1 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
261 &vtemp_ptr[2 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
263 &vtemp_ptr[3 * table_size + src_offset], size_bytes); in ia_css_translate_dvs2_statistics()
265 src_offset += table_width; /* aligned table width */ in ia_css_translate_dvs2_statistics()
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_bo85b5.c | 45 u64 src_offset = mem->vma[0].addr; in nva3_bo_move_copy() local
58 PUSH_NVSQ(push, NV85B5, 0x030c, upper_32_bits(src_offset), in nva3_bo_move_copy()
59 0x0310, lower_32_bits(src_offset), in nva3_bo_move_copy()
69 src_offset += (PAGE_SIZE * line_count); in nva3_bo_move_copy()
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| D | nouveau_bo90b5.c | 38 u64 src_offset = mem->vma[0].addr; in nvc0_bo_move_copy() local
51 PUSH_NVSQ(push, NV90B5, 0x030c, upper_32_bits(src_offset), in nvc0_bo_move_copy()
52 0x0310, lower_32_bits(src_offset), in nvc0_bo_move_copy()
62 src_offset += (PAGE_SIZE * line_count); in nvc0_bo_move_copy()
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| D | nouveau_bo9039.c | 43 u64 src_offset = mem->vma[0].addr; in nvc0_bo_move_m2mf() local
62 NVVAL(NV9039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)), in nvc0_bo_move_m2mf()
64 OFFSET_IN, lower_32_bits(src_offset), in nvc0_bo_move_m2mf()
79 src_offset += (PAGE_SIZE * line_count); in nvc0_bo_move_m2mf()
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| D | nouveau_bo5039.c | 45 u64 src_offset = mem->vma[0].addr; in nv50_bo_move_m2mf() local
107 NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)), in nv50_bo_move_m2mf()
112 PUSH_MTHD(push, NV5039, OFFSET_IN, lower_32_bits(src_offset), in nv50_bo_move_m2mf()
129 src_offset += amount; in nv50_bo_move_m2mf()
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| D | nouveau_bo0039.c | 52 u32 src_offset = old_reg->start << PAGE_SHIFT; in nv04_bo_move_m2mf() local
73 PUSH_MTHD(push, NV039, OFFSET_IN, src_offset, in nv04_bo_move_m2mf()
89 src_offset += (PAGE_SIZE * line_count); in nv04_bo_move_m2mf()
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| /drivers/gpu/drm/radeon/ |
| D | rv770_dma.c | 43 uint64_t src_offset, uint64_t dst_offset, in rv770_copy_dma() argument
76 radeon_ring_write(ring, src_offset & 0xfffffffc); in rv770_copy_dma()
78 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in rv770_copy_dma()
79 src_offset += cur_size_in_dw * 4; in rv770_copy_dma()
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| D | evergreen_dma.c | 107 uint64_t src_offset, in evergreen_copy_dma() argument
141 radeon_ring_write(ring, src_offset & 0xfffffffc); in evergreen_copy_dma()
143 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in evergreen_copy_dma()
144 src_offset += cur_size_in_dw * 4; in evergreen_copy_dma()
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| D | evergreen_cs.c | 2803 u64 src_offset, dst_offset, dst2_offset; in evergreen_dma_cs_parse() local
2868 src_offset = radeon_get_ib_value(p, idx+2); in evergreen_dma_cs_parse()
2869 src_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32; in evergreen_dma_cs_parse()
2872 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2874 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2893 src_offset = radeon_get_ib_value(p, idx+1); in evergreen_dma_cs_parse()
2894 src_offset <<= 8; in evergreen_dma_cs_parse()
2903 src_offset = radeon_get_ib_value(p, idx+7); in evergreen_dma_cs_parse()
2904 src_offset |= ((u64)(radeon_get_ib_value(p, idx+8) & 0xff)) << 32; in evergreen_dma_cs_parse()
2912 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
[all …]
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| D | si_dma.c | 231 uint64_t src_offset, uint64_t dst_offset, in si_copy_dma() argument
264 radeon_ring_write(ring, lower_32_bits(src_offset)); in si_copy_dma()
266 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); in si_copy_dma()
267 src_offset += cur_size_in_bytes; in si_copy_dma()
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| D | r600_dma.c | 444 uint64_t src_offset, uint64_t dst_offset, in r600_copy_dma() argument
477 radeon_ring_write(ring, src_offset & 0xfffffffc); in r600_copy_dma()
479 (upper_32_bits(src_offset) & 0xff))); in r600_copy_dma()
480 src_offset += cur_size_in_dw * 4; in r600_copy_dma()
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| D | radeon_asic.h | 86 uint64_t src_offset,
157 uint64_t src_offset,
347 uint64_t src_offset, uint64_t dst_offset,
351 uint64_t src_offset, uint64_t dst_offset,
472 uint64_t src_offset, uint64_t dst_offset,
546 uint64_t src_offset, uint64_t dst_offset,
725 uint64_t src_offset, uint64_t dst_offset,
796 uint64_t src_offset, uint64_t dst_offset,
800 uint64_t src_offset, uint64_t dst_offset,
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| D | r200.c | 84 uint64_t src_offset, in r200_copy_dma() argument
114 radeon_ring_write(ring, src_offset); in r200_copy_dma()
117 src_offset += cur_size; in r200_copy_dma()
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| D | cik_sdma.c | 579 uint64_t src_offset, uint64_t dst_offset, in cik_copy_dma() argument
613 radeon_ring_write(ring, lower_32_bits(src_offset)); in cik_copy_dma()
614 radeon_ring_write(ring, upper_32_bits(src_offset)); in cik_copy_dma()
617 src_offset += cur_size_in_bytes; in cik_copy_dma()
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| D | r600_cs.c | 2385 u64 src_offset, dst_offset; in r600_dma_cs_parse() local
2443 src_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2444 src_offset <<= 8; in r600_dma_cs_parse()
2453 src_offset = radeon_get_ib_value(p, idx+5); in r600_dma_cs_parse()
2454 src_offset |= ((u64)(radeon_get_ib_value(p, idx+6) & 0xff)) << 32; in r600_dma_cs_parse()
2465 src_offset = radeon_get_ib_value(p, idx+2); in r600_dma_cs_parse()
2466 src_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32; in r600_dma_cs_parse()
2476 src_offset = radeon_get_ib_value(p, idx+2); in r600_dma_cs_parse()
2477 src_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32; in r600_dma_cs_parse()
2488 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in r600_dma_cs_parse()
[all …]
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| /drivers/gpu/drm/vc4/ |
| D | vc4_validate.c | 487 uint32_t src_offset = 0; in vc4_validate_bin_cl() local
489 while (src_offset < len) { in vc4_validate_bin_cl()
491 void *src_pkt = unvalidated + src_offset; in vc4_validate_bin_cl()
497 src_offset, cmd); in vc4_validate_bin_cl()
504 src_offset, cmd); in vc4_validate_bin_cl()
508 if (src_offset + info->len > len) { in vc4_validate_bin_cl()
511 src_offset, cmd, info->name, info->len, in vc4_validate_bin_cl()
512 src_offset + len); in vc4_validate_bin_cl()
523 src_offset, cmd, info->name); in vc4_validate_bin_cl()
527 src_offset += info->len; in vc4_validate_bin_cl()
[all …]
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| /drivers/gpu/drm/vmwgfx/ |
| D | vmwgfx_blit.c | 359 u32 src_offset, in vmw_bo_cpu_blit_line() argument
367 u32 src_page = src_offset >> PAGE_SHIFT; in vmw_bo_cpu_blit_line()
369 u32 src_page_offset = src_offset & ~PAGE_MASK; in vmw_bo_cpu_blit_line()
417 src_offset += copy_size; in vmw_bo_cpu_blit_line()
450 u32 src_offset, u32 src_stride, in vmw_bo_cpu_blit() argument
495 ret = vmw_bo_cpu_blit_line(&d, dst_offset, src_offset, w); in vmw_bo_cpu_blit()
500 src_offset += src_stride; in vmw_bo_cpu_blit()
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| /drivers/gpu/drm/qxl/ |
| D | qxl_ioctl.c | 78 int src_offset; member
94 info->src_offset); in apply_reloc()
243 reloc_info[i].src_offset = reloc.src_offset; in qxl_process_single_command()
246 reloc_info[i].src_offset = 0; in qxl_process_single_command()
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| /drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
| D | bcmsdh.c | 383 unsigned int max_req_sz, src_offset, dst_offset; in brcmf_sdiod_sglist_rw() local
483 src_offset = 0; in brcmf_sdiod_sglist_rw()
492 if (req_sz > src->len - src_offset) in brcmf_sdiod_sglist_rw()
493 req_sz = src->len - src_offset; in brcmf_sdiod_sglist_rw()
495 orig_data = src->data + src_offset; in brcmf_sdiod_sglist_rw()
499 src_offset += req_sz; in brcmf_sdiod_sglist_rw()
500 if (src_offset == src->len) { in brcmf_sdiod_sglist_rw()
501 src_offset = 0; in brcmf_sdiod_sglist_rw()
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| /drivers/crypto/ccp/ |
| D | ccp-dmaengine.c | 366 unsigned int src_offset, src_len; in ccp_create_desc() local
385 src_offset = 0; in ccp_create_desc()
401 src_offset = 0; in ccp_create_desc()
433 ccp_pt->src_dma = sg_dma_address(src_sg) + src_offset; in ccp_create_desc()
450 src_offset += len; in ccp_create_desc()
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| /drivers/usb/isp1760/ |
| D | isp1760-hcd.c | 319 static void bank_reads8(void __iomem *src_base, u32 src_offset, u32 bank_addr, in bank_reads8() argument
327 src = src_base + (bank_addr | src_offset); in bank_reads8()
329 if (src_offset < PAYLOAD_OFFSET) { in bank_reads8()
351 if (src_offset < PAYLOAD_OFFSET) in bank_reads8()
366 static void isp1760_mem_read(struct usb_hcd *hcd, u32 src_offset, void *dst, in isp1760_mem_read() argument
371 isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); in isp1760_mem_read()
374 bank_reads8(priv->base, src_offset, ISP_BANK_0, dst, bytes); in isp1760_mem_read()
405 static void mem_read(struct usb_hcd *hcd, u32 src_offset, __u32 *dst, in mem_read() argument
411 return isp1760_mem_read(hcd, src_offset, (u16 *)dst, bytes); in mem_read()
413 isp1763_mem_read(hcd, (u16)src_offset, (u16 *)dst, bytes); in mem_read()
[all …]
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| /drivers/net/ethernet/mellanox/mlxsw/ |
| D | spectrum_acl_ctcam.c | 29 u16 src_offset, u16 dst_offset, u16 size) in mlxsw_sp_acl_ctcam_region_move() argument
34 region->tcam_region_info, src_offset, in mlxsw_sp_acl_ctcam_region_move()
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| /drivers/misc/habanalabs/common/ |
| D | firmware_if.c | 115 u32 src_offset, u32 size) in hl_fw_copy_fw_to_device() argument
123 if (src_offset + size > fw->size) { in hl_fw_copy_fw_to_device()
126 size, src_offset); in hl_fw_copy_fw_to_device()
132 memcpy_toio(dst, fw_data + src_offset, size); in hl_fw_copy_fw_to_device()
149 u32 src_offset, u32 size) in hl_fw_copy_msg_to_device() argument
157 if (src_offset + size > sizeof(struct lkd_msg_comms)) { in hl_fw_copy_msg_to_device()
160 size, src_offset); in hl_fw_copy_msg_to_device()
166 memcpy_toio(dst, msg_data + src_offset, size); in hl_fw_copy_msg_to_device()
185 void __iomem *dst, u32 src_offset, u32 size) in hl_fw_load_fw_to_device() argument
194 rc = hl_fw_copy_fw_to_device(hdev, fw, dst, src_offset, size); in hl_fw_load_fw_to_device()
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_ethtool.c | 3713 rule->flex_offset == entry->src_offset) { in i40e_prune_flex_pit_list()
3739 rule->flex_offset == entry->src_offset) { in i40e_prune_flex_pit_list()
3827 u16 src_offset) in i40e_find_flex_offset() argument
3837 if (entry->src_offset == src_offset) in i40e_find_flex_offset()
3866 u16 src_offset, in i40e_add_flex_offset() argument
3875 new_pit->src_offset = src_offset; in i40e_add_flex_offset()
3882 if (new_pit->src_offset < entry->src_offset) { in i40e_add_flex_offset()
3891 if (new_pit->src_offset == entry->src_offset) { in i40e_add_flex_offset()
3960 u16 offset = entry->src_offset + j; in __i40e_reprogram_flex_pit()
3979 entry->src_offset)); in __i40e_reprogram_flex_pit()
[all …]
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| /drivers/gpu/drm/vkms/ |
| D | vkms_composer.c | 17 int src_offset = composer->offset + (y * composer->pitch) in get_pixel_from_buffer() local
20 pixel = *(u32 *)&buffer[src_offset]; in get_pixel_from_buffer()
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