/drivers/media/platform/omap3isp/ |
D | isp.c | 159 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider) in isp_xclk_update() argument 161 switch (xclk->id) { in isp_xclk_update() 163 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, in isp_xclk_update() 168 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, in isp_xclk_update() 177 struct isp_xclk *xclk = to_isp_xclk(hw); in isp_xclk_prepare() local 179 omap3isp_get(xclk->isp); in isp_xclk_prepare() 186 struct isp_xclk *xclk = to_isp_xclk(hw); in isp_xclk_unprepare() local 188 omap3isp_put(xclk->isp); in isp_xclk_unprepare() 193 struct isp_xclk *xclk = to_isp_xclk(hw); in isp_xclk_enable() local 196 spin_lock_irqsave(&xclk->lock, flags); in isp_xclk_enable() [all …]
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/drivers/media/usb/em28xx/ |
D | em28xx-camera.c | 338 dev->board.xclk = EM28XX_XCLK_FREQUENCY_4_3MHZ; in em28xx_init_camera() 339 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); in em28xx_init_camera() 365 dev->board.xclk = EM28XX_XCLK_FREQUENCY_48MHZ; in em28xx_init_camera() 366 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); in em28xx_init_camera() 408 dev->board.xclk = EM28XX_XCLK_FREQUENCY_24MHZ; in em28xx_init_camera() 409 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); in em28xx_init_camera()
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D | em28xx-input.c | 401 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; in em2860_ir_change_protocol() 405 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; in em2860_ir_change_protocol() 414 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, in em2860_ir_change_protocol() 430 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; in em2874_ir_change_protocol() 434 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; in em2874_ir_change_protocol() 439 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; in em2874_ir_change_protocol() 450 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, in em2874_ir_change_protocol()
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D | em28xx-cards.c | 684 .xclk = EM28XX_XCLK_FREQUENCY_20MHZ, 720 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, 729 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ, 1052 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, 1146 .xclk = EM28XX_XCLK_I2S_MSB_TIMING | 1179 .xclk = EM28XX_XCLK_IR_RC5_MODE | 1205 .xclk = EM28XX_XCLK_IR_RC5_MODE | 1480 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, /* NEC IR */ 1736 .xclk = EM28XX_XCLK_FREQUENCY_10MHZ, 1844 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, [all …]
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D | em28xx-core.c | 427 u8 xclk; in em28xx_audio_analog_set() local 447 xclk = dev->board.xclk & 0x7f; in em28xx_audio_analog_set() 449 xclk |= EM28XX_XCLK_AUDIO_UNMUTE; in em28xx_audio_analog_set() 451 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); in em28xx_audio_analog_set()
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D | em28xx.h | 507 unsigned char xclk, i2c_speed; member
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/drivers/clk/ |
D | clk-max9485.c | 78 struct clk *xclk; member 269 drvdata->xclk = devm_clk_get(dev, "xclk"); in max9485_i2c_probe() 270 if (IS_ERR(drvdata->xclk)) in max9485_i2c_probe() 271 return PTR_ERR(drvdata->xclk); in max9485_i2c_probe() 273 xclk_name = __clk_get_name(drvdata->xclk); in max9485_i2c_probe()
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/drivers/media/i2c/ |
D | imx290.c | 67 struct clk *xclk; member 847 ret = clk_prepare_enable(imx290->xclk); in imx290_power_on() 856 clk_disable_unprepare(imx290->xclk); in imx290_power_on() 875 clk_disable_unprepare(imx290->xclk); in imx290_power_off() 994 imx290->xclk = devm_clk_get(dev, "xclk"); in imx290_probe() 995 if (IS_ERR(imx290->xclk)) { in imx290_probe() 997 ret = PTR_ERR(imx290->xclk); in imx290_probe() 1016 ret = clk_set_rate(imx290->xclk, xclk_freq); in imx290_probe()
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D | imx214.c | 38 struct clk *xclk; member 447 ret = clk_prepare_enable(imx214->xclk); in imx214_power_on() 468 clk_disable_unprepare(imx214->xclk); in imx214_power_off() 968 imx214->xclk = devm_clk_get(dev, NULL); in imx214_probe() 969 if (IS_ERR(imx214->xclk)) { in imx214_probe() 971 return PTR_ERR(imx214->xclk); in imx214_probe() 974 ret = clk_set_rate(imx214->xclk, IMX214_DEFAULT_CLK_FREQ); in imx214_probe()
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D | ov5645.c | 95 struct clk *xclk; member 646 ret = clk_prepare_enable(ov5645->xclk); in ov5645_set_power_on() 668 clk_disable_unprepare(ov5645->xclk); in ov5645_set_power_off() 1093 ov5645->xclk = devm_clk_get(dev, "xclk"); in ov5645_probe() 1094 if (IS_ERR(ov5645->xclk)) { in ov5645_probe() 1096 return PTR_ERR(ov5645->xclk); in ov5645_probe() 1112 ret = clk_set_rate(ov5645->xclk, xclk_freq); in ov5645_probe()
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D | ov5647.c | 102 struct clk *xclk; member 765 ret = clk_prepare_enable(sensor->xclk); in ov5647_power_on() 788 clk_disable_unprepare(sensor->xclk); in ov5647_power_on() 818 clk_disable_unprepare(sensor->xclk); in ov5647_power_off() 1380 sensor->xclk = devm_clk_get(dev, NULL); in ov5647_probe() 1381 if (IS_ERR(sensor->xclk)) { in ov5647_probe() 1383 return PTR_ERR(sensor->xclk); in ov5647_probe() 1386 xclk_freq = clk_get_rate(sensor->xclk); in ov5647_probe()
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D | st-mipid02.c | 88 struct clk *xclk; member 300 ret = clk_prepare_enable(bridge->xclk); in mipid02_set_power_on() 325 clk_disable_unprepare(bridge->xclk); in mipid02_set_power_on() 332 clk_disable_unprepare(bridge->xclk); in mipid02_set_power_off() 963 bridge->xclk = devm_clk_get(dev, "xclk"); in mipid02_probe() 964 if (IS_ERR(bridge->xclk)) { in mipid02_probe() 966 return PTR_ERR(bridge->xclk); in mipid02_probe() 969 clk_freq = clk_get_rate(bridge->xclk); in mipid02_probe()
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D | ov7251.c | 70 struct clk *xclk; member 744 ret = clk_prepare_enable(ov7251->xclk); in ov7251_set_power_on() 763 clk_disable_unprepare(ov7251->xclk); in ov7251_set_power_off() 1292 ov7251->xclk = devm_clk_get(dev, "xclk"); in ov7251_probe() 1293 if (IS_ERR(ov7251->xclk)) { in ov7251_probe() 1295 return PTR_ERR(ov7251->xclk); in ov7251_probe() 1312 ret = clk_set_rate(ov7251->xclk, ov7251->xclk_freq); in ov7251_probe()
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D | ov6650.c | 845 const struct ov6650_xclk *xclk = NULL; in ov6650_video_probe() local 862 xclk = &ov6650_xclk[i]; in ov6650_video_probe() 867 for (i = 0; !xclk && i < ARRAY_SIZE(ov6650_xclk); i++) { in ov6650_video_probe() 872 xclk = &ov6650_xclk[i]; in ov6650_video_probe() 874 xclk->rate / 1000); in ov6650_video_probe() 877 if (!xclk) { in ov6650_video_probe() 917 ret = ov6650_prog_dflt(client, xclk->clkrc); in ov6650_video_probe()
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D | imx219.c | 455 struct clk *xclk; /* system clock to IMX219 */ member 1101 ret = clk_prepare_enable(imx219->xclk); in imx219_power_on() 1127 clk_disable_unprepare(imx219->xclk); in imx219_power_off() 1416 imx219->xclk = devm_clk_get(dev, NULL); in imx219_probe() 1417 if (IS_ERR(imx219->xclk)) { in imx219_probe() 1419 return PTR_ERR(imx219->xclk); in imx219_probe() 1422 imx219->xclk_freq = clk_get_rate(imx219->xclk); in imx219_probe()
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D | ov5640.c | 232 struct clk *xclk; /* system clock to OV5640 */ member 1912 ret = clk_prepare_enable(sensor->xclk); in ov5640_set_power_on() 1940 clk_disable_unprepare(sensor->xclk); in ov5640_set_power_on() 1948 clk_disable_unprepare(sensor->xclk); in ov5640_set_power_off() 3119 sensor->xclk = devm_clk_get(dev, "xclk"); in ov5640_probe() 3120 if (IS_ERR(sensor->xclk)) { in ov5640_probe() 3122 return PTR_ERR(sensor->xclk); in ov5640_probe() 3125 sensor->xclk_freq = clk_get_rate(sensor->xclk); in ov5640_probe()
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/drivers/gpu/drm/zte/ |
D | zx_hdmi.c | 47 struct clk *xclk; member 232 clk_prepare_enable(hdmi->xclk); in zx_hdmi_encoder_enable() 247 clk_disable_unprepare(hdmi->xclk); in zx_hdmi_encoder_disable() 683 hdmi->xclk = devm_clk_get(hdmi->dev, "xclk"); in zx_hdmi_bind() 684 if (IS_ERR(hdmi->xclk)) { in zx_hdmi_bind() 685 ret = PTR_ERR(hdmi->xclk); in zx_hdmi_bind()
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/drivers/gpu/drm/radeon/ |
D | sumo_dpm.c | 123 u32 xclk = radeon_get_xclk(rdev); in sumo_program_git() local 126 xclk, 16, &p, &u); in sumo_program_git() 134 u32 xclk = radeon_get_xclk(rdev); in sumo_program_grsd() local 137 r600_calculate_u_and_p(1, xclk, 14, &p, &u); in sumo_program_grsd() 154 u32 xclk = radeon_get_xclk(rdev); in sumo_gfx_powergating_initialize() local 173 xclk, 16, &p, &u); in sumo_gfx_powergating_initialize() 179 xclk, 16, &p, &u); in sumo_gfx_powergating_initialize() 318 u32 xclk = radeon_get_xclk(rdev); in sumo_calculate_bsp() local 324 xclk, 16, &pi->bsp, &pi->bsu); in sumo_calculate_bsp() 327 xclk, 16, &pi->pbsp, &pi->pbsu); in sumo_calculate_bsp() [all …]
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D | sumo_smc.c | 145 u32 xclk = radeon_get_xclk(rdev); in sumo_enable_boost_timer() local 150 period = 100 * (xclk / 100 / sumo_power_of_4(unit)); in sumo_enable_boost_timer()
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D | trinity_dpm.c | 324 u32 xclk = radeon_get_xclk(rdev); in trinity_gfx_powergating_initialize() local 341 r600_calculate_u_and_p(500, xclk, 16, &p, &u); in trinity_gfx_powergating_initialize() 843 u32 xclk = radeon_get_xclk(rdev); in trinity_setup_uvd_dpm_interval() local 845 r600_calculate_u_and_p(interval, xclk, 16, &p, &u); in trinity_setup_uvd_dpm_interval() 986 u32 xclk = radeon_get_xclk(rdev); in trinity_program_sclk_dpm() local 989 r600_calculate_u_and_p(400, xclk, 16, &p, &u); in trinity_program_sclk_dpm()
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D | si_dpm.c | 2079 u32 xclk; in si_calculate_cac_wintime() local 2084 xclk = radeon_get_xclk(rdev); in si_calculate_cac_wintime() 2086 if (xclk == 0) in si_calculate_cac_wintime() 2092 wintime = (cac_window_size * 100) / xclk; in si_calculate_cac_wintime() 3722 u32 xclk = radeon_get_xclk(rdev); in si_setup_bsp() local 3725 xclk, in si_setup_bsp() 3731 xclk, in si_setup_bsp() 6207 u32 xclk = radeon_get_xclk(rdev); 6219 *speed = 60 * xclk * 10000 / tach_period; 6228 u32 xclk = radeon_get_xclk(rdev); [all …]
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/drivers/video/fbdev/aty/ |
D | atyfb_base.c | 327 static int xclk; variable 383 int pll, mclk, xclk, ecp_max; member 472 par->pll_limits.xclk = aty_chips[i].xclk; in correct_chipset() 500 par->pll_limits.xclk = 67; in correct_chipset() 508 par->pll_limits.xclk = 67; in correct_chipset() 518 par->pll_limits.xclk = 67; in correct_chipset() 526 par->pll_limits.xclk = 67; in correct_chipset() 538 par->pll_limits.xclk = 67; in correct_chipset() 546 par->pll_limits.xclk = 67; in correct_chipset() 2299 static void aty_calc_mem_refresh(struct atyfb_par *par, int xclk) in aty_calc_mem_refresh() argument [all …]
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D | aty128fb.c | 407 u32 xclk; member 908 par->constants.xclk = BIOS_IN16(bios_pll + 0x08); in aty128_get_pllinfo() 914 par->constants.xclk, par->constants.ref_divider, in aty128_get_pllinfo() 967 par->constants.xclk = round_div((2 * Nx * par->constants.ref_clk), in aty128_timings() 988 if (!par->constants.xclk) in aty128_timings() 989 par->constants.xclk = 0x1d4d; /* same as mclk */ in aty128_timings() 1428 u32 xclk = par->constants.xclk; in aty128_ddafifo() local 1437 n = xclk * fifo_width; in aty128_ddafifo()
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D | atyfb.h | 50 int sclk, mclk, mclk_pm, xclk; member
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/drivers/gpu/drm/amd/pm/powerplay/ |
D | si_dpm.c | 2171 u32 xclk; in si_calculate_cac_wintime() local 2176 xclk = amdgpu_asic_get_xclk(adev); in si_calculate_cac_wintime() 2178 if (xclk == 0) in si_calculate_cac_wintime() 2184 wintime = (cac_window_size * 100) / xclk; in si_calculate_cac_wintime() 4187 u32 xclk = amdgpu_asic_get_xclk(adev); in si_setup_bsp() local 4190 xclk, in si_setup_bsp() 4196 xclk, in si_setup_bsp() 6635 u32 xclk = amdgpu_asic_get_xclk(adev); 6647 *speed = 60 * xclk * 10000 / tach_period; 6656 u32 xclk = amdgpu_asic_get_xclk(adev); [all …]
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