1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
5 *
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
8 *
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
11 *
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
14 *
15 */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regulator/consumer.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-event.h>
27 #include <media/v4l2-fwnode.h>
28 #include <media/v4l2-mediabus.h>
29 #include <asm/unaligned.h>
30
31 #define IMX219_REG_VALUE_08BIT 1
32 #define IMX219_REG_VALUE_16BIT 2
33
34 #define IMX219_REG_MODE_SELECT 0x0100
35 #define IMX219_MODE_STANDBY 0x00
36 #define IMX219_MODE_STREAMING 0x01
37
38 /* Chip ID */
39 #define IMX219_REG_CHIP_ID 0x0000
40 #define IMX219_CHIP_ID 0x0219
41
42 /* External clock frequency is 24.0M */
43 #define IMX219_XCLK_FREQ 24000000
44
45 /* Pixel rate is fixed at 182.4M for all the modes */
46 #define IMX219_PIXEL_RATE 182400000
47
48 #define IMX219_DEFAULT_LINK_FREQ 456000000
49
50 /* V_TIMING internal */
51 #define IMX219_REG_VTS 0x0160
52 #define IMX219_VTS_15FPS 0x0dc6
53 #define IMX219_VTS_30FPS_1080P 0x06e3
54 #define IMX219_VTS_30FPS_BINNED 0x06e3
55 #define IMX219_VTS_30FPS_640x480 0x06e3
56 #define IMX219_VTS_MAX 0xffff
57
58 #define IMX219_VBLANK_MIN 4
59
60 /*Frame Length Line*/
61 #define IMX219_FLL_MIN 0x08a6
62 #define IMX219_FLL_MAX 0xffff
63 #define IMX219_FLL_STEP 1
64 #define IMX219_FLL_DEFAULT 0x0c98
65
66 /* HBLANK control - read only */
67 #define IMX219_PPL_DEFAULT 3448
68
69 /* Exposure control */
70 #define IMX219_REG_EXPOSURE 0x015a
71 #define IMX219_EXPOSURE_MIN 4
72 #define IMX219_EXPOSURE_STEP 1
73 #define IMX219_EXPOSURE_DEFAULT 0x640
74 #define IMX219_EXPOSURE_MAX 65535
75
76 /* Analog gain control */
77 #define IMX219_REG_ANALOG_GAIN 0x0157
78 #define IMX219_ANA_GAIN_MIN 0
79 #define IMX219_ANA_GAIN_MAX 232
80 #define IMX219_ANA_GAIN_STEP 1
81 #define IMX219_ANA_GAIN_DEFAULT 0x0
82
83 /* Digital gain control */
84 #define IMX219_REG_DIGITAL_GAIN 0x0158
85 #define IMX219_DGTL_GAIN_MIN 0x0100
86 #define IMX219_DGTL_GAIN_MAX 0x0fff
87 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
88 #define IMX219_DGTL_GAIN_STEP 1
89
90 #define IMX219_REG_ORIENTATION 0x0172
91
92 /* Binning Mode */
93 #define IMX219_REG_BINNING_MODE 0x0174
94 #define IMX219_BINNING_NONE 0x0000
95 #define IMX219_BINNING_2X2 0x0101
96 #define IMX219_BINNING_2X2_ANALOG 0x0303
97
98 /* Test Pattern Control */
99 #define IMX219_REG_TEST_PATTERN 0x0600
100 #define IMX219_TEST_PATTERN_DISABLE 0
101 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
102 #define IMX219_TEST_PATTERN_COLOR_BARS 2
103 #define IMX219_TEST_PATTERN_GREY_COLOR 3
104 #define IMX219_TEST_PATTERN_PN9 4
105
106 /* Test pattern colour components */
107 #define IMX219_REG_TESTP_RED 0x0602
108 #define IMX219_REG_TESTP_GREENR 0x0604
109 #define IMX219_REG_TESTP_BLUE 0x0606
110 #define IMX219_REG_TESTP_GREENB 0x0608
111 #define IMX219_TESTP_COLOUR_MIN 0
112 #define IMX219_TESTP_COLOUR_MAX 0x03ff
113 #define IMX219_TESTP_COLOUR_STEP 1
114 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX
115 #define IMX219_TESTP_GREENR_DEFAULT 0
116 #define IMX219_TESTP_BLUE_DEFAULT 0
117 #define IMX219_TESTP_GREENB_DEFAULT 0
118
119 /* IMX219 native and active pixel array size. */
120 #define IMX219_NATIVE_WIDTH 3296U
121 #define IMX219_NATIVE_HEIGHT 2480U
122 #define IMX219_PIXEL_ARRAY_LEFT 8U
123 #define IMX219_PIXEL_ARRAY_TOP 8U
124 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
125 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
126
127 struct imx219_reg {
128 u16 address;
129 u8 val;
130 };
131
132 struct imx219_reg_list {
133 unsigned int num_of_regs;
134 const struct imx219_reg *regs;
135 };
136
137 /* Mode : resolution and related config&values */
138 struct imx219_mode {
139 /* Frame width */
140 unsigned int width;
141 /* Frame height */
142 unsigned int height;
143
144 /* Analog crop rectangle. */
145 struct v4l2_rect crop;
146
147 /* V-timing */
148 unsigned int vts_def;
149
150 /* Default register values */
151 struct imx219_reg_list reg_list;
152
153 /* 2x2 binning is used */
154 bool binning;
155 };
156
157 static const struct imx219_reg imx219_common_regs[] = {
158 {0x0100, 0x00}, /* Mode Select */
159
160 /* To Access Addresses 3000-5fff, send the following commands */
161 {0x30eb, 0x0c},
162 {0x30eb, 0x05},
163 {0x300a, 0xff},
164 {0x300b, 0xff},
165 {0x30eb, 0x05},
166 {0x30eb, 0x09},
167
168 /* PLL Clock Table */
169 {0x0301, 0x05}, /* VTPXCK_DIV */
170 {0x0303, 0x01}, /* VTSYSCK_DIV */
171 {0x0304, 0x03}, /* PREPLLCK_VT_DIV 0x03 = AUTO set */
172 {0x0305, 0x03}, /* PREPLLCK_OP_DIV 0x03 = AUTO set */
173 {0x0306, 0x00}, /* PLL_VT_MPY */
174 {0x0307, 0x39},
175 {0x030b, 0x01}, /* OP_SYS_CLK_DIV */
176 {0x030c, 0x00}, /* PLL_OP_MPY */
177 {0x030d, 0x72},
178
179 /* Undocumented registers */
180 {0x455e, 0x00},
181 {0x471e, 0x4b},
182 {0x4767, 0x0f},
183 {0x4750, 0x14},
184 {0x4540, 0x00},
185 {0x47b4, 0x14},
186 {0x4713, 0x30},
187 {0x478b, 0x10},
188 {0x478f, 0x10},
189 {0x4793, 0x10},
190 {0x4797, 0x0e},
191 {0x479b, 0x0e},
192
193 /* Frame Bank Register Group "A" */
194 {0x0162, 0x0d}, /* Line_Length_A */
195 {0x0163, 0x78},
196 {0x0170, 0x01}, /* X_ODD_INC_A */
197 {0x0171, 0x01}, /* Y_ODD_INC_A */
198
199 /* Output setup registers */
200 {0x0114, 0x01}, /* CSI 2-Lane Mode */
201 {0x0128, 0x00}, /* DPHY Auto Mode */
202 {0x012a, 0x18}, /* EXCK_Freq */
203 {0x012b, 0x00},
204 };
205
206 /*
207 * Register sets lifted off the i2C interface from the Raspberry Pi firmware
208 * driver.
209 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7.
210 */
211 static const struct imx219_reg mode_3280x2464_regs[] = {
212 {0x0164, 0x00},
213 {0x0165, 0x00},
214 {0x0166, 0x0c},
215 {0x0167, 0xcf},
216 {0x0168, 0x00},
217 {0x0169, 0x00},
218 {0x016a, 0x09},
219 {0x016b, 0x9f},
220 {0x016c, 0x0c},
221 {0x016d, 0xd0},
222 {0x016e, 0x09},
223 {0x016f, 0xa0},
224 {0x0624, 0x0c},
225 {0x0625, 0xd0},
226 {0x0626, 0x09},
227 {0x0627, 0xa0},
228 };
229
230 static const struct imx219_reg mode_1920_1080_regs[] = {
231 {0x0164, 0x02},
232 {0x0165, 0xa8},
233 {0x0166, 0x0a},
234 {0x0167, 0x27},
235 {0x0168, 0x02},
236 {0x0169, 0xb4},
237 {0x016a, 0x06},
238 {0x016b, 0xeb},
239 {0x016c, 0x07},
240 {0x016d, 0x80},
241 {0x016e, 0x04},
242 {0x016f, 0x38},
243 {0x0624, 0x07},
244 {0x0625, 0x80},
245 {0x0626, 0x04},
246 {0x0627, 0x38},
247 };
248
249 static const struct imx219_reg mode_1640_1232_regs[] = {
250 {0x0164, 0x00},
251 {0x0165, 0x00},
252 {0x0166, 0x0c},
253 {0x0167, 0xcf},
254 {0x0168, 0x00},
255 {0x0169, 0x00},
256 {0x016a, 0x09},
257 {0x016b, 0x9f},
258 {0x016c, 0x06},
259 {0x016d, 0x68},
260 {0x016e, 0x04},
261 {0x016f, 0xd0},
262 {0x0624, 0x06},
263 {0x0625, 0x68},
264 {0x0626, 0x04},
265 {0x0627, 0xd0},
266 };
267
268 static const struct imx219_reg mode_640_480_regs[] = {
269 {0x0164, 0x03},
270 {0x0165, 0xe8},
271 {0x0166, 0x08},
272 {0x0167, 0xe7},
273 {0x0168, 0x02},
274 {0x0169, 0xf0},
275 {0x016a, 0x06},
276 {0x016b, 0xaf},
277 {0x016c, 0x02},
278 {0x016d, 0x80},
279 {0x016e, 0x01},
280 {0x016f, 0xe0},
281 {0x0624, 0x06},
282 {0x0625, 0x68},
283 {0x0626, 0x04},
284 {0x0627, 0xd0},
285 };
286
287 static const struct imx219_reg raw8_framefmt_regs[] = {
288 {0x018c, 0x08},
289 {0x018d, 0x08},
290 {0x0309, 0x08},
291 };
292
293 static const struct imx219_reg raw10_framefmt_regs[] = {
294 {0x018c, 0x0a},
295 {0x018d, 0x0a},
296 {0x0309, 0x0a},
297 };
298
299 static const s64 imx219_link_freq_menu[] = {
300 IMX219_DEFAULT_LINK_FREQ,
301 };
302
303 static const char * const imx219_test_pattern_menu[] = {
304 "Disabled",
305 "Color Bars",
306 "Solid Color",
307 "Grey Color Bars",
308 "PN9"
309 };
310
311 static const int imx219_test_pattern_val[] = {
312 IMX219_TEST_PATTERN_DISABLE,
313 IMX219_TEST_PATTERN_COLOR_BARS,
314 IMX219_TEST_PATTERN_SOLID_COLOR,
315 IMX219_TEST_PATTERN_GREY_COLOR,
316 IMX219_TEST_PATTERN_PN9,
317 };
318
319 /* regulator supplies */
320 static const char * const imx219_supply_name[] = {
321 /* Supplies can be enabled in any order */
322 "VANA", /* Analog (2.8V) supply */
323 "VDIG", /* Digital Core (1.8V) supply */
324 "VDDL", /* IF (1.2V) supply */
325 };
326
327 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
328
329 /*
330 * The supported formats.
331 * This table MUST contain 4 entries per format, to cover the various flip
332 * combinations in the order
333 * - no flip
334 * - h flip
335 * - v flip
336 * - h&v flips
337 */
338 static const u32 codes[] = {
339 MEDIA_BUS_FMT_SRGGB10_1X10,
340 MEDIA_BUS_FMT_SGRBG10_1X10,
341 MEDIA_BUS_FMT_SGBRG10_1X10,
342 MEDIA_BUS_FMT_SBGGR10_1X10,
343
344 MEDIA_BUS_FMT_SRGGB8_1X8,
345 MEDIA_BUS_FMT_SGRBG8_1X8,
346 MEDIA_BUS_FMT_SGBRG8_1X8,
347 MEDIA_BUS_FMT_SBGGR8_1X8,
348 };
349
350 /*
351 * Initialisation delay between XCLR low->high and the moment when the sensor
352 * can start capture (i.e. can leave software stanby) must be not less than:
353 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
354 * where
355 * t4 is fixed, and is max 200uS,
356 * t5 is fixed, and is 6000uS,
357 * t6 depends on the sensor external clock, and is max 32000 clock periods.
358 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
359 * So for any acceptable external clock t6 is always within the range of
360 * 1185 to 5333 uS, and is always less than t5.
361 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
362 * initialize the sensor over I2C, and then exit the software standby.
363 *
364 * This start-up time can be optimized a bit more, if we start the writes
365 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
366 * initialization over I2C may complete before (t4+t5) expires, and we must
367 * ensure that capture is not started before (t4+t5).
368 *
369 * This delay doesn't account for the power supply startup time. If needed,
370 * this should be taken care of via the regulator framework. E.g. in the
371 * case of DT for regulator-fixed one should define the startup-delay-us
372 * property.
373 */
374 #define IMX219_XCLR_MIN_DELAY_US 6200
375 #define IMX219_XCLR_DELAY_RANGE_US 1000
376
377 /* Mode configs */
378 static const struct imx219_mode supported_modes[] = {
379 {
380 /* 8MPix 15fps mode */
381 .width = 3280,
382 .height = 2464,
383 .crop = {
384 .left = IMX219_PIXEL_ARRAY_LEFT,
385 .top = IMX219_PIXEL_ARRAY_TOP,
386 .width = 3280,
387 .height = 2464
388 },
389 .vts_def = IMX219_VTS_15FPS,
390 .reg_list = {
391 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
392 .regs = mode_3280x2464_regs,
393 },
394 .binning = false,
395 },
396 {
397 /* 1080P 30fps cropped */
398 .width = 1920,
399 .height = 1080,
400 .crop = {
401 .left = 688,
402 .top = 700,
403 .width = 1920,
404 .height = 1080
405 },
406 .vts_def = IMX219_VTS_30FPS_1080P,
407 .reg_list = {
408 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs),
409 .regs = mode_1920_1080_regs,
410 },
411 .binning = false,
412 },
413 {
414 /* 2x2 binned 30fps mode */
415 .width = 1640,
416 .height = 1232,
417 .crop = {
418 .left = IMX219_PIXEL_ARRAY_LEFT,
419 .top = IMX219_PIXEL_ARRAY_TOP,
420 .width = 3280,
421 .height = 2464
422 },
423 .vts_def = IMX219_VTS_30FPS_BINNED,
424 .reg_list = {
425 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs),
426 .regs = mode_1640_1232_regs,
427 },
428 .binning = true,
429 },
430 {
431 /* 640x480 30fps mode */
432 .width = 640,
433 .height = 480,
434 .crop = {
435 .left = 1008,
436 .top = 760,
437 .width = 1280,
438 .height = 960
439 },
440 .vts_def = IMX219_VTS_30FPS_640x480,
441 .reg_list = {
442 .num_of_regs = ARRAY_SIZE(mode_640_480_regs),
443 .regs = mode_640_480_regs,
444 },
445 .binning = true,
446 },
447 };
448
449 struct imx219 {
450 struct v4l2_subdev sd;
451 struct media_pad pad;
452
453 struct v4l2_mbus_framefmt fmt;
454
455 struct clk *xclk; /* system clock to IMX219 */
456 u32 xclk_freq;
457
458 struct gpio_desc *reset_gpio;
459 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
460
461 struct v4l2_ctrl_handler ctrl_handler;
462 /* V4L2 Controls */
463 struct v4l2_ctrl *pixel_rate;
464 struct v4l2_ctrl *link_freq;
465 struct v4l2_ctrl *exposure;
466 struct v4l2_ctrl *vflip;
467 struct v4l2_ctrl *hflip;
468 struct v4l2_ctrl *vblank;
469 struct v4l2_ctrl *hblank;
470
471 /* Current mode */
472 const struct imx219_mode *mode;
473
474 /*
475 * Mutex for serialized access:
476 * Protect sensor module set pad format and start/stop streaming safely.
477 */
478 struct mutex mutex;
479
480 /* Streaming on/off */
481 bool streaming;
482 };
483
to_imx219(struct v4l2_subdev * _sd)484 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
485 {
486 return container_of(_sd, struct imx219, sd);
487 }
488
489 /* Read registers up to 2 at a time */
imx219_read_reg(struct imx219 * imx219,u16 reg,u32 len,u32 * val)490 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)
491 {
492 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
493 struct i2c_msg msgs[2];
494 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
495 u8 data_buf[4] = { 0, };
496 int ret;
497
498 if (len > 4)
499 return -EINVAL;
500
501 /* Write register address */
502 msgs[0].addr = client->addr;
503 msgs[0].flags = 0;
504 msgs[0].len = ARRAY_SIZE(addr_buf);
505 msgs[0].buf = addr_buf;
506
507 /* Read data from register */
508 msgs[1].addr = client->addr;
509 msgs[1].flags = I2C_M_RD;
510 msgs[1].len = len;
511 msgs[1].buf = &data_buf[4 - len];
512
513 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
514 if (ret != ARRAY_SIZE(msgs))
515 return -EIO;
516
517 *val = get_unaligned_be32(data_buf);
518
519 return 0;
520 }
521
522 /* Write registers up to 2 at a time */
imx219_write_reg(struct imx219 * imx219,u16 reg,u32 len,u32 val)523 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)
524 {
525 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
526 u8 buf[6];
527
528 if (len > 4)
529 return -EINVAL;
530
531 put_unaligned_be16(reg, buf);
532 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
533 if (i2c_master_send(client, buf, len + 2) != len + 2)
534 return -EIO;
535
536 return 0;
537 }
538
539 /* Write a list of registers */
imx219_write_regs(struct imx219 * imx219,const struct imx219_reg * regs,u32 len)540 static int imx219_write_regs(struct imx219 *imx219,
541 const struct imx219_reg *regs, u32 len)
542 {
543 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
544 unsigned int i;
545 int ret;
546
547 for (i = 0; i < len; i++) {
548 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val);
549 if (ret) {
550 dev_err_ratelimited(&client->dev,
551 "Failed to write reg 0x%4.4x. error = %d\n",
552 regs[i].address, ret);
553
554 return ret;
555 }
556 }
557
558 return 0;
559 }
560
561 /* Get bayer order based on flip setting. */
imx219_get_format_code(struct imx219 * imx219,u32 code)562 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
563 {
564 unsigned int i;
565
566 lockdep_assert_held(&imx219->mutex);
567
568 for (i = 0; i < ARRAY_SIZE(codes); i++)
569 if (codes[i] == code)
570 break;
571
572 if (i >= ARRAY_SIZE(codes))
573 i = 0;
574
575 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
576 (imx219->hflip->val ? 1 : 0);
577
578 return codes[i];
579 }
580
imx219_set_default_format(struct imx219 * imx219)581 static void imx219_set_default_format(struct imx219 *imx219)
582 {
583 struct v4l2_mbus_framefmt *fmt;
584
585 fmt = &imx219->fmt;
586 fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
587 fmt->colorspace = V4L2_COLORSPACE_SRGB;
588 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
589 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
590 fmt->colorspace,
591 fmt->ycbcr_enc);
592 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
593 fmt->width = supported_modes[0].width;
594 fmt->height = supported_modes[0].height;
595 fmt->field = V4L2_FIELD_NONE;
596 }
597
imx219_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)598 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
599 {
600 struct imx219 *imx219 = to_imx219(sd);
601 struct v4l2_mbus_framefmt *try_fmt =
602 v4l2_subdev_get_try_format(sd, fh->state, 0);
603 struct v4l2_rect *try_crop;
604
605 mutex_lock(&imx219->mutex);
606
607 /* Initialize try_fmt */
608 try_fmt->width = supported_modes[0].width;
609 try_fmt->height = supported_modes[0].height;
610 try_fmt->code = imx219_get_format_code(imx219,
611 MEDIA_BUS_FMT_SRGGB10_1X10);
612 try_fmt->field = V4L2_FIELD_NONE;
613
614 /* Initialize try_crop rectangle. */
615 try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
616 try_crop->top = IMX219_PIXEL_ARRAY_TOP;
617 try_crop->left = IMX219_PIXEL_ARRAY_LEFT;
618 try_crop->width = IMX219_PIXEL_ARRAY_WIDTH;
619 try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT;
620
621 mutex_unlock(&imx219->mutex);
622
623 return 0;
624 }
625
imx219_set_ctrl(struct v4l2_ctrl * ctrl)626 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
627 {
628 struct imx219 *imx219 =
629 container_of(ctrl->handler, struct imx219, ctrl_handler);
630 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
631 int ret;
632
633 if (ctrl->id == V4L2_CID_VBLANK) {
634 int exposure_max, exposure_def;
635
636 /* Update max exposure while meeting expected vblanking */
637 exposure_max = imx219->mode->height + ctrl->val - 4;
638 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
639 exposure_max : IMX219_EXPOSURE_DEFAULT;
640 __v4l2_ctrl_modify_range(imx219->exposure,
641 imx219->exposure->minimum,
642 exposure_max, imx219->exposure->step,
643 exposure_def);
644 }
645
646 /*
647 * Applying V4L2 control value only happens
648 * when power is up for streaming
649 */
650 if (pm_runtime_get_if_in_use(&client->dev) == 0)
651 return 0;
652
653 switch (ctrl->id) {
654 case V4L2_CID_ANALOGUE_GAIN:
655 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN,
656 IMX219_REG_VALUE_08BIT, ctrl->val);
657 break;
658 case V4L2_CID_EXPOSURE:
659 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE,
660 IMX219_REG_VALUE_16BIT, ctrl->val);
661 break;
662 case V4L2_CID_DIGITAL_GAIN:
663 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN,
664 IMX219_REG_VALUE_16BIT, ctrl->val);
665 break;
666 case V4L2_CID_TEST_PATTERN:
667 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN,
668 IMX219_REG_VALUE_16BIT,
669 imx219_test_pattern_val[ctrl->val]);
670 break;
671 case V4L2_CID_HFLIP:
672 case V4L2_CID_VFLIP:
673 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1,
674 imx219->hflip->val |
675 imx219->vflip->val << 1);
676 break;
677 case V4L2_CID_VBLANK:
678 ret = imx219_write_reg(imx219, IMX219_REG_VTS,
679 IMX219_REG_VALUE_16BIT,
680 imx219->mode->height + ctrl->val);
681 break;
682 case V4L2_CID_TEST_PATTERN_RED:
683 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED,
684 IMX219_REG_VALUE_16BIT, ctrl->val);
685 break;
686 case V4L2_CID_TEST_PATTERN_GREENR:
687 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR,
688 IMX219_REG_VALUE_16BIT, ctrl->val);
689 break;
690 case V4L2_CID_TEST_PATTERN_BLUE:
691 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE,
692 IMX219_REG_VALUE_16BIT, ctrl->val);
693 break;
694 case V4L2_CID_TEST_PATTERN_GREENB:
695 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB,
696 IMX219_REG_VALUE_16BIT, ctrl->val);
697 break;
698 default:
699 dev_info(&client->dev,
700 "ctrl(id:0x%x,val:0x%x) is not handled\n",
701 ctrl->id, ctrl->val);
702 ret = -EINVAL;
703 break;
704 }
705
706 pm_runtime_put(&client->dev);
707
708 return ret;
709 }
710
711 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
712 .s_ctrl = imx219_set_ctrl,
713 };
714
imx219_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)715 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
716 struct v4l2_subdev_state *sd_state,
717 struct v4l2_subdev_mbus_code_enum *code)
718 {
719 struct imx219 *imx219 = to_imx219(sd);
720
721 if (code->index >= (ARRAY_SIZE(codes) / 4))
722 return -EINVAL;
723
724 mutex_lock(&imx219->mutex);
725 code->code = imx219_get_format_code(imx219, codes[code->index * 4]);
726 mutex_unlock(&imx219->mutex);
727
728 return 0;
729 }
730
imx219_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)731 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
732 struct v4l2_subdev_state *sd_state,
733 struct v4l2_subdev_frame_size_enum *fse)
734 {
735 struct imx219 *imx219 = to_imx219(sd);
736 u32 code;
737
738 if (fse->index >= ARRAY_SIZE(supported_modes))
739 return -EINVAL;
740
741 mutex_lock(&imx219->mutex);
742 code = imx219_get_format_code(imx219, fse->code);
743 mutex_unlock(&imx219->mutex);
744 if (fse->code != code)
745 return -EINVAL;
746
747 fse->min_width = supported_modes[fse->index].width;
748 fse->max_width = fse->min_width;
749 fse->min_height = supported_modes[fse->index].height;
750 fse->max_height = fse->min_height;
751
752 return 0;
753 }
754
imx219_reset_colorspace(struct v4l2_mbus_framefmt * fmt)755 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
756 {
757 fmt->colorspace = V4L2_COLORSPACE_SRGB;
758 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
759 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
760 fmt->colorspace,
761 fmt->ycbcr_enc);
762 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
763 }
764
imx219_update_pad_format(struct imx219 * imx219,const struct imx219_mode * mode,struct v4l2_subdev_format * fmt)765 static void imx219_update_pad_format(struct imx219 *imx219,
766 const struct imx219_mode *mode,
767 struct v4l2_subdev_format *fmt)
768 {
769 fmt->format.width = mode->width;
770 fmt->format.height = mode->height;
771 fmt->format.field = V4L2_FIELD_NONE;
772 imx219_reset_colorspace(&fmt->format);
773 }
774
__imx219_get_pad_format(struct imx219 * imx219,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)775 static int __imx219_get_pad_format(struct imx219 *imx219,
776 struct v4l2_subdev_state *sd_state,
777 struct v4l2_subdev_format *fmt)
778 {
779 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
780 struct v4l2_mbus_framefmt *try_fmt =
781 v4l2_subdev_get_try_format(&imx219->sd, sd_state,
782 fmt->pad);
783 /* update the code which could change due to vflip or hflip: */
784 try_fmt->code = imx219_get_format_code(imx219, try_fmt->code);
785 fmt->format = *try_fmt;
786 } else {
787 imx219_update_pad_format(imx219, imx219->mode, fmt);
788 fmt->format.code = imx219_get_format_code(imx219,
789 imx219->fmt.code);
790 }
791
792 return 0;
793 }
794
imx219_get_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)795 static int imx219_get_pad_format(struct v4l2_subdev *sd,
796 struct v4l2_subdev_state *sd_state,
797 struct v4l2_subdev_format *fmt)
798 {
799 struct imx219 *imx219 = to_imx219(sd);
800 int ret;
801
802 mutex_lock(&imx219->mutex);
803 ret = __imx219_get_pad_format(imx219, sd_state, fmt);
804 mutex_unlock(&imx219->mutex);
805
806 return ret;
807 }
808
imx219_set_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)809 static int imx219_set_pad_format(struct v4l2_subdev *sd,
810 struct v4l2_subdev_state *sd_state,
811 struct v4l2_subdev_format *fmt)
812 {
813 struct imx219 *imx219 = to_imx219(sd);
814 const struct imx219_mode *mode;
815 struct v4l2_mbus_framefmt *framefmt;
816 int exposure_max, exposure_def, hblank;
817 unsigned int i;
818
819 mutex_lock(&imx219->mutex);
820
821 for (i = 0; i < ARRAY_SIZE(codes); i++)
822 if (codes[i] == fmt->format.code)
823 break;
824 if (i >= ARRAY_SIZE(codes))
825 i = 0;
826
827 /* Bayer order varies with flips */
828 fmt->format.code = imx219_get_format_code(imx219, codes[i]);
829
830 mode = v4l2_find_nearest_size(supported_modes,
831 ARRAY_SIZE(supported_modes),
832 width, height,
833 fmt->format.width, fmt->format.height);
834 imx219_update_pad_format(imx219, mode, fmt);
835 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
836 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
837 *framefmt = fmt->format;
838 } else if (imx219->mode != mode ||
839 imx219->fmt.code != fmt->format.code) {
840 imx219->fmt = fmt->format;
841 imx219->mode = mode;
842 /* Update limits and set FPS to default */
843 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
844 IMX219_VTS_MAX - mode->height, 1,
845 mode->vts_def - mode->height);
846 __v4l2_ctrl_s_ctrl(imx219->vblank,
847 mode->vts_def - mode->height);
848 /* Update max exposure while meeting expected vblanking */
849 exposure_max = mode->vts_def - 4;
850 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
851 exposure_max : IMX219_EXPOSURE_DEFAULT;
852 __v4l2_ctrl_modify_range(imx219->exposure,
853 imx219->exposure->minimum,
854 exposure_max, imx219->exposure->step,
855 exposure_def);
856 /*
857 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
858 * depends on mode->width only, and is not changeble in any
859 * way other than changing the mode.
860 */
861 hblank = IMX219_PPL_DEFAULT - mode->width;
862 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
863 hblank);
864 }
865
866 mutex_unlock(&imx219->mutex);
867
868 return 0;
869 }
870
imx219_set_framefmt(struct imx219 * imx219)871 static int imx219_set_framefmt(struct imx219 *imx219)
872 {
873 switch (imx219->fmt.code) {
874 case MEDIA_BUS_FMT_SRGGB8_1X8:
875 case MEDIA_BUS_FMT_SGRBG8_1X8:
876 case MEDIA_BUS_FMT_SGBRG8_1X8:
877 case MEDIA_BUS_FMT_SBGGR8_1X8:
878 return imx219_write_regs(imx219, raw8_framefmt_regs,
879 ARRAY_SIZE(raw8_framefmt_regs));
880
881 case MEDIA_BUS_FMT_SRGGB10_1X10:
882 case MEDIA_BUS_FMT_SGRBG10_1X10:
883 case MEDIA_BUS_FMT_SGBRG10_1X10:
884 case MEDIA_BUS_FMT_SBGGR10_1X10:
885 return imx219_write_regs(imx219, raw10_framefmt_regs,
886 ARRAY_SIZE(raw10_framefmt_regs));
887 }
888
889 return -EINVAL;
890 }
891
imx219_set_binning(struct imx219 * imx219)892 static int imx219_set_binning(struct imx219 *imx219)
893 {
894 if (!imx219->mode->binning) {
895 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
896 IMX219_REG_VALUE_16BIT,
897 IMX219_BINNING_NONE);
898 }
899
900 switch (imx219->fmt.code) {
901 case MEDIA_BUS_FMT_SRGGB8_1X8:
902 case MEDIA_BUS_FMT_SGRBG8_1X8:
903 case MEDIA_BUS_FMT_SGBRG8_1X8:
904 case MEDIA_BUS_FMT_SBGGR8_1X8:
905 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
906 IMX219_REG_VALUE_16BIT,
907 IMX219_BINNING_2X2_ANALOG);
908
909 case MEDIA_BUS_FMT_SRGGB10_1X10:
910 case MEDIA_BUS_FMT_SGRBG10_1X10:
911 case MEDIA_BUS_FMT_SGBRG10_1X10:
912 case MEDIA_BUS_FMT_SBGGR10_1X10:
913 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE,
914 IMX219_REG_VALUE_16BIT,
915 IMX219_BINNING_2X2);
916 }
917
918 return -EINVAL;
919 }
920
921 static const struct v4l2_rect *
__imx219_get_pad_crop(struct imx219 * imx219,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)922 __imx219_get_pad_crop(struct imx219 *imx219,
923 struct v4l2_subdev_state *sd_state,
924 unsigned int pad, enum v4l2_subdev_format_whence which)
925 {
926 switch (which) {
927 case V4L2_SUBDEV_FORMAT_TRY:
928 return v4l2_subdev_get_try_crop(&imx219->sd, sd_state, pad);
929 case V4L2_SUBDEV_FORMAT_ACTIVE:
930 return &imx219->mode->crop;
931 }
932
933 return NULL;
934 }
935
imx219_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)936 static int imx219_get_selection(struct v4l2_subdev *sd,
937 struct v4l2_subdev_state *sd_state,
938 struct v4l2_subdev_selection *sel)
939 {
940 switch (sel->target) {
941 case V4L2_SEL_TGT_CROP: {
942 struct imx219 *imx219 = to_imx219(sd);
943
944 mutex_lock(&imx219->mutex);
945 sel->r = *__imx219_get_pad_crop(imx219, sd_state, sel->pad,
946 sel->which);
947 mutex_unlock(&imx219->mutex);
948
949 return 0;
950 }
951
952 case V4L2_SEL_TGT_NATIVE_SIZE:
953 sel->r.top = 0;
954 sel->r.left = 0;
955 sel->r.width = IMX219_NATIVE_WIDTH;
956 sel->r.height = IMX219_NATIVE_HEIGHT;
957
958 return 0;
959
960 case V4L2_SEL_TGT_CROP_DEFAULT:
961 case V4L2_SEL_TGT_CROP_BOUNDS:
962 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
963 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
964 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
965 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
966
967 return 0;
968 }
969
970 return -EINVAL;
971 }
972
imx219_start_streaming(struct imx219 * imx219)973 static int imx219_start_streaming(struct imx219 *imx219)
974 {
975 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
976 const struct imx219_reg_list *reg_list;
977 int ret;
978
979 ret = pm_runtime_resume_and_get(&client->dev);
980 if (ret < 0)
981 return ret;
982
983 /* Send all registers that are common to all modes */
984 ret = imx219_write_regs(imx219, imx219_common_regs, ARRAY_SIZE(imx219_common_regs));
985 if (ret) {
986 dev_err(&client->dev, "%s failed to send mfg header\n", __func__);
987 goto err_rpm_put;
988 }
989
990 /* Apply default values of current mode */
991 reg_list = &imx219->mode->reg_list;
992 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs);
993 if (ret) {
994 dev_err(&client->dev, "%s failed to set mode\n", __func__);
995 goto err_rpm_put;
996 }
997
998 ret = imx219_set_framefmt(imx219);
999 if (ret) {
1000 dev_err(&client->dev, "%s failed to set frame format: %d\n",
1001 __func__, ret);
1002 goto err_rpm_put;
1003 }
1004
1005 ret = imx219_set_binning(imx219);
1006 if (ret) {
1007 dev_err(&client->dev, "%s failed to set binning: %d\n",
1008 __func__, ret);
1009 goto err_rpm_put;
1010 }
1011
1012 /* Apply customized values from user */
1013 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
1014 if (ret)
1015 goto err_rpm_put;
1016
1017 /* set stream on register */
1018 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1019 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1020 if (ret)
1021 goto err_rpm_put;
1022
1023 /* vflip and hflip cannot change during streaming */
1024 __v4l2_ctrl_grab(imx219->vflip, true);
1025 __v4l2_ctrl_grab(imx219->hflip, true);
1026
1027 return 0;
1028
1029 err_rpm_put:
1030 pm_runtime_put(&client->dev);
1031 return ret;
1032 }
1033
imx219_stop_streaming(struct imx219 * imx219)1034 static void imx219_stop_streaming(struct imx219 *imx219)
1035 {
1036 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1037 int ret;
1038
1039 /* set stream off register */
1040 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1041 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1042 if (ret)
1043 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1044
1045 __v4l2_ctrl_grab(imx219->vflip, false);
1046 __v4l2_ctrl_grab(imx219->hflip, false);
1047
1048 pm_runtime_put(&client->dev);
1049 }
1050
imx219_set_stream(struct v4l2_subdev * sd,int enable)1051 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
1052 {
1053 struct imx219 *imx219 = to_imx219(sd);
1054 int ret = 0;
1055
1056 mutex_lock(&imx219->mutex);
1057 if (imx219->streaming == enable) {
1058 mutex_unlock(&imx219->mutex);
1059 return 0;
1060 }
1061
1062 if (enable) {
1063 /*
1064 * Apply default & customized values
1065 * and then start streaming.
1066 */
1067 ret = imx219_start_streaming(imx219);
1068 if (ret)
1069 goto err_unlock;
1070 } else {
1071 imx219_stop_streaming(imx219);
1072 }
1073
1074 imx219->streaming = enable;
1075
1076 mutex_unlock(&imx219->mutex);
1077
1078 return ret;
1079
1080 err_unlock:
1081 mutex_unlock(&imx219->mutex);
1082
1083 return ret;
1084 }
1085
1086 /* Power/clock management functions */
imx219_power_on(struct device * dev)1087 static int imx219_power_on(struct device *dev)
1088 {
1089 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1090 struct imx219 *imx219 = to_imx219(sd);
1091 int ret;
1092
1093 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
1094 imx219->supplies);
1095 if (ret) {
1096 dev_err(dev, "%s: failed to enable regulators\n",
1097 __func__);
1098 return ret;
1099 }
1100
1101 ret = clk_prepare_enable(imx219->xclk);
1102 if (ret) {
1103 dev_err(dev, "%s: failed to enable clock\n",
1104 __func__);
1105 goto reg_off;
1106 }
1107
1108 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
1109 usleep_range(IMX219_XCLR_MIN_DELAY_US,
1110 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
1111
1112 return 0;
1113
1114 reg_off:
1115 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1116
1117 return ret;
1118 }
1119
imx219_power_off(struct device * dev)1120 static int imx219_power_off(struct device *dev)
1121 {
1122 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1123 struct imx219 *imx219 = to_imx219(sd);
1124
1125 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
1126 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1127 clk_disable_unprepare(imx219->xclk);
1128
1129 return 0;
1130 }
1131
imx219_suspend(struct device * dev)1132 static int __maybe_unused imx219_suspend(struct device *dev)
1133 {
1134 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1135 struct imx219 *imx219 = to_imx219(sd);
1136
1137 if (imx219->streaming)
1138 imx219_stop_streaming(imx219);
1139
1140 return 0;
1141 }
1142
imx219_resume(struct device * dev)1143 static int __maybe_unused imx219_resume(struct device *dev)
1144 {
1145 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1146 struct imx219 *imx219 = to_imx219(sd);
1147 int ret;
1148
1149 if (imx219->streaming) {
1150 ret = imx219_start_streaming(imx219);
1151 if (ret)
1152 goto error;
1153 }
1154
1155 return 0;
1156
1157 error:
1158 imx219_stop_streaming(imx219);
1159 imx219->streaming = false;
1160
1161 return ret;
1162 }
1163
imx219_get_regulators(struct imx219 * imx219)1164 static int imx219_get_regulators(struct imx219 *imx219)
1165 {
1166 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1167 unsigned int i;
1168
1169 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1170 imx219->supplies[i].supply = imx219_supply_name[i];
1171
1172 return devm_regulator_bulk_get(&client->dev,
1173 IMX219_NUM_SUPPLIES,
1174 imx219->supplies);
1175 }
1176
1177 /* Verify chip ID */
imx219_identify_module(struct imx219 * imx219)1178 static int imx219_identify_module(struct imx219 *imx219)
1179 {
1180 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1181 int ret;
1182 u32 val;
1183
1184 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
1185 IMX219_REG_VALUE_16BIT, &val);
1186 if (ret) {
1187 dev_err(&client->dev, "failed to read chip id %x\n",
1188 IMX219_CHIP_ID);
1189 return ret;
1190 }
1191
1192 if (val != IMX219_CHIP_ID) {
1193 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1194 IMX219_CHIP_ID, val);
1195 return -EIO;
1196 }
1197
1198 return 0;
1199 }
1200
1201 static const struct v4l2_subdev_core_ops imx219_core_ops = {
1202 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1203 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1204 };
1205
1206 static const struct v4l2_subdev_video_ops imx219_video_ops = {
1207 .s_stream = imx219_set_stream,
1208 };
1209
1210 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
1211 .enum_mbus_code = imx219_enum_mbus_code,
1212 .get_fmt = imx219_get_pad_format,
1213 .set_fmt = imx219_set_pad_format,
1214 .get_selection = imx219_get_selection,
1215 .enum_frame_size = imx219_enum_frame_size,
1216 };
1217
1218 static const struct v4l2_subdev_ops imx219_subdev_ops = {
1219 .core = &imx219_core_ops,
1220 .video = &imx219_video_ops,
1221 .pad = &imx219_pad_ops,
1222 };
1223
1224 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
1225 .open = imx219_open,
1226 };
1227
1228 /* Initialize control handlers */
imx219_init_controls(struct imx219 * imx219)1229 static int imx219_init_controls(struct imx219 *imx219)
1230 {
1231 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1232 struct v4l2_ctrl_handler *ctrl_hdlr;
1233 unsigned int height = imx219->mode->height;
1234 struct v4l2_fwnode_device_properties props;
1235 int exposure_max, exposure_def, hblank;
1236 int i, ret;
1237
1238 ctrl_hdlr = &imx219->ctrl_handler;
1239 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
1240 if (ret)
1241 return ret;
1242
1243 mutex_init(&imx219->mutex);
1244 ctrl_hdlr->lock = &imx219->mutex;
1245
1246 /* By default, PIXEL_RATE is read only */
1247 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1248 V4L2_CID_PIXEL_RATE,
1249 IMX219_PIXEL_RATE,
1250 IMX219_PIXEL_RATE, 1,
1251 IMX219_PIXEL_RATE);
1252
1253 imx219->link_freq =
1254 v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops,
1255 V4L2_CID_LINK_FREQ,
1256 ARRAY_SIZE(imx219_link_freq_menu) - 1, 0,
1257 imx219_link_freq_menu);
1258 if (imx219->link_freq)
1259 imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1260
1261 /* Initial vblank/hblank/exposure parameters based on current mode */
1262 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1263 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
1264 IMX219_VTS_MAX - height, 1,
1265 imx219->mode->vts_def - height);
1266 hblank = IMX219_PPL_DEFAULT - imx219->mode->width;
1267 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1268 V4L2_CID_HBLANK, hblank, hblank,
1269 1, hblank);
1270 if (imx219->hblank)
1271 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1272 exposure_max = imx219->mode->vts_def - 4;
1273 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
1274 exposure_max : IMX219_EXPOSURE_DEFAULT;
1275 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1276 V4L2_CID_EXPOSURE,
1277 IMX219_EXPOSURE_MIN, exposure_max,
1278 IMX219_EXPOSURE_STEP,
1279 exposure_def);
1280
1281 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1282 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
1283 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
1284
1285 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1286 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
1287 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
1288
1289 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1290 V4L2_CID_HFLIP, 0, 1, 1, 0);
1291 if (imx219->hflip)
1292 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1293
1294 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1295 V4L2_CID_VFLIP, 0, 1, 1, 0);
1296 if (imx219->vflip)
1297 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1298
1299 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
1300 V4L2_CID_TEST_PATTERN,
1301 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
1302 0, 0, imx219_test_pattern_menu);
1303 for (i = 0; i < 4; i++) {
1304 /*
1305 * The assumption is that
1306 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1307 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
1308 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1309 */
1310 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1311 V4L2_CID_TEST_PATTERN_RED + i,
1312 IMX219_TESTP_COLOUR_MIN,
1313 IMX219_TESTP_COLOUR_MAX,
1314 IMX219_TESTP_COLOUR_STEP,
1315 IMX219_TESTP_COLOUR_MAX);
1316 /* The "Solid color" pattern is white by default */
1317 }
1318
1319 if (ctrl_hdlr->error) {
1320 ret = ctrl_hdlr->error;
1321 dev_err(&client->dev, "%s control init failed (%d)\n",
1322 __func__, ret);
1323 goto error;
1324 }
1325
1326 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1327 if (ret)
1328 goto error;
1329
1330 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
1331 &props);
1332 if (ret)
1333 goto error;
1334
1335 imx219->sd.ctrl_handler = ctrl_hdlr;
1336
1337 return 0;
1338
1339 error:
1340 v4l2_ctrl_handler_free(ctrl_hdlr);
1341 mutex_destroy(&imx219->mutex);
1342
1343 return ret;
1344 }
1345
imx219_free_controls(struct imx219 * imx219)1346 static void imx219_free_controls(struct imx219 *imx219)
1347 {
1348 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
1349 mutex_destroy(&imx219->mutex);
1350 }
1351
imx219_check_hwcfg(struct device * dev)1352 static int imx219_check_hwcfg(struct device *dev)
1353 {
1354 struct fwnode_handle *endpoint;
1355 struct v4l2_fwnode_endpoint ep_cfg = {
1356 .bus_type = V4L2_MBUS_CSI2_DPHY
1357 };
1358 int ret = -EINVAL;
1359
1360 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1361 if (!endpoint) {
1362 dev_err(dev, "endpoint node not found\n");
1363 return -EINVAL;
1364 }
1365
1366 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1367 dev_err(dev, "could not parse endpoint\n");
1368 goto error_out;
1369 }
1370
1371 /* Check the number of MIPI CSI2 data lanes */
1372 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1373 dev_err(dev, "only 2 data lanes are currently supported\n");
1374 goto error_out;
1375 }
1376
1377 /* Check the link frequency set in device tree */
1378 if (!ep_cfg.nr_of_link_frequencies) {
1379 dev_err(dev, "link-frequency property not found in DT\n");
1380 goto error_out;
1381 }
1382
1383 if (ep_cfg.nr_of_link_frequencies != 1 ||
1384 ep_cfg.link_frequencies[0] != IMX219_DEFAULT_LINK_FREQ) {
1385 dev_err(dev, "Link frequency not supported: %lld\n",
1386 ep_cfg.link_frequencies[0]);
1387 goto error_out;
1388 }
1389
1390 ret = 0;
1391
1392 error_out:
1393 v4l2_fwnode_endpoint_free(&ep_cfg);
1394 fwnode_handle_put(endpoint);
1395
1396 return ret;
1397 }
1398
imx219_probe(struct i2c_client * client)1399 static int imx219_probe(struct i2c_client *client)
1400 {
1401 struct device *dev = &client->dev;
1402 struct imx219 *imx219;
1403 int ret;
1404
1405 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1406 if (!imx219)
1407 return -ENOMEM;
1408
1409 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1410
1411 /* Check the hardware configuration in device tree */
1412 if (imx219_check_hwcfg(dev))
1413 return -EINVAL;
1414
1415 /* Get system clock (xclk) */
1416 imx219->xclk = devm_clk_get(dev, NULL);
1417 if (IS_ERR(imx219->xclk)) {
1418 dev_err(dev, "failed to get xclk\n");
1419 return PTR_ERR(imx219->xclk);
1420 }
1421
1422 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1423 if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1424 dev_err(dev, "xclk frequency not supported: %d Hz\n",
1425 imx219->xclk_freq);
1426 return -EINVAL;
1427 }
1428
1429 ret = imx219_get_regulators(imx219);
1430 if (ret) {
1431 dev_err(dev, "failed to get regulators\n");
1432 return ret;
1433 }
1434
1435 /* Request optional enable pin */
1436 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1437 GPIOD_OUT_HIGH);
1438
1439 /*
1440 * The sensor must be powered for imx219_identify_module()
1441 * to be able to read the CHIP_ID register
1442 */
1443 ret = imx219_power_on(dev);
1444 if (ret)
1445 return ret;
1446
1447 ret = imx219_identify_module(imx219);
1448 if (ret)
1449 goto error_power_off;
1450
1451 /* Set default mode to max resolution */
1452 imx219->mode = &supported_modes[0];
1453
1454 /* sensor doesn't enter LP-11 state upon power up until and unless
1455 * streaming is started, so upon power up switch the modes to:
1456 * streaming -> standby
1457 */
1458 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1459 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1460 if (ret < 0)
1461 goto error_power_off;
1462 usleep_range(100, 110);
1463
1464 /* put sensor back to standby mode */
1465 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1466 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1467 if (ret < 0)
1468 goto error_power_off;
1469 usleep_range(100, 110);
1470
1471 ret = imx219_init_controls(imx219);
1472 if (ret)
1473 goto error_power_off;
1474
1475 /* Initialize subdev */
1476 imx219->sd.internal_ops = &imx219_internal_ops;
1477 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1478 V4L2_SUBDEV_FL_HAS_EVENTS;
1479 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1480
1481 /* Initialize source pad */
1482 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1483
1484 /* Initialize default format */
1485 imx219_set_default_format(imx219);
1486
1487 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1488 if (ret) {
1489 dev_err(dev, "failed to init entity pads: %d\n", ret);
1490 goto error_handler_free;
1491 }
1492
1493 ret = v4l2_async_register_subdev_sensor(&imx219->sd);
1494 if (ret < 0) {
1495 dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1496 goto error_media_entity;
1497 }
1498
1499 /* Enable runtime PM and turn off the device */
1500 pm_runtime_set_active(dev);
1501 pm_runtime_enable(dev);
1502 pm_runtime_idle(dev);
1503
1504 return 0;
1505
1506 error_media_entity:
1507 media_entity_cleanup(&imx219->sd.entity);
1508
1509 error_handler_free:
1510 imx219_free_controls(imx219);
1511
1512 error_power_off:
1513 imx219_power_off(dev);
1514
1515 return ret;
1516 }
1517
imx219_remove(struct i2c_client * client)1518 static int imx219_remove(struct i2c_client *client)
1519 {
1520 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1521 struct imx219 *imx219 = to_imx219(sd);
1522
1523 v4l2_async_unregister_subdev(sd);
1524 media_entity_cleanup(&sd->entity);
1525 imx219_free_controls(imx219);
1526
1527 pm_runtime_disable(&client->dev);
1528 if (!pm_runtime_status_suspended(&client->dev))
1529 imx219_power_off(&client->dev);
1530 pm_runtime_set_suspended(&client->dev);
1531
1532 return 0;
1533 }
1534
1535 static const struct of_device_id imx219_dt_ids[] = {
1536 { .compatible = "sony,imx219" },
1537 { /* sentinel */ }
1538 };
1539 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1540
1541 static const struct dev_pm_ops imx219_pm_ops = {
1542 SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume)
1543 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1544 };
1545
1546 static struct i2c_driver imx219_i2c_driver = {
1547 .driver = {
1548 .name = "imx219",
1549 .of_match_table = imx219_dt_ids,
1550 .pm = &imx219_pm_ops,
1551 },
1552 .probe_new = imx219_probe,
1553 .remove = imx219_remove,
1554 };
1555
1556 module_i2c_driver(imx219_i2c_driver);
1557
1558 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1559 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1560 MODULE_LICENSE("GPL v2");
1561