/include/linux/platform_data/ |
D | gpmc-omap.h | 32 u32 sync_clk; 35 u32 cs_on; /* Assertion time */ 36 u32 cs_rd_off; /* Read deassertion time */ 37 u32 cs_wr_off; /* Write deassertion time */ 40 u32 adv_on; /* Assertion time */ 41 u32 adv_rd_off; /* Read deassertion time */ 42 u32 adv_wr_off; /* Write deassertion time */ 43 u32 adv_aad_mux_on; /* ADV assertion time for AAD */ 44 u32 adv_aad_mux_rd_off; /* ADV read deassertion time for AAD */ 45 u32 adv_aad_mux_wr_off; /* ADV write deassertion time for AAD */ [all …]
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D | emif_plat.h | 56 u32 type; 57 u32 density; 58 u32 io_width; 59 u32 cs1_used; 60 u32 cal_resistors_per_cs; 85 u32 mask; 86 u32 lpmode; 87 u32 lpmode_timeout_performance; 88 u32 lpmode_timeout_power; 89 u32 lpmode_freq_threshold; [all …]
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D | mlxreg.h | 63 u32 reg; 64 u32 mask; 65 u32 bit; 66 u32 capability; 67 u32 reg_prsnt; 71 u32 health_cntr; 92 u32 aggr_mask; 93 u32 reg; 94 u32 mask; 95 u32 capability; [all …]
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/include/linux/ |
D | switchtec.h | 48 u32 cmd; 49 u32 status; 50 u32 ret_value; 51 u32 dma_en; 53 u32 dma_vector; 54 u32 dma_ver; 69 u32 global_summary; 70 u32 reserved3[3]; 71 u32 stack_error_event_hdr; 72 u32 stack_error_event_data; [all …]
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D | psp-sev.h | 99 u32 flags; /* In */ 100 u32 reserved; /* In */ 102 u32 tmr_len; /* In */ 115 u32 len; /* In/Out */ 128 u32 pek_cert_len; /* In */ 129 u32 reserved; /* In */ 131 u32 oca_cert_len; /* In */ 142 u32 len; /* In */ 153 u32 len; /* In/Out */ 165 u32 pdh_cert_len; /* In/Out */ [all …]
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D | tcp.h | 74 u32 start_seq; 75 u32 end_seq; 85 u32 ts_recent; /* Time stamp to echo next */ 86 u32 rcv_tsval; /* Time stamp value */ 87 u32 rcv_tsecr; /* Time stamp echo reply */ 129 u32 txhash; 130 u32 rcv_isn; 131 u32 snt_isn; 132 u32 ts_off; 133 u32 last_oow_ack_time; /* last SYNACK */ [all …]
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D | qcom_scm.h | 18 u32 addr; 19 u32 val; 68 extern void qcom_scm_cpu_power_down(u32 flags); 69 extern int qcom_scm_set_remote_state(u32 state, u32 id); 71 extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, 73 extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, 75 extern int qcom_scm_pas_auth_and_reset(u32 peripheral); 76 extern int qcom_scm_pas_shutdown(u32 peripheral); 77 extern bool qcom_scm_pas_supported(u32 peripheral); 83 extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare); [all …]
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D | win_minmax.h | 13 u32 t; /* time measurement was taken */ 14 u32 v; /* value measured */ 22 static inline u32 minmax_get(const struct minmax *m) in minmax_get() 27 static inline u32 minmax_reset(struct minmax *m, u32 t, u32 meas) in minmax_reset() 35 u32 minmax_running_max(struct minmax *m, u32 win, u32 t, u32 meas); 36 u32 minmax_running_min(struct minmax *m, u32 win, u32 t, u32 meas);
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D | crc32.h | 11 u32 __pure crc32_le(u32 crc, unsigned char const *p, size_t len); 12 u32 __pure crc32_be(u32 crc, unsigned char const *p, size_t len); 32 u32 __attribute_const__ crc32_le_shift(u32 crc, size_t len); 34 static inline u32 crc32_le_combine(u32 crc1, u32 crc2, size_t len2) in crc32_le_combine() 39 u32 __pure __crc32c_le(u32 crc, unsigned char const *p, size_t len); 59 u32 __attribute_const__ __crc32c_le_shift(u32 crc, size_t len); 61 static inline u32 __crc32c_le_combine(u32 crc1, u32 crc2, size_t len2) in __crc32c_le_combine()
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D | jhash.h | 30 #define jhash_size(n) ((u32)1<<(n)) 70 static inline u32 jhash(const void *key, u32 length, u32 initval) in jhash() 72 u32 a, b, c; in jhash() 89 case 12: c += (u32)k[11]<<24; fallthrough; in jhash() 90 case 11: c += (u32)k[10]<<16; fallthrough; in jhash() 91 case 10: c += (u32)k[9]<<8; fallthrough; in jhash() 93 case 8: b += (u32)k[7]<<24; fallthrough; in jhash() 94 case 7: b += (u32)k[6]<<16; fallthrough; in jhash() 95 case 6: b += (u32)k[5]<<8; fallthrough; in jhash() 97 case 4: a += (u32)k[3]<<24; fallthrough; in jhash() [all …]
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D | visorbus.h | 102 u32 legacy_state; 104 u32 header_size; 111 u32 version_id; 112 u32 partition_index; 114 u32 cli_str_offset; 115 u32 cli_state_boot; 116 u32 cmd_state_cli; 117 u32 cli_state_os; 118 u32 ch_characteristic; 119 u32 cmd_state_srv; [all …]
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/include/linux/usb/ |
D | usb338x.h | 53 u32 usbclass; 57 u32 ss_sel; 60 u32 ss_del; 63 u32 usb2lpm; 67 u32 usb3belt; 70 u32 usbctl2; 78 u32 in_timeout; 91 u32 isodelay; 97 u32 ep_fifo_size_base; 102 u32 ep_fifo_out_wrptr; [all …]
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D | net2280.h | 41 u32 devinit; 51 u32 eectl; 62 u32 eeclkfreq; 63 u32 _unused0; 66 u32 pciirqenb0; /* interrupt PCI master ... */ 75 u32 pciirqenb1; 98 u32 cpu_irqenb0; /* ... or onboard 8051 */ 107 u32 cpu_irqenb1; 135 u32 _unused1; 136 u32 usbirqenb1; [all …]
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/include/linux/firmware/ |
D | xlnx-zynqmp.h | 362 u32 qid; 363 u32 arg1; 364 u32 arg2; 365 u32 arg3; 368 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, 369 u32 arg2, u32 arg3, u32 *ret_payload); 372 int zynqmp_pm_get_api_version(u32 *version); 373 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); 374 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); 375 int zynqmp_pm_clock_enable(u32 clock_id); [all …]
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/include/linux/mlx5/ |
D | transobj.h | 38 int mlx5_core_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn); 39 void mlx5_core_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn); 40 int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, 41 u32 *rqn); 42 int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in); 43 void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn); 44 int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out); 45 int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, 46 u32 *sqn); 47 int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in); [all …]
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/include/linux/ssb/ |
D | ssb_embedded.h | 9 extern int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks); 12 u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask); 13 u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value); 14 u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value); 15 u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value); 16 u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value); 17 u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
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D | ssb_driver_extif.h | 172 u32 *plltype, u32 *n, u32 *m); 177 extern u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks); 180 u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask); 181 u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value); 182 u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value); 183 u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value); 184 u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value); 205 u32 *plltype, u32 *n, u32 *m) in ssb_extif_get_clockcontrol() 215 u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks) in ssb_extif_watchdog_timer_set() 220 static inline u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask) in ssb_extif_gpio_in() [all …]
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/include/video/ |
D | kyro.h | 18 u32 palette[16]; 19 u32 HTot; /* Hor Total Time */ 20 u32 HFP; /* Hor Front Porch */ 21 u32 HST; /* Hor Sync Time */ 22 u32 HBP; /* Hor Back Porch */ 24 u32 VTot; /* Ver Total Time */ 25 u32 VFP; /* Ver Front Porch */ 26 u32 VST; /* Ver Sync Time */ 27 u32 VBP; /* Ver Back Porch */ 29 u32 XRES; /* X Resolution */ [all …]
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/include/linux/firmware/meson/ |
D | meson_sm.h | 22 u32 *ret, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4); 24 unsigned int b_size, unsigned int cmd_index, u32 arg0, 25 u32 arg1, u32 arg2, u32 arg3, u32 arg4); 27 unsigned int bsize, unsigned int cmd_index, u32 arg0, 28 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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/include/media/ |
D | tveeprom.h | 71 u32 has_radio; 72 u32 has_ir; 73 u32 has_MAC_address; 75 u32 tuner_type; 76 u32 tuner_formats; 77 u32 tuner_hauppauge_model; 79 u32 tuner2_type; 80 u32 tuner2_formats; 81 u32 tuner2_hauppauge_model; 83 u32 audio_processor; [all …]
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/include/linux/qed/ |
D | qed_iscsi_if.h | 18 u32 iscsi_cmdq_threshold_cnt; 19 u32 iscsi_rq_threshold_cnt; 20 u32 iscsi_immq_threshold_cnt; 50 u32 ip[4]; 57 u32 initial_ack; 68 u32 rcv_next; 69 u32 snd_una; 70 u32 snd_next; 71 u32 snd_max; 72 u32 snd_wnd; [all …]
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/include/linux/fsl/ |
D | ptp_qoriq.h | 17 u32 tmr_ctrl; /* Timer control register */ 18 u32 tmr_tevent; /* Timestamp event register */ 19 u32 tmr_temask; /* Timer event mask register */ 20 u32 tmr_pevent; /* Timestamp event register */ 21 u32 tmr_pemask; /* Timer event mask register */ 22 u32 tmr_stat; /* Timestamp status register */ 23 u32 tmr_cnt_h; /* Timer counter high register */ 24 u32 tmr_cnt_l; /* Timer counter low register */ 25 u32 tmr_add; /* Timer drift compensation addend register */ 26 u32 tmr_acc; /* Timer accumulator register */ [all …]
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D | guts.h | 29 u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ 30 u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ 31 u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and 34 u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */ 35 u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */ 36 u32 pordevsr2; /* 0x.0014 - POR device status register 2 */ 38 u32 porcir; /* 0x.0020 - POR Configuration Information 42 u32 gpiocr; /* 0x.0030 - GPIO Control Register */ 44 u32 gpoutdr; /* 0x.0040 - General-Purpose Output Data 48 u32 gpindr; /* 0x.0050 - General-Purpose Input Data [all …]
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/include/net/ |
D | fq.h | 31 u32 backlog; 49 u32 backlog_bytes; 50 u32 backlog_packets; 51 u32 overlimit; 52 u32 collisions; 53 u32 flows; 54 u32 tx_bytes; 55 u32 tx_packets; 70 u32 flows_cnt; 71 u32 limit; [all …]
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/include/acpi/ |
D | actbl2.h | 90 u32 node_specific_offset; 91 u32 node_interface_offset; 92 u32 node_interrupt_offset; 93 u32 node_interrupt_count; 115 u32 processor_id; 134 u32 cache_reference; 135 u32 reserved; 149 u32 tlb_level; 150 u32 reserved; 164 u32 srat_proximity_domain; [all …]
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