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Searched refs:CNTR (Results 1 – 11 of 11) sorted by relevance

/drivers/scsi/
Dgvp11.c31 unsigned int status = hdata->regs->CNTR; in gvp11_intr()
122 regs->CNTR = cntr; in dma_setup()
156 regs->CNTR = GVP11_DMAC_INT_ENABLE; in dma_stop()
314 while (regs->CNTR & GVP11_DMAC_BUSY) in gvp11_probe()
316 regs->CNTR = 0; in gvp11_probe()
346 regs->CNTR = GVP11_DMAC_INT_ENABLE; in gvp11_probe()
370 hdata->regs->CNTR = 0; in gvp11_remove()
Da2091.c88 regs->CNTR = cntr; in dma_setup()
121 regs->CNTR = cntr; in dma_stop()
137 regs->CNTR = CNTR_PDMD | CNTR_INTEN; in dma_stop()
205 regs->CNTR = CNTR_PDMD | CNTR_INTEN; in a2091_probe()
230 hdata->regs->CNTR = 0; in a2091_remove()
Da3000.c87 regs->CNTR = cntr; in dma_setup()
122 regs->CNTR = cntr; in dma_stop()
145 regs->CNTR = CNTR_PDMD | CNTR_INTEN; in dma_stop()
223 regs->CNTR = CNTR_PDMD | CNTR_INTEN; in amiga_a3000_scsi_probe()
249 hdata->regs->CNTR = 0; in amiga_a3000_scsi_remove()
Dgvp11.h31 volatile unsigned short CNTR; member
Da2091.h32 volatile unsigned short CNTR; member
Da3000.h34 volatile unsigned short CNTR; member
/drivers/dma/
Dtxx9dmac.h74 TXX9_DMA_REG32(CNTR); /* Count Register */
84 u32 CNTR; member
208 TXX9_DMA_REG32(CNTR);
214 u32 CNTR; member
Dtxx9dmac.c292 channel64_readl(dc, CNTR), in txx9dmac_dump_regs()
304 channel32_readl(dc, CNTR), in txx9dmac_dump_regs()
323 channel_writel(dc, CNTR, 0); in txx9dmac_reset_chan()
348 channel64_writel(dc, CNTR, 0); in txx9dmac_dostart()
369 channel32_writel(dc, CNTR, 0); in txx9dmac_dostart()
474 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
479 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
487 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
492 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
757 desc->hwdesc.CNTR = xfer_count; in txx9dmac_prep_dma_memcpy()
[all …]
/drivers/infiniband/hw/hfi1/
Dtrace_dbg.h82 __hfi1_trace_def(CNTR);
Dchip.c1364 hfi1_cdbg(CNTR, "csr 0x%x val 0x%llx mode %d", csr, ret, mode); in read_write_csr()
1467 hfi1_cdbg(CNTR, "csr 0x%x val 0x%llx mode %d", csr, data, mode); in dc_access_lcb_cntr()
1517 hfi1_cdbg(CNTR, "val 0x%llx mode %d", ret, mode); in read_write_sw()
12204 hfi1_cdbg(CNTR, "reading %s", entry->name); in hfi1_read_cntrs()
12207 hfi1_cdbg(CNTR, "\tDisabled\n"); in hfi1_read_cntrs()
12210 hfi1_cdbg(CNTR, "\tPer VL\n"); in hfi1_read_cntrs()
12217 CNTR, in hfi1_read_cntrs()
12224 hfi1_cdbg(CNTR, in hfi1_read_cntrs()
12231 hfi1_cdbg(CNTR, in hfi1_read_cntrs()
12242 hfi1_cdbg(CNTR, "\tRead 0x%llx", val); in hfi1_read_cntrs()
[all …]
Dtrace.c525 __hfi1_trace_fn(CNTR);