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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
4  *
5  * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
6  */
7 
8 /dts-v1/;
9 
10 #include "am33xx.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 
13 / {
14 	model = "CompuLab CM-T335";
15 	compatible = "compulab,cm-t335", "ti,am33xx";
16 
17 	memory@80000000 {
18 		device_type = "memory";
19 		reg = <0x80000000 0x8000000>;	/* 128 MB */
20 	};
21 
22 	leds {
23 		compatible = "gpio-leds";
24 		pinctrl-names = "default";
25 		pinctrl-0 = <&gpio_led_pins>;
26 		led0 {
27 			label = "cm_t335:green";
28 			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;	/* gpio2_0 */
29 			linux,default-trigger = "heartbeat";
30 		};
31 	};
32 
33 	/* regulator for mmc */
34 	vmmc_fixed: fixedregulator0 {
35 		compatible = "regulator-fixed";
36 		regulator-name = "vmmc_fixed";
37 		regulator-min-microvolt = <3300000>;
38 		regulator-max-microvolt = <3300000>;
39 	};
40 
41 	/* Regulator for WiFi */
42 	vwlan_fixed: fixedregulator2 {
43 		compatible = "regulator-fixed";
44 		regulator-name = "vwlan_fixed";
45 		gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
46 		enable-active-high;
47 	};
48 
49 	backlight {
50 		compatible = "pwm-backlight";
51 		pwms = <&ecap0 0 50000 0>;
52 		brightness-levels = <0 51 53 56 62 75 101 152 255>;
53 		default-brightness-level = <8>;
54 	};
55 
56 	sound {
57 		compatible = "simple-audio-card";
58 		simple-audio-card,name = "cm-t335";
59 
60 		simple-audio-card,widgets =
61 			"Microphone", "Mic Jack",
62 			"Line", "Line In",
63 			"Headphone", "Headphone Jack";
64 
65 		simple-audio-card,routing =
66 			"Headphone Jack", "LHPOUT",
67 			"Headphone Jack", "RHPOUT",
68 			"LLINEIN", "Line In",
69 			"RLINEIN", "Line In",
70 			"MICIN", "Mic Jack";
71 
72 		simple-audio-card,format = "i2s";
73 		simple-audio-card,bitclock-master = <&sound_master>;
74 		simple-audio-card,frame-master = <&sound_master>;
75 
76 		simple-audio-card,cpu {
77 			sound-dai = <&mcasp1>;
78 		};
79 
80 		sound_master: simple-audio-card,codec {
81 			sound-dai = <&tlv320aic23>;
82 			system-clock-frequency = <12000000>;
83 		};
84 	};
85 };
86 
87 &am33xx_pinmux {
88 	pinctrl-names = "default";
89 	pinctrl-0 = <&bluetooth_pins>;
90 
91 	i2c0_pins: pinmux_i2c0_pins {
92 		pinctrl-single,pins = <
93 			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
94 			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
95 		>;
96 	};
97 
98 	i2c1_pins: pinmux_i2c1_pins {
99 		pinctrl-single,pins = <
100 			/* uart0_ctsn.i2c1_sda */
101 			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2)
102 			/* uart0_rtsn.i2c1_scl */
103 			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
104 		>;
105 	};
106 
107 	gpio_led_pins: pinmux_gpio_led_pins {
108 		pinctrl-single,pins = <
109 			/* gpmc_csn3.gpio2_0 */
110 			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7)
111 		>;
112 	};
113 
114 	nandflash_pins: pinmux_nandflash_pins {
115 		pinctrl-single,pins = <
116 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
117 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
118 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
119 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
120 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
121 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
122 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
123 			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
124 			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
125 			/* gpmc_wpn.gpio0_31 */
126 			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
127 			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
128 			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
129 			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
130 			AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
131 			AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
132 		>;
133 	};
134 
135 	uart0_pins: pinmux_uart0_pins {
136 		pinctrl-single,pins = <
137 			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
138 			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
139 		>;
140 	};
141 
142 	uart1_pins: pinmux_uart1_pins {
143 		pinctrl-single,pins = <
144 			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
145 			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
146 			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
147 			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
148 		>;
149 	};
150 
151 	dcan0_pins: pinmux_dcan0_pins {
152 		pinctrl-single,pins = <
153 			/* uart1_ctsn.dcan0_tx */
154 			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)
155 			/* uart1_rtsn.dcan0_rx */
156 			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2)
157 		>;
158 	};
159 
160 	dcan1_pins: pinmux_dcan1_pins {
161 		pinctrl-single,pins = <
162 			/* uart1_rxd.dcan1_tx */
163 			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2)
164 			/* uart1_txd.dcan1_rx */
165 			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2)
166 		>;
167 	};
168 
169 	ecap0_pins: pinmux_ecap0_pins {
170 		pinctrl-single,pins = <
171 			AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
172 		>;
173 	};
174 
175 	cpsw_default: cpsw_default {
176 		pinctrl-single,pins = <
177 			/* Slave 1 */
178 			/* mii1_tx_en.rgmii1_tctl */
179 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
180 			/* mii1_rxdv.rgmii1_rctl */
181 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
182 			/* mii1_txd3.rgmii1_td3 */
183 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
184 			/* mii1_txd2.rgmii1_td2 */
185 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
186 			/* mii1_txd1.rgmii1_td1 */
187 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
188 			/* mii1_txd0.rgmii1_td0 */
189 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
190 			/* mii1_txclk.rgmii1_tclk */
191 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
192 			/* mii1_rxclk.rgmii1_rclk */
193 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
194 			/* mii1_rxd3.rgmii1_rd3 */
195 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
196 			/* mii1_rxd2.rgmii1_rd2 */
197 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
198 			/* mii1_rxd1.rgmii1_rd1 */
199 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
200 			/* mii1_rxd0.rgmii1_rd0 */
201 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
202 		>;
203 	};
204 
205 	cpsw_sleep: cpsw_sleep {
206 		pinctrl-single,pins = <
207 			/* Slave 1 reset value */
208 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
209 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
210 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
211 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
212 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
213 			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
214 			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
215 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
216 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
217 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
218 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
219 			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
220 		>;
221 	};
222 
223 	davinci_mdio_default: davinci_mdio_default {
224 		pinctrl-single,pins = <
225 			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
226 			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
227 		>;
228 	};
229 
230 	davinci_mdio_sleep: davinci_mdio_sleep {
231 		pinctrl-single,pins = <
232 			/* MDIO reset value */
233 			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
234 			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
235 		>;
236 	};
237 
238 	mmc1_pins: pinmux_mmc1_pins {
239 		pinctrl-single,pins = <
240 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
241 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
242 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
243 			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
244 			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
245 			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
246 		>;
247 	};
248 
249 	spi0_pins: pinmux_spi0_pins {
250 		pinctrl-single,pins = <
251 			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
252 			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
253 			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
254 			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE0)
255 			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_OUTPUT, MUX_MODE0)
256 		>;
257 	};
258 
259 	/* wl1271 bluetooth */
260 	bluetooth_pins: pinmux_bluetooth_pins {
261 		pinctrl-single,pins = <
262 			/* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
263 			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
264 		>;
265 	};
266 
267 	/* TLV320AIC23B codec */
268 	mcasp1_pins: pinmux_mcasp1_pins {
269 		pinctrl-single,pins = <
270 			/* MII1_CRS.mcasp1_aclkx */
271 			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4)
272 			/* MII1_RX_ER.mcasp1_fsx */
273 			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4)
274 			/* MII1_COL.mcasp1_axr2 */
275 			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE4)
276 			/* RMII1_REF_CLK.mcasp1_axr3 */
277 			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4)
278 		>;
279 	};
280 
281 	/* wl1271 WiFi */
282 	wifi_pins: pinmux_wifi_pins {
283 		pinctrl-single,pins = <
284 			/* EMU1.gpio3_8 - WiFi IRQ */
285 			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)
286 			/* XDMA_EVENT_INTR1.gpio0_20 - WiFi enable */
287 			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7)
288 		>;
289 	};
290 };
291 
292 &uart0 {
293 	pinctrl-names = "default";
294 	pinctrl-0 = <&uart0_pins>;
295 
296 	status = "okay";
297 };
298 
299 /* WLS1271 bluetooth */
300 &uart1 {
301 	pinctrl-names = "default";
302 	pinctrl-0 = <&uart1_pins>;
303 
304 status = "okay";
305 };
306 
307 &i2c0 {
308 	pinctrl-names = "default";
309 	pinctrl-0 = <&i2c0_pins>;
310 
311 	status = "okay";
312 	clock-frequency = <400000>;
313 	/* CM-T335 board EEPROM */
314 	eeprom: 24c02@50 {
315 		compatible = "atmel,24c02";
316 		reg = <0x50>;
317 		pagesize = <16>;
318 	};
319 	/* Real Time Clock */
320 	ext_rtc: em3027@56 {
321 		compatible = "emmicro,em3027";
322 		reg = <0x56>;
323 	};
324 	/* Audio codec */
325 	tlv320aic23: codec@1a {
326 		compatible = "ti,tlv320aic23";
327 		reg = <0x1a>;
328 		#sound-dai-cells= <0>;
329 		status = "okay";
330 	};
331 };
332 
333 &epwmss0 {
334 	status = "okay";
335 
336 	ecap0: pwm@100 {
337 		status = "okay";
338 		pinctrl-names = "default";
339 		pinctrl-0 = <&ecap0_pins>;
340 	};
341 };
342 
343 &gpmc {
344 	status = "okay";
345 	pinctrl-names = "default";
346 	pinctrl-0 = <&nandflash_pins>;
347 	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
348 	nand@0,0 {
349 		compatible = "ti,omap2-nand";
350 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
351 		interrupt-parent = <&gpmc>;
352 		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
353 			     <1 IRQ_TYPE_NONE>;	/* termcount */
354 		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
355 		ti,nand-ecc-opt = "bch8";
356 		ti,elm-id = <&elm>;
357 		nand-bus-width = <8>;
358 		gpmc,device-width = <1>;
359 		gpmc,sync-clk-ps = <0>;
360 		gpmc,cs-on-ns = <0>;
361 		gpmc,cs-rd-off-ns = <44>;
362 		gpmc,cs-wr-off-ns = <44>;
363 		gpmc,adv-on-ns = <6>;
364 		gpmc,adv-rd-off-ns = <34>;
365 		gpmc,adv-wr-off-ns = <44>;
366 		gpmc,we-on-ns = <0>;
367 		gpmc,we-off-ns = <40>;
368 		gpmc,oe-on-ns = <0>;
369 		gpmc,oe-off-ns = <54>;
370 		gpmc,access-ns = <64>;
371 		gpmc,rd-cycle-ns = <82>;
372 		gpmc,wr-cycle-ns = <82>;
373 		gpmc,bus-turnaround-ns = <0>;
374 		gpmc,cycle2cycle-delay-ns = <0>;
375 		gpmc,clk-activation-ns = <0>;
376 		gpmc,wr-access-ns = <40>;
377 		gpmc,wr-data-mux-bus-ns = <0>;
378 		/* MTD partition table */
379 		#address-cells = <1>;
380 		#size-cells = <1>;
381 		partition@0 {
382 			label = "spl";
383 			reg = <0x00000000 0x00200000>;
384 		};
385 		partition@1 {
386 			label = "uboot";
387 			reg = <0x00200000 0x00100000>;
388 		};
389 		partition@2 {
390 			label = "uboot environment";
391 			reg = <0x00300000 0x00100000>;
392 		};
393 		partition@3 {
394 			label = "dtb";
395 			reg = <0x00400000 0x00100000>;
396 		};
397 		partition@4 {
398 			label = "splash";
399 			reg = <0x00500000 0x00400000>;
400 		};
401 		partition@5 {
402 			label = "linux";
403 			reg = <0x00900000 0x00600000>;
404 		};
405 		partition@6 {
406 			label = "rootfs";
407 			reg = <0x00F00000 0>;
408 		};
409 	};
410 };
411 
412 &elm {
413 	status = "okay";
414 };
415 
416 &mac_sw {
417 	pinctrl-names = "default", "sleep";
418 	pinctrl-0 = <&cpsw_default>;
419 	pinctrl-1 = <&cpsw_sleep>;
420 	status = "okay";
421 };
422 
423 &davinci_mdio_sw {
424 	pinctrl-names = "default", "sleep";
425 	pinctrl-0 = <&davinci_mdio_default>;
426 	pinctrl-1 = <&davinci_mdio_sleep>;
427 
428 	ethphy0: ethernet-phy@0 {
429 		reg = <0>;
430 	};
431 };
432 
433 &cpsw_port1 {
434 	phy-handle = <&ethphy0>;
435 	phy-mode = "rgmii-txid";
436 	ti,dual-emac-pvid = <1>;
437 };
438 
439 &cpsw_port2 {
440 	status = "disabled";
441 };
442 
443 &mmc1 {
444 	status = "okay";
445 	vmmc-supply = <&vmmc_fixed>;
446 	bus-width = <4>;
447 	pinctrl-names = "default";
448 	pinctrl-0 = <&mmc1_pins>;
449 };
450 
451 &dcan0 {
452 	status = "okay";
453 	pinctrl-names = "default";
454 	pinctrl-0 = <&dcan0_pins>;
455 };
456 
457 &dcan1 {
458 	status = "okay";
459 	pinctrl-names = "default";
460 	pinctrl-0 = <&dcan1_pins>;
461 };
462 
463 /* Touschscreen and analog digital converter */
464 &tscadc {
465 	status = "okay";
466 	tsc {
467 		ti,wires = <4>;
468 		ti,x-plate-resistance = <200>;
469 		ti,coordinate-readouts = <5>;
470 		ti,wire-config = <0x01 0x10 0x23 0x32>;
471 		ti,charge-delay = <0x400>;
472 	};
473 
474 	adc {
475 		ti,adc-channels = <4 5 6 7>;
476 	};
477 };
478 
479 /* CPU audio */
480 &mcasp1 {
481 		pinctrl-names = "default";
482 		pinctrl-0 = <&mcasp1_pins>;
483 
484 		op-mode = <0>;          /* MCASP_IIS_MODE */
485 		tdm-slots = <2>;
486 		/* 16 serializers */
487 		num-serializer = <16>;
488 		serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
489 			0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0
490 		>;
491 		tx-num-evt = <1>;
492 		rx-num-evt = <1>;
493 
494 		#sound-dai-cells= <0>;
495 		status = "okay";
496 };
497 
498 &spi0 {
499 	status = "okay";
500 	pinctrl-names = "default";
501 	pinctrl-0 = <&spi0_pins>;
502 	ti,pindir-d0-out-d1-in;
503 	/* WLS1271 WiFi */
504 	wlcore: wlcore@1 {
505 		compatible = "ti,wl1271";
506 		pinctrl-names = "default";
507 		pinctrl-0 = <&wifi_pins>;
508 		reg = <1>;
509 		spi-max-frequency = <48000000>;
510 		clock-xtal;
511 		ref-clock-frequency = <38400000>;
512 		interrupt-parent = <&gpio3>;
513 		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
514 		vwlan-supply = <&vwlan_fixed>;
515 	};
516 };
517