1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/sound/qcom,q6afe.h> 12#include <dt-bindings/sound/qcom,q6asm.h> 13#include "sdm845.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16 17/ { 18 model = "Thundercomm Dragonboard 845c"; 19 compatible = "thundercomm,db845c", "qcom,sdm845"; 20 qcom,msm-id = <341 0x20001>; 21 qcom,board-id = <8 0>; 22 23 aliases { 24 serial0 = &uart9; 25 hsuart0 = &uart6; 26 }; 27 28 chosen { 29 stdout-path = "serial0:115200n8"; 30 }; 31 32 dc12v: dc12v-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "DC12V"; 35 regulator-min-microvolt = <12000000>; 36 regulator-max-microvolt = <12000000>; 37 regulator-always-on; 38 }; 39 40 gpio_keys { 41 compatible = "gpio-keys"; 42 autorepeat; 43 44 pinctrl-names = "default"; 45 pinctrl-0 = <&vol_up_pin_a>; 46 47 vol-up { 48 label = "Volume Up"; 49 linux,code = <KEY_VOLUMEUP>; 50 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 51 }; 52 }; 53 54 leds { 55 compatible = "gpio-leds"; 56 57 user4 { 58 label = "green:user4"; 59 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; 60 default-state = "off"; 61 panic-indicator; 62 }; 63 64 wlan { 65 label = "yellow:wlan"; 66 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; 67 linux,default-trigger = "phy0tx"; 68 default-state = "off"; 69 }; 70 71 bt { 72 label = "blue:bt"; 73 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; 74 linux,default-trigger = "bluetooth-power"; 75 default-state = "off"; 76 }; 77 }; 78 79 hdmi-out { 80 compatible = "hdmi-connector"; 81 type = "a"; 82 83 port { 84 hdmi_con: endpoint { 85 remote-endpoint = <<9611_out>; 86 }; 87 }; 88 }; 89 90 lt9611_1v8: lt9611-vdd18-regulator { 91 compatible = "regulator-fixed"; 92 regulator-name = "LT9611_1V8"; 93 94 vin-supply = <&vdc_5v>; 95 regulator-min-microvolt = <1800000>; 96 regulator-max-microvolt = <1800000>; 97 98 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 99 enable-active-high; 100 }; 101 102 lt9611_3v3: lt9611-3v3 { 103 compatible = "regulator-fixed"; 104 regulator-name = "LT9611_3V3"; 105 106 vin-supply = <&vdc_3v3>; 107 regulator-min-microvolt = <3300000>; 108 regulator-max-microvolt = <3300000>; 109 110 // TODO: make it possible to drive same GPIO from two clients 111 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 112 // enable-active-high; 113 }; 114 115 pcie0_1p05v: pcie-0-1p05v-regulator { 116 compatible = "regulator-fixed"; 117 regulator-name = "PCIE0_1.05V"; 118 119 vin-supply = <&vbat>; 120 regulator-min-microvolt = <1050000>; 121 regulator-max-microvolt = <1050000>; 122 123 // TODO: make it possible to drive same GPIO from two clients 124 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 125 // enable-active-high; 126 }; 127 128 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { 129 compatible = "regulator-fixed"; 130 regulator-name = "CAM0_DVDD_1V2"; 131 regulator-min-microvolt = <1200000>; 132 regulator-max-microvolt = <1200000>; 133 enable-active-high; 134 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; 135 pinctrl-names = "default"; 136 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 137 vin-supply = <&vbat>; 138 }; 139 140 cam0_avdd_2v8: reg_cam0_avdd_2v8 { 141 compatible = "regulator-fixed"; 142 regulator-name = "CAM0_AVDD_2V8"; 143 regulator-min-microvolt = <2800000>; 144 regulator-max-microvolt = <2800000>; 145 enable-active-high; 146 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; 147 pinctrl-names = "default"; 148 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 149 vin-supply = <&vbat>; 150 }; 151 152 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 153 cam3_avdd_2v8: reg_cam3_avdd_2v8 { 154 compatible = "regulator-fixed"; 155 regulator-name = "CAM3_AVDD_2V8"; 156 regulator-min-microvolt = <2800000>; 157 regulator-max-microvolt = <2800000>; 158 regulator-always-on; 159 vin-supply = <&vbat>; 160 }; 161 162 pcie0_3p3v_dual: vldo-3v3-regulator { 163 compatible = "regulator-fixed"; 164 regulator-name = "VLDO_3V3"; 165 166 vin-supply = <&vbat>; 167 regulator-min-microvolt = <3300000>; 168 regulator-max-microvolt = <3300000>; 169 170 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 171 enable-active-high; 172 173 pinctrl-names = "default"; 174 pinctrl-0 = <&pcie0_pwren_state>; 175 }; 176 177 v5p0_hdmiout: v5p0-hdmiout-regulator { 178 compatible = "regulator-fixed"; 179 regulator-name = "V5P0_HDMIOUT"; 180 181 vin-supply = <&vdc_5v>; 182 regulator-min-microvolt = <500000>; 183 regulator-max-microvolt = <500000>; 184 185 // TODO: make it possible to drive same GPIO from two clients 186 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 187 // enable-active-high; 188 }; 189 190 vbat: vbat-regulator { 191 compatible = "regulator-fixed"; 192 regulator-name = "VBAT"; 193 194 vin-supply = <&dc12v>; 195 regulator-min-microvolt = <4200000>; 196 regulator-max-microvolt = <4200000>; 197 regulator-always-on; 198 }; 199 200 vbat_som: vbat-som-regulator { 201 compatible = "regulator-fixed"; 202 regulator-name = "VBAT_SOM"; 203 204 vin-supply = <&dc12v>; 205 regulator-min-microvolt = <4200000>; 206 regulator-max-microvolt = <4200000>; 207 regulator-always-on; 208 }; 209 210 vdc_3v3: vdc-3v3-regulator { 211 compatible = "regulator-fixed"; 212 regulator-name = "VDC_3V3"; 213 vin-supply = <&dc12v>; 214 regulator-min-microvolt = <3300000>; 215 regulator-max-microvolt = <3300000>; 216 regulator-always-on; 217 }; 218 219 vdc_5v: vdc-5v-regulator { 220 compatible = "regulator-fixed"; 221 regulator-name = "VDC_5V"; 222 223 vin-supply = <&dc12v>; 224 regulator-min-microvolt = <500000>; 225 regulator-max-microvolt = <500000>; 226 regulator-always-on; 227 }; 228 229 vreg_s4a_1p8: vreg-s4a-1p8 { 230 compatible = "regulator-fixed"; 231 regulator-name = "vreg_s4a_1p8"; 232 233 regulator-min-microvolt = <1800000>; 234 regulator-max-microvolt = <1800000>; 235 regulator-always-on; 236 }; 237 238 vph_pwr: vph-pwr-regulator { 239 compatible = "regulator-fixed"; 240 regulator-name = "vph_pwr"; 241 242 vin-supply = <&vbat_som>; 243 }; 244}; 245 246&adsp_pas { 247 status = "okay"; 248 249 firmware-name = "qcom/sdm845/adsp.mbn"; 250}; 251 252&apps_rsc { 253 pm8998-rpmh-regulators { 254 compatible = "qcom,pm8998-rpmh-regulators"; 255 qcom,pmic-id = "a"; 256 vdd-s1-supply = <&vph_pwr>; 257 vdd-s2-supply = <&vph_pwr>; 258 vdd-s3-supply = <&vph_pwr>; 259 vdd-s4-supply = <&vph_pwr>; 260 vdd-s5-supply = <&vph_pwr>; 261 vdd-s6-supply = <&vph_pwr>; 262 vdd-s7-supply = <&vph_pwr>; 263 vdd-s8-supply = <&vph_pwr>; 264 vdd-s9-supply = <&vph_pwr>; 265 vdd-s10-supply = <&vph_pwr>; 266 vdd-s11-supply = <&vph_pwr>; 267 vdd-s12-supply = <&vph_pwr>; 268 vdd-s13-supply = <&vph_pwr>; 269 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 270 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 271 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 272 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 273 vdd-l6-supply = <&vph_pwr>; 274 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 275 vdd-l9-supply = <&vreg_bob>; 276 vdd-l10-l23-l25-supply = <&vreg_bob>; 277 vdd-l13-l19-l21-supply = <&vreg_bob>; 278 vdd-l16-l28-supply = <&vreg_bob>; 279 vdd-l18-l22-supply = <&vreg_bob>; 280 vdd-l20-l24-supply = <&vreg_bob>; 281 vdd-l26-supply = <&vreg_s3a_1p35>; 282 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 283 284 vreg_s3a_1p35: smps3 { 285 regulator-min-microvolt = <1352000>; 286 regulator-max-microvolt = <1352000>; 287 }; 288 289 vreg_s5a_2p04: smps5 { 290 regulator-min-microvolt = <1904000>; 291 regulator-max-microvolt = <2040000>; 292 }; 293 294 vreg_s7a_1p025: smps7 { 295 regulator-min-microvolt = <900000>; 296 regulator-max-microvolt = <1028000>; 297 }; 298 299 vreg_l1a_0p875: ldo1 { 300 regulator-min-microvolt = <880000>; 301 regulator-max-microvolt = <880000>; 302 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 303 }; 304 305 vreg_l5a_0p8: ldo5 { 306 regulator-min-microvolt = <800000>; 307 regulator-max-microvolt = <800000>; 308 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 309 }; 310 311 vreg_l12a_1p8: ldo12 { 312 regulator-min-microvolt = <1800000>; 313 regulator-max-microvolt = <1800000>; 314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 315 }; 316 317 vreg_l7a_1p8: ldo7 { 318 regulator-min-microvolt = <1800000>; 319 regulator-max-microvolt = <1800000>; 320 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 321 }; 322 323 vreg_l13a_2p95: ldo13 { 324 regulator-min-microvolt = <1800000>; 325 regulator-max-microvolt = <2960000>; 326 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 327 }; 328 329 vreg_l17a_1p3: ldo17 { 330 regulator-min-microvolt = <1304000>; 331 regulator-max-microvolt = <1304000>; 332 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 333 }; 334 335 vreg_l20a_2p95: ldo20 { 336 regulator-min-microvolt = <2960000>; 337 regulator-max-microvolt = <2968000>; 338 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 339 }; 340 341 vreg_l21a_2p95: ldo21 { 342 regulator-min-microvolt = <2960000>; 343 regulator-max-microvolt = <2968000>; 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 345 }; 346 347 vreg_l24a_3p075: ldo24 { 348 regulator-min-microvolt = <3088000>; 349 regulator-max-microvolt = <3088000>; 350 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 351 }; 352 353 vreg_l25a_3p3: ldo25 { 354 regulator-min-microvolt = <3300000>; 355 regulator-max-microvolt = <3312000>; 356 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 357 }; 358 359 vreg_l26a_1p2: ldo26 { 360 regulator-min-microvolt = <1200000>; 361 regulator-max-microvolt = <1200000>; 362 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 363 }; 364 365 vreg_lvs1a_1p8: lvs1 { 366 regulator-min-microvolt = <1800000>; 367 regulator-max-microvolt = <1800000>; 368 regulator-always-on; 369 }; 370 371 vreg_lvs2a_1p8: lvs2 { 372 regulator-min-microvolt = <1800000>; 373 regulator-max-microvolt = <1800000>; 374 regulator-always-on; 375 }; 376 }; 377 378 pmi8998-rpmh-regulators { 379 compatible = "qcom,pmi8998-rpmh-regulators"; 380 qcom,pmic-id = "b"; 381 382 vdd-bob-supply = <&vph_pwr>; 383 384 vreg_bob: bob { 385 regulator-min-microvolt = <3312000>; 386 regulator-max-microvolt = <3600000>; 387 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 388 regulator-allow-bypass; 389 }; 390 }; 391}; 392 393&cdsp_pas { 394 status = "okay"; 395 firmware-name = "qcom/sdm845/cdsp.mbn"; 396}; 397 398&dsi0 { 399 status = "okay"; 400 vdda-supply = <&vreg_l26a_1p2>; 401 402 ports { 403 port@1 { 404 endpoint { 405 remote-endpoint = <<9611_a>; 406 data-lanes = <0 1 2 3>; 407 }; 408 }; 409 }; 410}; 411 412&dsi0_phy { 413 status = "okay"; 414 vdds-supply = <&vreg_l1a_0p875>; 415}; 416 417&gcc { 418 protected-clocks = <GCC_QSPI_CORE_CLK>, 419 <GCC_QSPI_CORE_CLK_SRC>, 420 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 421 <GCC_LPASS_Q6_AXI_CLK>, 422 <GCC_LPASS_SWAY_CLK>; 423}; 424 425&gpu { 426 zap-shader { 427 memory-region = <&gpu_mem>; 428 firmware-name = "qcom/sdm845/a630_zap.mbn"; 429 }; 430}; 431 432&i2c10 { 433 status = "okay"; 434 clock-frequency = <400000>; 435 436 lt9611_codec: hdmi-bridge@3b { 437 compatible = "lontium,lt9611"; 438 reg = <0x3b>; 439 #sound-dai-cells = <1>; 440 441 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 442 443 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 444 445 vdd-supply = <<9611_1v8>; 446 vcc-supply = <<9611_3v3>; 447 448 pinctrl-names = "default"; 449 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 450 451 ports { 452 #address-cells = <1>; 453 #size-cells = <0>; 454 455 port@0 { 456 reg = <0>; 457 458 lt9611_a: endpoint { 459 remote-endpoint = <&dsi0_out>; 460 }; 461 }; 462 463 port@2 { 464 reg = <2>; 465 466 lt9611_out: endpoint { 467 remote-endpoint = <&hdmi_con>; 468 }; 469 }; 470 }; 471 }; 472}; 473 474&i2c11 { 475 /* On Low speed expansion */ 476 label = "LS-I2C1"; 477 status = "okay"; 478}; 479 480&i2c14 { 481 /* On Low speed expansion */ 482 label = "LS-I2C0"; 483 status = "okay"; 484}; 485 486&mdss { 487 status = "okay"; 488}; 489 490&mdss_mdp { 491 status = "okay"; 492}; 493 494&mss_pil { 495 status = "okay"; 496 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 497}; 498 499&pcie0 { 500 status = "okay"; 501 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; 502 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; 503 504 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 505 506 pinctrl-names = "default"; 507 pinctrl-0 = <&pcie0_default_state>; 508}; 509 510&pcie0_phy { 511 status = "okay"; 512 513 vdda-phy-supply = <&vreg_l1a_0p875>; 514 vdda-pll-supply = <&vreg_l26a_1p2>; 515}; 516 517&pcie1 { 518 status = "okay"; 519 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; 520 521 pinctrl-names = "default"; 522 pinctrl-0 = <&pcie1_default_state>; 523}; 524 525&pcie1_phy { 526 status = "okay"; 527 528 vdda-phy-supply = <&vreg_l1a_0p875>; 529 vdda-pll-supply = <&vreg_l26a_1p2>; 530}; 531 532&pm8998_gpio { 533 gpio-line-names = 534 "NC", 535 "NC", 536 "WLAN_SW_CTRL", 537 "NC", 538 "PM_GPIO5_BLUE_BT_LED", 539 "VOL_UP_N", 540 "NC", 541 "ADC_IN1", 542 "PM_GPIO9_YEL_WIFI_LED", 543 "CAM0_AVDD_EN", 544 "NC", 545 "CAM0_DVDD_EN", 546 "PM_GPIO13_GREEN_U4_LED", 547 "DIV_CLK2", 548 "NC", 549 "NC", 550 "NC", 551 "SMB_STAT", 552 "NC", 553 "NC", 554 "ADC_IN2", 555 "OPTION1", 556 "WCSS_PWR_REQ", 557 "PM845_GPIO24", 558 "OPTION2", 559 "PM845_SLB"; 560 561 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { 562 pins = "gpio12"; 563 function = "normal"; 564 565 bias-pull-up; 566 drive-push-pull; 567 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 568 }; 569 570 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { 571 pins = "gpio10"; 572 function = "normal"; 573 574 bias-pull-up; 575 drive-push-pull; 576 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 577 }; 578 579 vol_up_pin_a: vol-up-active { 580 pins = "gpio6"; 581 function = "normal"; 582 input-enable; 583 bias-pull-up; 584 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 585 }; 586}; 587 588&pm8998_pon { 589 resin { 590 compatible = "qcom,pm8941-resin"; 591 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 592 debounce = <15625>; 593 bias-pull-up; 594 linux,code = <KEY_VOLUMEDOWN>; 595 }; 596}; 597 598/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 599&q6afedai { 600 qi2s@22 { 601 reg = <22>; 602 qcom,sd-lines = <0 1 2 3>; 603 }; 604}; 605 606&q6asmdai { 607 dai@0 { 608 reg = <0>; 609 }; 610 611 dai@1 { 612 reg = <1>; 613 }; 614 615 dai@2 { 616 reg = <2>; 617 }; 618 619 dai@3 { 620 reg = <3>; 621 direction = <2>; 622 is-compress-dai; 623 }; 624}; 625 626&qupv3_id_0 { 627 status = "okay"; 628}; 629 630&qupv3_id_1 { 631 status = "okay"; 632}; 633 634&sdhc_2 { 635 status = "okay"; 636 637 pinctrl-names = "default"; 638 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 639 640 vmmc-supply = <&vreg_l21a_2p95>; 641 vqmmc-supply = <&vreg_l13a_2p95>; 642 643 bus-width = <4>; 644 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 645}; 646 647&sound { 648 compatible = "qcom,db845c-sndcard"; 649 pinctrl-0 = <&quat_mi2s_active 650 &quat_mi2s_sd0_active 651 &quat_mi2s_sd1_active 652 &quat_mi2s_sd2_active 653 &quat_mi2s_sd3_active>; 654 pinctrl-names = "default"; 655 model = "DB845c"; 656 audio-routing = 657 "RX_BIAS", "MCLK", 658 "AMIC1", "MIC BIAS1", 659 "AMIC2", "MIC BIAS2", 660 "DMIC0", "MIC BIAS1", 661 "DMIC1", "MIC BIAS1", 662 "DMIC2", "MIC BIAS3", 663 "DMIC3", "MIC BIAS3", 664 "SpkrLeft IN", "SPK1 OUT", 665 "SpkrRight IN", "SPK2 OUT", 666 "MM_DL1", "MultiMedia1 Playback", 667 "MM_DL2", "MultiMedia2 Playback", 668 "MM_DL4", "MultiMedia4 Playback", 669 "MultiMedia3 Capture", "MM_UL3"; 670 671 mm1-dai-link { 672 link-name = "MultiMedia1"; 673 cpu { 674 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 675 }; 676 }; 677 678 mm2-dai-link { 679 link-name = "MultiMedia2"; 680 cpu { 681 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 682 }; 683 }; 684 685 mm3-dai-link { 686 link-name = "MultiMedia3"; 687 cpu { 688 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 689 }; 690 }; 691 692 mm4-dai-link { 693 link-name = "MultiMedia4"; 694 cpu { 695 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 696 }; 697 }; 698 699 hdmi-dai-link { 700 link-name = "HDMI Playback"; 701 cpu { 702 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 703 }; 704 705 platform { 706 sound-dai = <&q6routing>; 707 }; 708 709 codec { 710 sound-dai = <<9611_codec 0>; 711 }; 712 }; 713 714 slim-dai-link { 715 link-name = "SLIM Playback"; 716 cpu { 717 sound-dai = <&q6afedai SLIMBUS_0_RX>; 718 }; 719 720 platform { 721 sound-dai = <&q6routing>; 722 }; 723 724 codec { 725 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 726 }; 727 }; 728 729 slimcap-dai-link { 730 link-name = "SLIM Capture"; 731 cpu { 732 sound-dai = <&q6afedai SLIMBUS_0_TX>; 733 }; 734 735 platform { 736 sound-dai = <&q6routing>; 737 }; 738 739 codec { 740 sound-dai = <&wcd9340 1>; 741 }; 742 }; 743}; 744 745&spi2 { 746 /* On Low speed expansion */ 747 label = "LS-SPI0"; 748 status = "okay"; 749}; 750 751&tlmm { 752 cam0_default: cam0_default { 753 rst { 754 pins = "gpio9"; 755 function = "gpio"; 756 757 drive-strength = <16>; 758 bias-disable; 759 }; 760 761 mclk0 { 762 pins = "gpio13"; 763 function = "cam_mclk"; 764 765 drive-strength = <16>; 766 bias-disable; 767 }; 768 }; 769 770 cam3_default: cam3_default { 771 rst { 772 function = "gpio"; 773 pins = "gpio21"; 774 775 drive-strength = <16>; 776 bias-disable; 777 }; 778 779 mclk3 { 780 function = "cam_mclk"; 781 pins = "gpio16"; 782 783 drive-strength = <16>; 784 bias-disable; 785 }; 786 }; 787 788 dsi_sw_sel: dsi-sw-sel { 789 pins = "gpio120"; 790 function = "gpio"; 791 792 drive-strength = <2>; 793 bias-disable; 794 output-high; 795 }; 796 797 lt9611_irq_pin: lt9611-irq { 798 pins = "gpio84"; 799 function = "gpio"; 800 bias-disable; 801 }; 802 803 pcie0_default_state: pcie0-default { 804 clkreq { 805 pins = "gpio36"; 806 function = "pci_e0"; 807 bias-pull-up; 808 }; 809 810 reset-n { 811 pins = "gpio35"; 812 function = "gpio"; 813 814 drive-strength = <2>; 815 output-low; 816 bias-pull-down; 817 }; 818 819 wake-n { 820 pins = "gpio37"; 821 function = "gpio"; 822 823 drive-strength = <2>; 824 bias-pull-up; 825 }; 826 }; 827 828 pcie0_pwren_state: pcie0-pwren { 829 pins = "gpio90"; 830 function = "gpio"; 831 832 drive-strength = <2>; 833 bias-disable; 834 }; 835 836 pcie1_default_state: pcie1-default { 837 perst-n { 838 pins = "gpio102"; 839 function = "gpio"; 840 841 drive-strength = <16>; 842 bias-disable; 843 }; 844 845 clkreq { 846 pins = "gpio103"; 847 function = "pci_e1"; 848 bias-pull-up; 849 }; 850 851 wake-n { 852 pins = "gpio11"; 853 function = "gpio"; 854 855 drive-strength = <2>; 856 bias-pull-up; 857 }; 858 859 reset-n { 860 pins = "gpio75"; 861 function = "gpio"; 862 863 drive-strength = <16>; 864 bias-pull-up; 865 output-high; 866 }; 867 }; 868 869 sdc2_default_state: sdc2-default { 870 clk { 871 pins = "sdc2_clk"; 872 bias-disable; 873 874 /* 875 * It seems that mmc_test reports errors if drive 876 * strength is not 16 on clk, cmd, and data pins. 877 */ 878 drive-strength = <16>; 879 }; 880 881 cmd { 882 pins = "sdc2_cmd"; 883 bias-pull-up; 884 drive-strength = <10>; 885 }; 886 887 data { 888 pins = "sdc2_data"; 889 bias-pull-up; 890 drive-strength = <10>; 891 }; 892 }; 893 894 sdc2_card_det_n: sd-card-det-n { 895 pins = "gpio126"; 896 function = "gpio"; 897 bias-pull-up; 898 }; 899 900 wcd_intr_default: wcd_intr_default { 901 pins = "gpio54"; 902 function = "gpio"; 903 904 input-enable; 905 bias-pull-down; 906 drive-strength = <2>; 907 }; 908}; 909 910&uart3 { 911 label = "LS-UART0"; 912 status = "disabled"; 913}; 914 915&uart6 { 916 status = "okay"; 917 918 bluetooth { 919 compatible = "qcom,wcn3990-bt"; 920 921 vddio-supply = <&vreg_s4a_1p8>; 922 vddxo-supply = <&vreg_l7a_1p8>; 923 vddrf-supply = <&vreg_l17a_1p3>; 924 vddch0-supply = <&vreg_l25a_3p3>; 925 max-speed = <3200000>; 926 }; 927}; 928 929&uart9 { 930 label = "LS-UART1"; 931 status = "okay"; 932}; 933 934&usb_1 { 935 status = "okay"; 936}; 937 938&usb_1_dwc3 { 939 dr_mode = "peripheral"; 940}; 941 942&usb_1_hsphy { 943 status = "okay"; 944 945 vdd-supply = <&vreg_l1a_0p875>; 946 vdda-pll-supply = <&vreg_l12a_1p8>; 947 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 948 949 qcom,imp-res-offset-value = <8>; 950 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 951 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 952 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 953}; 954 955&usb_1_qmpphy { 956 status = "okay"; 957 958 vdda-phy-supply = <&vreg_l26a_1p2>; 959 vdda-pll-supply = <&vreg_l1a_0p875>; 960}; 961 962&usb_2 { 963 status = "okay"; 964}; 965 966&usb_2_dwc3 { 967 dr_mode = "host"; 968}; 969 970&usb_2_hsphy { 971 status = "okay"; 972 973 vdd-supply = <&vreg_l1a_0p875>; 974 vdda-pll-supply = <&vreg_l12a_1p8>; 975 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 976 977 qcom,imp-res-offset-value = <8>; 978 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 979}; 980 981&usb_2_qmpphy { 982 status = "okay"; 983 984 vdda-phy-supply = <&vreg_l26a_1p2>; 985 vdda-pll-supply = <&vreg_l1a_0p875>; 986}; 987 988&ufs_mem_hc { 989 status = "okay"; 990 991 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 992 993 vcc-supply = <&vreg_l20a_2p95>; 994 vcc-max-microamp = <800000>; 995}; 996 997&ufs_mem_phy { 998 status = "okay"; 999 1000 vdda-phy-supply = <&vreg_l1a_0p875>; 1001 vdda-pll-supply = <&vreg_l26a_1p2>; 1002}; 1003 1004&wcd9340{ 1005 pinctrl-0 = <&wcd_intr_default>; 1006 pinctrl-names = "default"; 1007 clock-names = "extclk"; 1008 clocks = <&rpmhcc RPMH_LN_BB_CLK2>; 1009 reset-gpios = <&tlmm 64 0>; 1010 vdd-buck-supply = <&vreg_s4a_1p8>; 1011 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1012 vdd-tx-supply = <&vreg_s4a_1p8>; 1013 vdd-rx-supply = <&vreg_s4a_1p8>; 1014 vdd-io-supply = <&vreg_s4a_1p8>; 1015 1016 swm: swm@c85 { 1017 left_spkr: wsa8810-left{ 1018 compatible = "sdw10217201000"; 1019 reg = <0 1>; 1020 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1021 #thermal-sensor-cells = <0>; 1022 sound-name-prefix = "SpkrLeft"; 1023 #sound-dai-cells = <0>; 1024 }; 1025 1026 right_spkr: wsa8810-right{ 1027 compatible = "sdw10217201000"; 1028 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1029 reg = <0 2>; 1030 #thermal-sensor-cells = <0>; 1031 sound-name-prefix = "SpkrRight"; 1032 #sound-dai-cells = <0>; 1033 }; 1034 }; 1035}; 1036 1037&wifi { 1038 status = "okay"; 1039 1040 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1041 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1042 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1043 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1044 1045 qcom,snoc-host-cap-8bit-quirk; 1046}; 1047 1048/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1049&qup_spi2_default { 1050 pinconf { 1051 pins = "gpio27", "gpio28", "gpio29", "gpio30"; 1052 drive-strength = <16>; 1053 }; 1054}; 1055 1056&qup_uart3_default{ 1057 pinmux { 1058 pins = "gpio41", "gpio42", "gpio43", "gpio44"; 1059 function = "qup3"; 1060 }; 1061}; 1062 1063&qup_i2c10_default { 1064 pinconf { 1065 pins = "gpio55", "gpio56"; 1066 drive-strength = <2>; 1067 bias-disable; 1068 }; 1069}; 1070 1071&qup_uart6_default { 1072 pinmux { 1073 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 1074 function = "qup6"; 1075 }; 1076 1077 cts { 1078 pins = "gpio45"; 1079 bias-disable; 1080 }; 1081 1082 rts-tx { 1083 pins = "gpio46", "gpio47"; 1084 drive-strength = <2>; 1085 bias-disable; 1086 }; 1087 1088 rx { 1089 pins = "gpio48"; 1090 bias-pull-up; 1091 }; 1092}; 1093 1094&qup_uart9_default { 1095 pinconf-tx { 1096 pins = "gpio4"; 1097 drive-strength = <2>; 1098 bias-disable; 1099 }; 1100 1101 pinconf-rx { 1102 pins = "gpio5"; 1103 drive-strength = <2>; 1104 bias-pull-up; 1105 }; 1106}; 1107 1108&pm8998_gpio { 1109 1110}; 1111 1112&cci { 1113 status = "okay"; 1114}; 1115 1116&camss { 1117 vdda-supply = <&vreg_l1a_0p875>; 1118 1119 status = "ok"; 1120 1121 ports { 1122 #address-cells = <1>; 1123 #size-cells = <0>; 1124 port@0 { 1125 reg = <0>; 1126 csiphy0_ep: endpoint { 1127 clock-lanes = <7>; 1128 data-lanes = <0 1 2 3>; 1129 remote-endpoint = <&ov8856_ep>; 1130 }; 1131 }; 1132 }; 1133}; 1134 1135&cci_i2c0 { 1136 camera@10 { 1137 compatible = "ovti,ov8856"; 1138 reg = <0x10>; 1139 1140 // CAM0_RST_N 1141 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; 1142 pinctrl-names = "default"; 1143 pinctrl-0 = <&cam0_default>; 1144 gpios = <&tlmm 13 0>, 1145 <&tlmm 9 GPIO_ACTIVE_LOW>; 1146 1147 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; 1148 clock-names = "xvclk"; 1149 clock-frequency = <19200000>; 1150 1151 /* The &vreg_s4a_1p8 trace is powered on as a, 1152 * so it is represented by a fixed regulator. 1153 * 1154 * The 2.8V vdda-supply and 1.2V vddd-supply regulators 1155 * both have to be enabled through the power management 1156 * gpios. 1157 */ 1158 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1159 1160 dovdd-supply = <&vreg_lvs1a_1p8>; 1161 avdd-supply = <&cam0_avdd_2v8>; 1162 dvdd-supply = <&cam0_dvdd_1v2>; 1163 1164 status = "ok"; 1165 1166 port { 1167 ov8856_ep: endpoint { 1168 clock-lanes = <1>; 1169 link-frequencies = /bits/ 64 1170 <360000000 180000000>; 1171 data-lanes = <1 2 3 4>; 1172 remote-endpoint = <&csiphy0_ep>; 1173 }; 1174 }; 1175 }; 1176}; 1177 1178&cci_i2c1 { 1179 camera@60 { 1180 compatible = "ovti,ov7251"; 1181 1182 // I2C address as per ov7251.txt linux documentation 1183 reg = <0x60>; 1184 1185 // CAM3_RST_N 1186 enable-gpios = <&tlmm 21 0>; 1187 pinctrl-names = "default"; 1188 pinctrl-0 = <&cam3_default>; 1189 gpios = <&tlmm 16 0>, 1190 <&tlmm 21 0>; 1191 1192 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; 1193 clock-names = "xclk"; 1194 clock-frequency = <24000000>; 1195 1196 /* The &vreg_s4a_1p8 trace always powered on. 1197 * 1198 * The 2.8V vdda-supply regulator is enabled when the 1199 * vreg_s4a_1p8 trace is pulled high. 1200 * It too is represented by a fixed regulator. 1201 * 1202 * No 1.2V vddd-supply regulator is used. 1203 */ 1204 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1205 1206 vdddo-supply = <&vreg_lvs1a_1p8>; 1207 vdda-supply = <&cam3_avdd_2v8>; 1208 1209 status = "disable"; 1210 1211 port { 1212 ov7251_ep: endpoint { 1213 clock-lanes = <1>; 1214 data-lanes = <0 1>; 1215// remote-endpoint = <&csiphy3_ep>; 1216 }; 1217 }; 1218 }; 1219}; 1220