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1 /*
2  * B4860DS Device Tree Source
3  *
4  * Copyright 2012 - 2015 Freescale Semiconductor Inc.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *     * Redistributions of source code must retain the above copyright
9  *       notice, this list of conditions and the following disclaimer.
10  *     * Redistributions in binary form must reproduce the above copyright
11  *       notice, this list of conditions and the following disclaimer in the
12  *       documentation and/or other materials provided with the distribution.
13  *     * Neither the name of Freescale Semiconductor nor the
14  *       names of its contributors may be used to endorse or promote products
15  *       derived from this software without specific prior written permission.
16  *
17  *
18  * ALTERNATIVELY, this software may be distributed under the terms of the
19  * GNU General Public License ("GPL") as published by the Free Software
20  * Foundation, either version 2 of that License or (at your option) any
21  * later version.
22  *
23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 /include/ "b4860si-pre.dtsi"
36 /include/ "b4qds.dtsi"
37 
38 / {
39 	model = "fsl,B4860QDS";
40 	compatible = "fsl,B4860QDS";
41 
42 	aliases {
43 		phy_sgmii_1e = &phy_sgmii_1e;
44 		phy_sgmii_1f = &phy_sgmii_1f;
45 		phy_xaui_slot1 = &phy_xaui_slot1;
46 		phy_xaui_slot2 = &phy_xaui_slot2;
47 	};
48 
49 	ifc: localbus@ffe124000 {
50 		board-control@3,0 {
51 			compatible = "fsl,b4860qds-fpga", "fsl,fpga-qixis";
52 		};
53 	};
54 
55 	soc@ffe000000 {
56 		fman@400000 {
57 			ethernet@e8000 {
58 				phy-handle = <&phy_sgmii_1e>;
59 				phy-connection-type = "sgmii";
60 			};
61 
62 			ethernet@ea000 {
63 				phy-handle = <&phy_sgmii_1f>;
64 				phy-connection-type = "sgmii";
65 			};
66 
67 			ethernet@f0000 {
68 				phy-handle = <&phy_xaui_slot1>;
69 				phy-connection-type = "xgmii";
70 			};
71 
72 			ethernet@f2000 {
73 				phy-handle = <&phy_xaui_slot2>;
74 				phy-connection-type = "xgmii";
75 			};
76 
77 			mdio@fc000 {
78 				phy_sgmii_1e: ethernet-phy@1e {
79 					reg = <0x1e>;
80 					status = "disabled";
81 				};
82 
83 				phy_sgmii_1f: ethernet-phy@1f {
84 					reg = <0x1f>;
85 					status = "disabled";
86 				};
87 			};
88 
89 			mdio@fd000 {
90 				phy_xaui_slot1: xaui-phy@slot1 {
91 					compatible = "ethernet-phy-ieee802.3-c45";
92 					reg = <0x7>;
93 					status = "disabled";
94 				};
95 
96 				phy_xaui_slot2: xaui-phy@slot2 {
97 					compatible = "ethernet-phy-ieee802.3-c45";
98 					reg = <0x6>;
99 					status = "disabled";
100 				};
101 			};
102 		};
103 	};
104 
105 	rio: rapidio@ffe0c0000 {
106 		reg = <0xf 0xfe0c0000 0 0x11000>;
107 
108 		port1 {
109 			ranges = <0 0 0xc 0x20000000 0 0x10000000>;
110 		};
111 		port2 {
112 			ranges = <0 0 0xc 0x30000000 0 0x10000000>;
113 		};
114 	};
115 };
116 
117 /include/ "b4860si-post.dtsi"
118