1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * eBPF JIT compiler for PPC32
4 *
5 * Copyright 2020 Christophe Leroy <christophe.leroy@csgroup.eu>
6 * CS GROUP France
7 *
8 * Based on PPC64 eBPF JIT compiler by Naveen N. Rao
9 */
10 #include <linux/moduleloader.h>
11 #include <asm/cacheflush.h>
12 #include <asm/asm-compat.h>
13 #include <linux/netdevice.h>
14 #include <linux/filter.h>
15 #include <linux/if_vlan.h>
16 #include <asm/kprobes.h>
17 #include <linux/bpf.h>
18
19 #include "bpf_jit.h"
20
21 /*
22 * Stack layout:
23 *
24 * [ prev sp ] <-------------
25 * [ nv gpr save area ] 16 * 4 |
26 * fp (r31) --> [ ebpf stack space ] upto 512 |
27 * [ frame header ] 16 |
28 * sp (r1) ---> [ stack pointer ] --------------
29 */
30
31 /* for gpr non volatile registers r17 to r31 (14) + tail call */
32 #define BPF_PPC_STACK_SAVE (15 * 4 + 4)
33 /* stack frame, ensure this is quadword aligned */
34 #define BPF_PPC_STACKFRAME(ctx) (STACK_FRAME_MIN_SIZE + BPF_PPC_STACK_SAVE + (ctx)->stack_size)
35
36 /* BPF register usage */
37 #define TMP_REG (MAX_BPF_JIT_REG + 0)
38
39 /* BPF to ppc register mappings */
40 const int b2p[MAX_BPF_JIT_REG + 1] = {
41 /* function return value */
42 [BPF_REG_0] = 12,
43 /* function arguments */
44 [BPF_REG_1] = 4,
45 [BPF_REG_2] = 6,
46 [BPF_REG_3] = 8,
47 [BPF_REG_4] = 10,
48 [BPF_REG_5] = 22,
49 /* non volatile registers */
50 [BPF_REG_6] = 24,
51 [BPF_REG_7] = 26,
52 [BPF_REG_8] = 28,
53 [BPF_REG_9] = 30,
54 /* frame pointer aka BPF_REG_10 */
55 [BPF_REG_FP] = 18,
56 /* eBPF jit internal registers */
57 [BPF_REG_AX] = 20,
58 [TMP_REG] = 31, /* 32 bits */
59 };
60
bpf_to_ppc(struct codegen_context * ctx,int reg)61 static int bpf_to_ppc(struct codegen_context *ctx, int reg)
62 {
63 return ctx->b2p[reg];
64 }
65
66 /* PPC NVR range -- update this if we ever use NVRs below r17 */
67 #define BPF_PPC_NVR_MIN 17
68 #define BPF_PPC_TC 16
69
bpf_jit_stack_offsetof(struct codegen_context * ctx,int reg)70 static int bpf_jit_stack_offsetof(struct codegen_context *ctx, int reg)
71 {
72 if ((reg >= BPF_PPC_NVR_MIN && reg < 32) || reg == BPF_PPC_TC)
73 return BPF_PPC_STACKFRAME(ctx) - 4 * (32 - reg);
74
75 WARN(true, "BPF JIT is asking about unknown registers, will crash the stack");
76 /* Use the hole we have left for alignment */
77 return BPF_PPC_STACKFRAME(ctx) - 4;
78 }
79
bpf_jit_realloc_regs(struct codegen_context * ctx)80 void bpf_jit_realloc_regs(struct codegen_context *ctx)
81 {
82 if (ctx->seen & SEEN_FUNC)
83 return;
84
85 while (ctx->seen & SEEN_NVREG_MASK &&
86 (ctx->seen & SEEN_VREG_MASK) != SEEN_VREG_MASK) {
87 int old = 32 - fls(ctx->seen & (SEEN_NVREG_MASK & 0xaaaaaaab));
88 int new = 32 - fls(~ctx->seen & (SEEN_VREG_MASK & 0xaaaaaaaa));
89 int i;
90
91 for (i = BPF_REG_0; i <= TMP_REG; i++) {
92 if (ctx->b2p[i] != old)
93 continue;
94 ctx->b2p[i] = new;
95 bpf_set_seen_register(ctx, new);
96 bpf_clear_seen_register(ctx, old);
97 if (i != TMP_REG) {
98 bpf_set_seen_register(ctx, new - 1);
99 bpf_clear_seen_register(ctx, old - 1);
100 }
101 break;
102 }
103 }
104 }
105
bpf_jit_build_prologue(u32 * image,struct codegen_context * ctx)106 void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
107 {
108 int i;
109
110 /* First arg comes in as a 32 bits pointer. */
111 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_1), _R3));
112 EMIT(PPC_RAW_LI(bpf_to_ppc(ctx, BPF_REG_1) - 1, 0));
113 EMIT(PPC_RAW_STWU(_R1, _R1, -BPF_PPC_STACKFRAME(ctx)));
114
115 /*
116 * Initialize tail_call_cnt in stack frame if we do tail calls.
117 * Otherwise, put in NOPs so that it can be skipped when we are
118 * invoked through a tail call.
119 */
120 if (ctx->seen & SEEN_TAILCALL)
121 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_1) - 1, _R1,
122 bpf_jit_stack_offsetof(ctx, BPF_PPC_TC)));
123 else
124 EMIT(PPC_RAW_NOP());
125
126 #define BPF_TAILCALL_PROLOGUE_SIZE 16
127
128 /*
129 * We need a stack frame, but we don't necessarily need to
130 * save/restore LR unless we call other functions
131 */
132 if (ctx->seen & SEEN_FUNC)
133 EMIT(PPC_RAW_MFLR(_R0));
134
135 /*
136 * Back up non-volatile regs -- registers r18-r31
137 */
138 for (i = BPF_PPC_NVR_MIN; i <= 31; i++)
139 if (bpf_is_seen_register(ctx, i))
140 EMIT(PPC_RAW_STW(i, _R1, bpf_jit_stack_offsetof(ctx, i)));
141
142 /* If needed retrieve arguments 9 and 10, ie 5th 64 bits arg.*/
143 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_5))) {
144 EMIT(PPC_RAW_LWZ(bpf_to_ppc(ctx, BPF_REG_5) - 1, _R1, BPF_PPC_STACKFRAME(ctx)) + 8);
145 EMIT(PPC_RAW_LWZ(bpf_to_ppc(ctx, BPF_REG_5), _R1, BPF_PPC_STACKFRAME(ctx)) + 12);
146 }
147
148 /* Setup frame pointer to point to the bpf stack area */
149 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_FP))) {
150 EMIT(PPC_RAW_LI(bpf_to_ppc(ctx, BPF_REG_FP) - 1, 0));
151 EMIT(PPC_RAW_ADDI(bpf_to_ppc(ctx, BPF_REG_FP), _R1,
152 STACK_FRAME_MIN_SIZE + ctx->stack_size));
153 }
154
155 if (ctx->seen & SEEN_FUNC)
156 EMIT(PPC_RAW_STW(_R0, _R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF));
157 }
158
bpf_jit_emit_common_epilogue(u32 * image,struct codegen_context * ctx)159 static void bpf_jit_emit_common_epilogue(u32 *image, struct codegen_context *ctx)
160 {
161 int i;
162
163 /* Restore NVRs */
164 for (i = BPF_PPC_NVR_MIN; i <= 31; i++)
165 if (bpf_is_seen_register(ctx, i))
166 EMIT(PPC_RAW_LWZ(i, _R1, bpf_jit_stack_offsetof(ctx, i)));
167 }
168
bpf_jit_build_epilogue(u32 * image,struct codegen_context * ctx)169 void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
170 {
171 EMIT(PPC_RAW_MR(_R3, bpf_to_ppc(ctx, BPF_REG_0)));
172
173 bpf_jit_emit_common_epilogue(image, ctx);
174
175 /* Tear down our stack frame */
176
177 if (ctx->seen & SEEN_FUNC)
178 EMIT(PPC_RAW_LWZ(_R0, _R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF));
179
180 EMIT(PPC_RAW_ADDI(_R1, _R1, BPF_PPC_STACKFRAME(ctx)));
181
182 if (ctx->seen & SEEN_FUNC)
183 EMIT(PPC_RAW_MTLR(_R0));
184
185 EMIT(PPC_RAW_BLR());
186 }
187
bpf_jit_emit_func_call_rel(u32 * image,struct codegen_context * ctx,u64 func)188 void bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func)
189 {
190 s32 rel = (s32)func - (s32)(image + ctx->idx);
191
192 if (image && rel < 0x2000000 && rel >= -0x2000000) {
193 PPC_BL_ABS(func);
194 EMIT(PPC_RAW_NOP());
195 EMIT(PPC_RAW_NOP());
196 EMIT(PPC_RAW_NOP());
197 } else {
198 /* Load function address into r0 */
199 EMIT(PPC_RAW_LIS(_R0, IMM_H(func)));
200 EMIT(PPC_RAW_ORI(_R0, _R0, IMM_L(func)));
201 EMIT(PPC_RAW_MTCTR(_R0));
202 EMIT(PPC_RAW_BCTRL());
203 }
204 }
205
bpf_jit_emit_tail_call(u32 * image,struct codegen_context * ctx,u32 out)206 static int bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32 out)
207 {
208 /*
209 * By now, the eBPF program has already setup parameters in r3-r6
210 * r3-r4/BPF_REG_1 - pointer to ctx -- passed as is to the next bpf program
211 * r5-r6/BPF_REG_2 - pointer to bpf_array
212 * r7-r8/BPF_REG_3 - index in bpf_array
213 */
214 int b2p_bpf_array = bpf_to_ppc(ctx, BPF_REG_2);
215 int b2p_index = bpf_to_ppc(ctx, BPF_REG_3);
216
217 /*
218 * if (index >= array->map.max_entries)
219 * goto out;
220 */
221 EMIT(PPC_RAW_LWZ(_R0, b2p_bpf_array, offsetof(struct bpf_array, map.max_entries)));
222 EMIT(PPC_RAW_CMPLW(b2p_index, _R0));
223 EMIT(PPC_RAW_LWZ(_R0, _R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC)));
224 PPC_BCC(COND_GE, out);
225
226 /*
227 * if (tail_call_cnt > MAX_TAIL_CALL_CNT)
228 * goto out;
229 */
230 EMIT(PPC_RAW_CMPLWI(_R0, MAX_TAIL_CALL_CNT));
231 /* tail_call_cnt++; */
232 EMIT(PPC_RAW_ADDIC(_R0, _R0, 1));
233 PPC_BCC(COND_GT, out);
234
235 /* prog = array->ptrs[index]; */
236 EMIT(PPC_RAW_RLWINM(_R3, b2p_index, 2, 0, 29));
237 EMIT(PPC_RAW_ADD(_R3, _R3, b2p_bpf_array));
238 EMIT(PPC_RAW_LWZ(_R3, _R3, offsetof(struct bpf_array, ptrs)));
239 EMIT(PPC_RAW_STW(_R0, _R1, bpf_jit_stack_offsetof(ctx, BPF_PPC_TC)));
240
241 /*
242 * if (prog == NULL)
243 * goto out;
244 */
245 EMIT(PPC_RAW_CMPLWI(_R3, 0));
246 PPC_BCC(COND_EQ, out);
247
248 /* goto *(prog->bpf_func + prologue_size); */
249 EMIT(PPC_RAW_LWZ(_R3, _R3, offsetof(struct bpf_prog, bpf_func)));
250
251 if (ctx->seen & SEEN_FUNC)
252 EMIT(PPC_RAW_LWZ(_R0, _R1, BPF_PPC_STACKFRAME(ctx) + PPC_LR_STKOFF));
253
254 EMIT(PPC_RAW_ADDIC(_R3, _R3, BPF_TAILCALL_PROLOGUE_SIZE));
255
256 if (ctx->seen & SEEN_FUNC)
257 EMIT(PPC_RAW_MTLR(_R0));
258
259 EMIT(PPC_RAW_MTCTR(_R3));
260
261 EMIT(PPC_RAW_MR(_R3, bpf_to_ppc(ctx, BPF_REG_1)));
262
263 /* tear restore NVRs, ... */
264 bpf_jit_emit_common_epilogue(image, ctx);
265
266 EMIT(PPC_RAW_BCTR());
267
268 /* out: */
269 return 0;
270 }
271
272 /* Assemble the body code between the prologue & epilogue */
bpf_jit_build_body(struct bpf_prog * fp,u32 * image,struct codegen_context * ctx,u32 * addrs,bool extra_pass)273 int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx,
274 u32 *addrs, bool extra_pass)
275 {
276 const struct bpf_insn *insn = fp->insnsi;
277 int flen = fp->len;
278 int i, ret;
279
280 /* Start of epilogue code - will only be valid 2nd pass onwards */
281 u32 exit_addr = addrs[flen];
282
283 for (i = 0; i < flen; i++) {
284 u32 code = insn[i].code;
285 u32 dst_reg = bpf_to_ppc(ctx, insn[i].dst_reg);
286 u32 dst_reg_h = dst_reg - 1;
287 u32 src_reg = bpf_to_ppc(ctx, insn[i].src_reg);
288 u32 src_reg_h = src_reg - 1;
289 u32 tmp_reg = bpf_to_ppc(ctx, TMP_REG);
290 s16 off = insn[i].off;
291 s32 imm = insn[i].imm;
292 bool func_addr_fixed;
293 u64 func_addr;
294 u32 true_cond;
295 u32 tmp_idx;
296 int j;
297
298 /*
299 * addrs[] maps a BPF bytecode address into a real offset from
300 * the start of the body code.
301 */
302 addrs[i] = ctx->idx * 4;
303
304 /*
305 * As an optimization, we note down which registers
306 * are used so that we can only save/restore those in our
307 * prologue and epilogue. We do this here regardless of whether
308 * the actual BPF instruction uses src/dst registers or not
309 * (for instance, BPF_CALL does not use them). The expectation
310 * is that those instructions will have src_reg/dst_reg set to
311 * 0. Even otherwise, we just lose some prologue/epilogue
312 * optimization but everything else should work without
313 * any issues.
314 */
315 if (dst_reg >= 3 && dst_reg < 32) {
316 bpf_set_seen_register(ctx, dst_reg);
317 bpf_set_seen_register(ctx, dst_reg_h);
318 }
319
320 if (src_reg >= 3 && src_reg < 32) {
321 bpf_set_seen_register(ctx, src_reg);
322 bpf_set_seen_register(ctx, src_reg_h);
323 }
324
325 switch (code) {
326 /*
327 * Arithmetic operations: ADD/SUB/MUL/DIV/MOD/NEG
328 */
329 case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */
330 EMIT(PPC_RAW_ADD(dst_reg, dst_reg, src_reg));
331 break;
332 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */
333 EMIT(PPC_RAW_ADDC(dst_reg, dst_reg, src_reg));
334 EMIT(PPC_RAW_ADDE(dst_reg_h, dst_reg_h, src_reg_h));
335 break;
336 case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */
337 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, src_reg));
338 break;
339 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */
340 EMIT(PPC_RAW_SUBFC(dst_reg, src_reg, dst_reg));
341 EMIT(PPC_RAW_SUBFE(dst_reg_h, src_reg_h, dst_reg_h));
342 break;
343 case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */
344 imm = -imm;
345 fallthrough;
346 case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */
347 if (IMM_HA(imm) & 0xffff)
348 EMIT(PPC_RAW_ADDIS(dst_reg, dst_reg, IMM_HA(imm)));
349 if (IMM_L(imm))
350 EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm)));
351 break;
352 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */
353 imm = -imm;
354 fallthrough;
355 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */
356 if (!imm)
357 break;
358
359 if (imm >= -32768 && imm < 32768) {
360 EMIT(PPC_RAW_ADDIC(dst_reg, dst_reg, imm));
361 } else {
362 PPC_LI32(_R0, imm);
363 EMIT(PPC_RAW_ADDC(dst_reg, dst_reg, _R0));
364 }
365 if (imm >= 0 || (BPF_OP(code) == BPF_SUB && imm == 0x80000000))
366 EMIT(PPC_RAW_ADDZE(dst_reg_h, dst_reg_h));
367 else
368 EMIT(PPC_RAW_ADDME(dst_reg_h, dst_reg_h));
369 break;
370 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst *= src */
371 bpf_set_seen_register(ctx, tmp_reg);
372 EMIT(PPC_RAW_MULW(_R0, dst_reg, src_reg_h));
373 EMIT(PPC_RAW_MULW(dst_reg_h, dst_reg_h, src_reg));
374 EMIT(PPC_RAW_MULHWU(tmp_reg, dst_reg, src_reg));
375 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, src_reg));
376 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, _R0));
377 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, tmp_reg));
378 break;
379 case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */
380 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, src_reg));
381 break;
382 case BPF_ALU | BPF_MUL | BPF_K: /* (u32) dst *= (u32) imm */
383 if (imm >= -32768 && imm < 32768) {
384 EMIT(PPC_RAW_MULI(dst_reg, dst_reg, imm));
385 } else {
386 PPC_LI32(_R0, imm);
387 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, _R0));
388 }
389 break;
390 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst *= imm */
391 if (!imm) {
392 PPC_LI32(dst_reg, 0);
393 PPC_LI32(dst_reg_h, 0);
394 break;
395 }
396 if (imm == 1)
397 break;
398 if (imm == -1) {
399 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0));
400 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h));
401 break;
402 }
403 bpf_set_seen_register(ctx, tmp_reg);
404 PPC_LI32(tmp_reg, imm);
405 EMIT(PPC_RAW_MULW(dst_reg_h, dst_reg_h, tmp_reg));
406 if (imm < 0)
407 EMIT(PPC_RAW_SUB(dst_reg_h, dst_reg_h, dst_reg));
408 EMIT(PPC_RAW_MULHWU(_R0, dst_reg, tmp_reg));
409 EMIT(PPC_RAW_MULW(dst_reg, dst_reg, tmp_reg));
410 EMIT(PPC_RAW_ADD(dst_reg_h, dst_reg_h, _R0));
411 break;
412 case BPF_ALU | BPF_DIV | BPF_X: /* (u32) dst /= (u32) src */
413 EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, src_reg));
414 break;
415 case BPF_ALU | BPF_MOD | BPF_X: /* (u32) dst %= (u32) src */
416 EMIT(PPC_RAW_DIVWU(_R0, dst_reg, src_reg));
417 EMIT(PPC_RAW_MULW(_R0, src_reg, _R0));
418 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, _R0));
419 break;
420 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
421 return -EOPNOTSUPP;
422 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
423 return -EOPNOTSUPP;
424 case BPF_ALU | BPF_DIV | BPF_K: /* (u32) dst /= (u32) imm */
425 if (!imm)
426 return -EINVAL;
427 if (imm == 1)
428 break;
429
430 PPC_LI32(_R0, imm);
431 EMIT(PPC_RAW_DIVWU(dst_reg, dst_reg, _R0));
432 break;
433 case BPF_ALU | BPF_MOD | BPF_K: /* (u32) dst %= (u32) imm */
434 if (!imm)
435 return -EINVAL;
436
437 if (!is_power_of_2((u32)imm)) {
438 bpf_set_seen_register(ctx, tmp_reg);
439 PPC_LI32(tmp_reg, imm);
440 EMIT(PPC_RAW_DIVWU(_R0, dst_reg, tmp_reg));
441 EMIT(PPC_RAW_MULW(_R0, tmp_reg, _R0));
442 EMIT(PPC_RAW_SUB(dst_reg, dst_reg, _R0));
443 break;
444 }
445 if (imm == 1)
446 EMIT(PPC_RAW_LI(dst_reg, 0));
447 else
448 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2((u32)imm), 31));
449
450 break;
451 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */
452 if (!imm)
453 return -EINVAL;
454 if (imm < 0)
455 imm = -imm;
456 if (!is_power_of_2(imm))
457 return -EOPNOTSUPP;
458 if (imm == 1)
459 EMIT(PPC_RAW_LI(dst_reg, 0));
460 else
461 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 32 - ilog2(imm), 31));
462 EMIT(PPC_RAW_LI(dst_reg_h, 0));
463 break;
464 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */
465 if (!imm)
466 return -EINVAL;
467 if (!is_power_of_2(abs(imm)))
468 return -EOPNOTSUPP;
469
470 if (imm < 0) {
471 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0));
472 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h));
473 imm = -imm;
474 }
475 if (imm == 1)
476 break;
477 imm = ilog2(imm);
478 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31));
479 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1));
480 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, imm));
481 break;
482 case BPF_ALU | BPF_NEG: /* (u32) dst = -dst */
483 EMIT(PPC_RAW_NEG(dst_reg, dst_reg));
484 break;
485 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
486 EMIT(PPC_RAW_SUBFIC(dst_reg, dst_reg, 0));
487 EMIT(PPC_RAW_SUBFZE(dst_reg_h, dst_reg_h));
488 break;
489
490 /*
491 * Logical operations: AND/OR/XOR/[A]LSH/[A]RSH
492 */
493 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
494 EMIT(PPC_RAW_AND(dst_reg, dst_reg, src_reg));
495 EMIT(PPC_RAW_AND(dst_reg_h, dst_reg_h, src_reg_h));
496 break;
497 case BPF_ALU | BPF_AND | BPF_X: /* (u32) dst = dst & src */
498 EMIT(PPC_RAW_AND(dst_reg, dst_reg, src_reg));
499 break;
500 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
501 if (imm >= 0)
502 EMIT(PPC_RAW_LI(dst_reg_h, 0));
503 fallthrough;
504 case BPF_ALU | BPF_AND | BPF_K: /* (u32) dst = dst & imm */
505 if (!IMM_H(imm)) {
506 EMIT(PPC_RAW_ANDI(dst_reg, dst_reg, IMM_L(imm)));
507 } else if (!IMM_L(imm)) {
508 EMIT(PPC_RAW_ANDIS(dst_reg, dst_reg, IMM_H(imm)));
509 } else if (imm == (((1 << fls(imm)) - 1) ^ ((1 << (ffs(i) - 1)) - 1))) {
510 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0,
511 32 - fls(imm), 32 - ffs(imm)));
512 } else {
513 PPC_LI32(_R0, imm);
514 EMIT(PPC_RAW_AND(dst_reg, dst_reg, _R0));
515 }
516 break;
517 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
518 EMIT(PPC_RAW_OR(dst_reg, dst_reg, src_reg));
519 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, src_reg_h));
520 break;
521 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
522 EMIT(PPC_RAW_OR(dst_reg, dst_reg, src_reg));
523 break;
524 case BPF_ALU64 | BPF_OR | BPF_K:/* dst = dst | imm */
525 /* Sign-extended */
526 if (imm < 0)
527 EMIT(PPC_RAW_LI(dst_reg_h, -1));
528 fallthrough;
529 case BPF_ALU | BPF_OR | BPF_K:/* dst = (u32) dst | (u32) imm */
530 if (IMM_L(imm))
531 EMIT(PPC_RAW_ORI(dst_reg, dst_reg, IMM_L(imm)));
532 if (IMM_H(imm))
533 EMIT(PPC_RAW_ORIS(dst_reg, dst_reg, IMM_H(imm)));
534 break;
535 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst ^= src */
536 if (dst_reg == src_reg) {
537 EMIT(PPC_RAW_LI(dst_reg, 0));
538 EMIT(PPC_RAW_LI(dst_reg_h, 0));
539 } else {
540 EMIT(PPC_RAW_XOR(dst_reg, dst_reg, src_reg));
541 EMIT(PPC_RAW_XOR(dst_reg_h, dst_reg_h, src_reg_h));
542 }
543 break;
544 case BPF_ALU | BPF_XOR | BPF_X: /* (u32) dst ^= src */
545 if (dst_reg == src_reg)
546 EMIT(PPC_RAW_LI(dst_reg, 0));
547 else
548 EMIT(PPC_RAW_XOR(dst_reg, dst_reg, src_reg));
549 break;
550 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst ^= imm */
551 if (imm < 0)
552 EMIT(PPC_RAW_NOR(dst_reg_h, dst_reg_h, dst_reg_h));
553 fallthrough;
554 case BPF_ALU | BPF_XOR | BPF_K: /* (u32) dst ^= (u32) imm */
555 if (IMM_L(imm))
556 EMIT(PPC_RAW_XORI(dst_reg, dst_reg, IMM_L(imm)));
557 if (IMM_H(imm))
558 EMIT(PPC_RAW_XORIS(dst_reg, dst_reg, IMM_H(imm)));
559 break;
560 case BPF_ALU | BPF_LSH | BPF_X: /* (u32) dst <<= (u32) src */
561 EMIT(PPC_RAW_SLW(dst_reg, dst_reg, src_reg));
562 break;
563 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst <<= src; */
564 bpf_set_seen_register(ctx, tmp_reg);
565 EMIT(PPC_RAW_SUBFIC(_R0, src_reg, 32));
566 EMIT(PPC_RAW_SLW(dst_reg_h, dst_reg_h, src_reg));
567 EMIT(PPC_RAW_ADDI(tmp_reg, src_reg, 32));
568 EMIT(PPC_RAW_SRW(_R0, dst_reg, _R0));
569 EMIT(PPC_RAW_SLW(tmp_reg, dst_reg, tmp_reg));
570 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, _R0));
571 EMIT(PPC_RAW_SLW(dst_reg, dst_reg, src_reg));
572 EMIT(PPC_RAW_OR(dst_reg_h, dst_reg_h, tmp_reg));
573 break;
574 case BPF_ALU | BPF_LSH | BPF_K: /* (u32) dst <<= (u32) imm */
575 if (!imm)
576 break;
577 EMIT(PPC_RAW_SLWI(dst_reg, dst_reg, imm));
578 break;
579 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst <<= imm */
580 if (imm < 0)
581 return -EINVAL;
582 if (!imm)
583 break;
584 if (imm < 32) {
585 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg_h, imm, 0, 31 - imm));
586 EMIT(PPC_RAW_RLWIMI(dst_reg_h, dst_reg, imm, 32 - imm, 31));
587 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, imm, 0, 31 - imm));
588 break;
589 }
590 if (imm < 64)
591 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg, imm, 0, 31 - imm));
592 else
593 EMIT(PPC_RAW_LI(dst_reg_h, 0));
594 EMIT(PPC_RAW_LI(dst_reg, 0));
595 break;
596 case BPF_ALU | BPF_RSH | BPF_X: /* (u32) dst >>= (u32) src */
597 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg));
598 break;
599 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst >>= src */
600 bpf_set_seen_register(ctx, tmp_reg);
601 EMIT(PPC_RAW_SUBFIC(_R0, src_reg, 32));
602 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg));
603 EMIT(PPC_RAW_ADDI(tmp_reg, src_reg, 32));
604 EMIT(PPC_RAW_SLW(_R0, dst_reg_h, _R0));
605 EMIT(PPC_RAW_SRW(tmp_reg, dst_reg_h, tmp_reg));
606 EMIT(PPC_RAW_OR(dst_reg, dst_reg, _R0));
607 EMIT(PPC_RAW_SRW(dst_reg_h, dst_reg_h, src_reg));
608 EMIT(PPC_RAW_OR(dst_reg, dst_reg, tmp_reg));
609 break;
610 case BPF_ALU | BPF_RSH | BPF_K: /* (u32) dst >>= (u32) imm */
611 if (!imm)
612 break;
613 EMIT(PPC_RAW_SRWI(dst_reg, dst_reg, imm));
614 break;
615 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst >>= imm */
616 if (imm < 0)
617 return -EINVAL;
618 if (!imm)
619 break;
620 if (imm < 32) {
621 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31));
622 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1));
623 EMIT(PPC_RAW_RLWINM(dst_reg_h, dst_reg_h, 32 - imm, imm, 31));
624 break;
625 }
626 if (imm < 64)
627 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg_h, 64 - imm, imm - 32, 31));
628 else
629 EMIT(PPC_RAW_LI(dst_reg, 0));
630 EMIT(PPC_RAW_LI(dst_reg_h, 0));
631 break;
632 case BPF_ALU | BPF_ARSH | BPF_X: /* (s32) dst >>= src */
633 EMIT(PPC_RAW_SRAW(dst_reg, dst_reg, src_reg));
634 break;
635 case BPF_ALU64 | BPF_ARSH | BPF_X: /* (s64) dst >>= src */
636 bpf_set_seen_register(ctx, tmp_reg);
637 EMIT(PPC_RAW_SUBFIC(_R0, src_reg, 32));
638 EMIT(PPC_RAW_SRW(dst_reg, dst_reg, src_reg));
639 EMIT(PPC_RAW_SLW(_R0, dst_reg_h, _R0));
640 EMIT(PPC_RAW_ADDI(tmp_reg, src_reg, 32));
641 EMIT(PPC_RAW_OR(dst_reg, dst_reg, _R0));
642 EMIT(PPC_RAW_RLWINM(_R0, tmp_reg, 0, 26, 26));
643 EMIT(PPC_RAW_SRAW(tmp_reg, dst_reg_h, tmp_reg));
644 EMIT(PPC_RAW_SRAW(dst_reg_h, dst_reg_h, src_reg));
645 EMIT(PPC_RAW_SLW(tmp_reg, tmp_reg, _R0));
646 EMIT(PPC_RAW_OR(dst_reg, dst_reg, tmp_reg));
647 break;
648 case BPF_ALU | BPF_ARSH | BPF_K: /* (s32) dst >>= imm */
649 if (!imm)
650 break;
651 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg, imm));
652 break;
653 case BPF_ALU64 | BPF_ARSH | BPF_K: /* (s64) dst >>= imm */
654 if (imm < 0)
655 return -EINVAL;
656 if (!imm)
657 break;
658 if (imm < 32) {
659 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 32 - imm, imm, 31));
660 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg_h, 32 - imm, 0, imm - 1));
661 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, imm));
662 break;
663 }
664 if (imm < 64)
665 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg_h, imm - 32));
666 else
667 EMIT(PPC_RAW_SRAWI(dst_reg, dst_reg_h, 31));
668 EMIT(PPC_RAW_SRAWI(dst_reg_h, dst_reg_h, 31));
669 break;
670
671 /*
672 * MOV
673 */
674 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
675 if (dst_reg == src_reg)
676 break;
677 EMIT(PPC_RAW_MR(dst_reg, src_reg));
678 EMIT(PPC_RAW_MR(dst_reg_h, src_reg_h));
679 break;
680 case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
681 /* special mov32 for zext */
682 if (imm == 1)
683 EMIT(PPC_RAW_LI(dst_reg_h, 0));
684 else if (dst_reg != src_reg)
685 EMIT(PPC_RAW_MR(dst_reg, src_reg));
686 break;
687 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = (s64) imm */
688 PPC_LI32(dst_reg, imm);
689 PPC_EX32(dst_reg_h, imm);
690 break;
691 case BPF_ALU | BPF_MOV | BPF_K: /* (u32) dst = imm */
692 PPC_LI32(dst_reg, imm);
693 break;
694
695 /*
696 * BPF_FROM_BE/LE
697 */
698 case BPF_ALU | BPF_END | BPF_FROM_LE:
699 switch (imm) {
700 case 16:
701 /* Copy 16 bits to upper part */
702 EMIT(PPC_RAW_RLWIMI(dst_reg, dst_reg, 16, 0, 15));
703 /* Rotate 8 bits right & mask */
704 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 24, 16, 31));
705 break;
706 case 32:
707 /*
708 * Rotate word left by 8 bits:
709 * 2 bytes are already in their final position
710 * -- byte 2 and 4 (of bytes 1, 2, 3 and 4)
711 */
712 EMIT(PPC_RAW_RLWINM(_R0, dst_reg, 8, 0, 31));
713 /* Rotate 24 bits and insert byte 1 */
714 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg, 24, 0, 7));
715 /* Rotate 24 bits and insert byte 3 */
716 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg, 24, 16, 23));
717 EMIT(PPC_RAW_MR(dst_reg, _R0));
718 break;
719 case 64:
720 bpf_set_seen_register(ctx, tmp_reg);
721 EMIT(PPC_RAW_RLWINM(tmp_reg, dst_reg, 8, 0, 31));
722 EMIT(PPC_RAW_RLWINM(_R0, dst_reg_h, 8, 0, 31));
723 /* Rotate 24 bits and insert byte 1 */
724 EMIT(PPC_RAW_RLWIMI(tmp_reg, dst_reg, 24, 0, 7));
725 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg_h, 24, 0, 7));
726 /* Rotate 24 bits and insert byte 3 */
727 EMIT(PPC_RAW_RLWIMI(tmp_reg, dst_reg, 24, 16, 23));
728 EMIT(PPC_RAW_RLWIMI(_R0, dst_reg_h, 24, 16, 23));
729 EMIT(PPC_RAW_MR(dst_reg, _R0));
730 EMIT(PPC_RAW_MR(dst_reg_h, tmp_reg));
731 break;
732 }
733 break;
734 case BPF_ALU | BPF_END | BPF_FROM_BE:
735 switch (imm) {
736 case 16:
737 /* zero-extend 16 bits into 32 bits */
738 EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 16, 31));
739 break;
740 case 32:
741 case 64:
742 /* nop */
743 break;
744 }
745 break;
746
747 /*
748 * BPF_ST NOSPEC (speculation barrier)
749 */
750 case BPF_ST | BPF_NOSPEC:
751 break;
752
753 /*
754 * BPF_ST(X)
755 */
756 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src */
757 EMIT(PPC_RAW_STB(src_reg, dst_reg, off));
758 break;
759 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
760 PPC_LI32(_R0, imm);
761 EMIT(PPC_RAW_STB(_R0, dst_reg, off));
762 break;
763 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
764 EMIT(PPC_RAW_STH(src_reg, dst_reg, off));
765 break;
766 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
767 PPC_LI32(_R0, imm);
768 EMIT(PPC_RAW_STH(_R0, dst_reg, off));
769 break;
770 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
771 EMIT(PPC_RAW_STW(src_reg, dst_reg, off));
772 break;
773 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
774 PPC_LI32(_R0, imm);
775 EMIT(PPC_RAW_STW(_R0, dst_reg, off));
776 break;
777 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
778 EMIT(PPC_RAW_STW(src_reg_h, dst_reg, off));
779 EMIT(PPC_RAW_STW(src_reg, dst_reg, off + 4));
780 break;
781 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
782 PPC_LI32(_R0, imm);
783 EMIT(PPC_RAW_STW(_R0, dst_reg, off + 4));
784 PPC_EX32(_R0, imm);
785 EMIT(PPC_RAW_STW(_R0, dst_reg, off));
786 break;
787
788 /*
789 * BPF_STX ATOMIC (atomic ops)
790 */
791 case BPF_STX | BPF_ATOMIC | BPF_W:
792 if (imm != BPF_ADD) {
793 pr_err_ratelimited("eBPF filter atomic op code %02x (@%d) unsupported\n",
794 code, i);
795 return -ENOTSUPP;
796 }
797
798 /* *(u32 *)(dst + off) += src */
799
800 bpf_set_seen_register(ctx, tmp_reg);
801 /* Get offset into TMP_REG */
802 EMIT(PPC_RAW_LI(tmp_reg, off));
803 /* load value from memory into r0 */
804 EMIT(PPC_RAW_LWARX(_R0, tmp_reg, dst_reg, 0));
805 /* add value from src_reg into this */
806 EMIT(PPC_RAW_ADD(_R0, _R0, src_reg));
807 /* store result back */
808 EMIT(PPC_RAW_STWCX(_R0, tmp_reg, dst_reg));
809 /* we're done if this succeeded */
810 PPC_BCC_SHORT(COND_NE, (ctx->idx - 3) * 4);
811 break;
812
813 case BPF_STX | BPF_ATOMIC | BPF_DW: /* *(u64 *)(dst + off) += src */
814 return -EOPNOTSUPP;
815
816 /*
817 * BPF_LDX
818 */
819 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
820 EMIT(PPC_RAW_LBZ(dst_reg, src_reg, off));
821 if (!fp->aux->verifier_zext)
822 EMIT(PPC_RAW_LI(dst_reg_h, 0));
823 break;
824 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
825 EMIT(PPC_RAW_LHZ(dst_reg, src_reg, off));
826 if (!fp->aux->verifier_zext)
827 EMIT(PPC_RAW_LI(dst_reg_h, 0));
828 break;
829 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
830 EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));
831 if (!fp->aux->verifier_zext)
832 EMIT(PPC_RAW_LI(dst_reg_h, 0));
833 break;
834 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
835 EMIT(PPC_RAW_LWZ(dst_reg_h, src_reg, off));
836 EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off + 4));
837 break;
838
839 /*
840 * Doubleword load
841 * 16 byte instruction that uses two 'struct bpf_insn'
842 */
843 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
844 tmp_idx = ctx->idx;
845 PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm);
846 PPC_LI32(dst_reg, (u32)insn[i].imm);
847 /* padding to allow full 4 instructions for later patching */
848 for (j = ctx->idx - tmp_idx; j < 4; j++)
849 EMIT(PPC_RAW_NOP());
850 /* Adjust for two bpf instructions */
851 addrs[++i] = ctx->idx * 4;
852 break;
853
854 /*
855 * Return/Exit
856 */
857 case BPF_JMP | BPF_EXIT:
858 /*
859 * If this isn't the very last instruction, branch to
860 * the epilogue. If we _are_ the last instruction,
861 * we'll just fall through to the epilogue.
862 */
863 if (i != flen - 1)
864 PPC_JMP(exit_addr);
865 /* else fall through to the epilogue */
866 break;
867
868 /*
869 * Call kernel helper or bpf function
870 */
871 case BPF_JMP | BPF_CALL:
872 ctx->seen |= SEEN_FUNC;
873
874 ret = bpf_jit_get_func_addr(fp, &insn[i], extra_pass,
875 &func_addr, &func_addr_fixed);
876 if (ret < 0)
877 return ret;
878
879 if (bpf_is_seen_register(ctx, bpf_to_ppc(ctx, BPF_REG_5))) {
880 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_5) - 1, _R1, 8));
881 EMIT(PPC_RAW_STW(bpf_to_ppc(ctx, BPF_REG_5), _R1, 12));
882 }
883
884 bpf_jit_emit_func_call_rel(image, ctx, func_addr);
885
886 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_0) - 1, _R3));
887 EMIT(PPC_RAW_MR(bpf_to_ppc(ctx, BPF_REG_0), _R4));
888 break;
889
890 /*
891 * Jumps and branches
892 */
893 case BPF_JMP | BPF_JA:
894 PPC_JMP(addrs[i + 1 + off]);
895 break;
896
897 case BPF_JMP | BPF_JGT | BPF_K:
898 case BPF_JMP | BPF_JGT | BPF_X:
899 case BPF_JMP | BPF_JSGT | BPF_K:
900 case BPF_JMP | BPF_JSGT | BPF_X:
901 case BPF_JMP32 | BPF_JGT | BPF_K:
902 case BPF_JMP32 | BPF_JGT | BPF_X:
903 case BPF_JMP32 | BPF_JSGT | BPF_K:
904 case BPF_JMP32 | BPF_JSGT | BPF_X:
905 true_cond = COND_GT;
906 goto cond_branch;
907 case BPF_JMP | BPF_JLT | BPF_K:
908 case BPF_JMP | BPF_JLT | BPF_X:
909 case BPF_JMP | BPF_JSLT | BPF_K:
910 case BPF_JMP | BPF_JSLT | BPF_X:
911 case BPF_JMP32 | BPF_JLT | BPF_K:
912 case BPF_JMP32 | BPF_JLT | BPF_X:
913 case BPF_JMP32 | BPF_JSLT | BPF_K:
914 case BPF_JMP32 | BPF_JSLT | BPF_X:
915 true_cond = COND_LT;
916 goto cond_branch;
917 case BPF_JMP | BPF_JGE | BPF_K:
918 case BPF_JMP | BPF_JGE | BPF_X:
919 case BPF_JMP | BPF_JSGE | BPF_K:
920 case BPF_JMP | BPF_JSGE | BPF_X:
921 case BPF_JMP32 | BPF_JGE | BPF_K:
922 case BPF_JMP32 | BPF_JGE | BPF_X:
923 case BPF_JMP32 | BPF_JSGE | BPF_K:
924 case BPF_JMP32 | BPF_JSGE | BPF_X:
925 true_cond = COND_GE;
926 goto cond_branch;
927 case BPF_JMP | BPF_JLE | BPF_K:
928 case BPF_JMP | BPF_JLE | BPF_X:
929 case BPF_JMP | BPF_JSLE | BPF_K:
930 case BPF_JMP | BPF_JSLE | BPF_X:
931 case BPF_JMP32 | BPF_JLE | BPF_K:
932 case BPF_JMP32 | BPF_JLE | BPF_X:
933 case BPF_JMP32 | BPF_JSLE | BPF_K:
934 case BPF_JMP32 | BPF_JSLE | BPF_X:
935 true_cond = COND_LE;
936 goto cond_branch;
937 case BPF_JMP | BPF_JEQ | BPF_K:
938 case BPF_JMP | BPF_JEQ | BPF_X:
939 case BPF_JMP32 | BPF_JEQ | BPF_K:
940 case BPF_JMP32 | BPF_JEQ | BPF_X:
941 true_cond = COND_EQ;
942 goto cond_branch;
943 case BPF_JMP | BPF_JNE | BPF_K:
944 case BPF_JMP | BPF_JNE | BPF_X:
945 case BPF_JMP32 | BPF_JNE | BPF_K:
946 case BPF_JMP32 | BPF_JNE | BPF_X:
947 true_cond = COND_NE;
948 goto cond_branch;
949 case BPF_JMP | BPF_JSET | BPF_K:
950 case BPF_JMP | BPF_JSET | BPF_X:
951 case BPF_JMP32 | BPF_JSET | BPF_K:
952 case BPF_JMP32 | BPF_JSET | BPF_X:
953 true_cond = COND_NE;
954 /* fallthrough; */
955
956 cond_branch:
957 switch (code) {
958 case BPF_JMP | BPF_JGT | BPF_X:
959 case BPF_JMP | BPF_JLT | BPF_X:
960 case BPF_JMP | BPF_JGE | BPF_X:
961 case BPF_JMP | BPF_JLE | BPF_X:
962 case BPF_JMP | BPF_JEQ | BPF_X:
963 case BPF_JMP | BPF_JNE | BPF_X:
964 /* unsigned comparison */
965 EMIT(PPC_RAW_CMPLW(dst_reg_h, src_reg_h));
966 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
967 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg));
968 break;
969 case BPF_JMP32 | BPF_JGT | BPF_X:
970 case BPF_JMP32 | BPF_JLT | BPF_X:
971 case BPF_JMP32 | BPF_JGE | BPF_X:
972 case BPF_JMP32 | BPF_JLE | BPF_X:
973 case BPF_JMP32 | BPF_JEQ | BPF_X:
974 case BPF_JMP32 | BPF_JNE | BPF_X:
975 /* unsigned comparison */
976 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg));
977 break;
978 case BPF_JMP | BPF_JSGT | BPF_X:
979 case BPF_JMP | BPF_JSLT | BPF_X:
980 case BPF_JMP | BPF_JSGE | BPF_X:
981 case BPF_JMP | BPF_JSLE | BPF_X:
982 /* signed comparison */
983 EMIT(PPC_RAW_CMPW(dst_reg_h, src_reg_h));
984 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
985 EMIT(PPC_RAW_CMPLW(dst_reg, src_reg));
986 break;
987 case BPF_JMP32 | BPF_JSGT | BPF_X:
988 case BPF_JMP32 | BPF_JSLT | BPF_X:
989 case BPF_JMP32 | BPF_JSGE | BPF_X:
990 case BPF_JMP32 | BPF_JSLE | BPF_X:
991 /* signed comparison */
992 EMIT(PPC_RAW_CMPW(dst_reg, src_reg));
993 break;
994 case BPF_JMP | BPF_JSET | BPF_X:
995 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg_h, src_reg_h));
996 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
997 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, src_reg));
998 break;
999 case BPF_JMP32 | BPF_JSET | BPF_X: {
1000 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, src_reg));
1001 break;
1002 case BPF_JMP | BPF_JNE | BPF_K:
1003 case BPF_JMP | BPF_JEQ | BPF_K:
1004 case BPF_JMP | BPF_JGT | BPF_K:
1005 case BPF_JMP | BPF_JLT | BPF_K:
1006 case BPF_JMP | BPF_JGE | BPF_K:
1007 case BPF_JMP | BPF_JLE | BPF_K:
1008 /*
1009 * Need sign-extended load, so only positive
1010 * values can be used as imm in cmplwi
1011 */
1012 if (imm >= 0 && imm < 32768) {
1013 EMIT(PPC_RAW_CMPLWI(dst_reg_h, 0));
1014 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
1015 EMIT(PPC_RAW_CMPLWI(dst_reg, imm));
1016 } else {
1017 /* sign-extending load ... but unsigned comparison */
1018 PPC_EX32(_R0, imm);
1019 EMIT(PPC_RAW_CMPLW(dst_reg_h, _R0));
1020 PPC_LI32(_R0, imm);
1021 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
1022 EMIT(PPC_RAW_CMPLW(dst_reg, _R0));
1023 }
1024 break;
1025 case BPF_JMP32 | BPF_JNE | BPF_K:
1026 case BPF_JMP32 | BPF_JEQ | BPF_K:
1027 case BPF_JMP32 | BPF_JGT | BPF_K:
1028 case BPF_JMP32 | BPF_JLT | BPF_K:
1029 case BPF_JMP32 | BPF_JGE | BPF_K:
1030 case BPF_JMP32 | BPF_JLE | BPF_K:
1031 if (imm >= 0 && imm < 65536) {
1032 EMIT(PPC_RAW_CMPLWI(dst_reg, imm));
1033 } else {
1034 PPC_LI32(_R0, imm);
1035 EMIT(PPC_RAW_CMPLW(dst_reg, _R0));
1036 }
1037 break;
1038 }
1039 case BPF_JMP | BPF_JSGT | BPF_K:
1040 case BPF_JMP | BPF_JSLT | BPF_K:
1041 case BPF_JMP | BPF_JSGE | BPF_K:
1042 case BPF_JMP | BPF_JSLE | BPF_K:
1043 if (imm >= 0 && imm < 65536) {
1044 EMIT(PPC_RAW_CMPWI(dst_reg_h, imm < 0 ? -1 : 0));
1045 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
1046 EMIT(PPC_RAW_CMPLWI(dst_reg, imm));
1047 } else {
1048 /* sign-extending load */
1049 EMIT(PPC_RAW_CMPWI(dst_reg_h, imm < 0 ? -1 : 0));
1050 PPC_LI32(_R0, imm);
1051 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
1052 EMIT(PPC_RAW_CMPLW(dst_reg, _R0));
1053 }
1054 break;
1055 case BPF_JMP32 | BPF_JSGT | BPF_K:
1056 case BPF_JMP32 | BPF_JSLT | BPF_K:
1057 case BPF_JMP32 | BPF_JSGE | BPF_K:
1058 case BPF_JMP32 | BPF_JSLE | BPF_K:
1059 /*
1060 * signed comparison, so any 16-bit value
1061 * can be used in cmpwi
1062 */
1063 if (imm >= -32768 && imm < 32768) {
1064 EMIT(PPC_RAW_CMPWI(dst_reg, imm));
1065 } else {
1066 /* sign-extending load */
1067 PPC_LI32(_R0, imm);
1068 EMIT(PPC_RAW_CMPW(dst_reg, _R0));
1069 }
1070 break;
1071 case BPF_JMP | BPF_JSET | BPF_K:
1072 /* andi does not sign-extend the immediate */
1073 if (imm >= 0 && imm < 32768) {
1074 /* PPC_ANDI is _only/always_ dot-form */
1075 EMIT(PPC_RAW_ANDI(_R0, dst_reg, imm));
1076 } else {
1077 PPC_LI32(_R0, imm);
1078 if (imm < 0) {
1079 EMIT(PPC_RAW_CMPWI(dst_reg_h, 0));
1080 PPC_BCC_SHORT(COND_NE, (ctx->idx + 2) * 4);
1081 }
1082 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, _R0));
1083 }
1084 break;
1085 case BPF_JMP32 | BPF_JSET | BPF_K:
1086 /* andi does not sign-extend the immediate */
1087 if (imm >= 0 && imm < 32768) {
1088 /* PPC_ANDI is _only/always_ dot-form */
1089 EMIT(PPC_RAW_ANDI(_R0, dst_reg, imm));
1090 } else {
1091 PPC_LI32(_R0, imm);
1092 EMIT(PPC_RAW_AND_DOT(_R0, dst_reg, _R0));
1093 }
1094 break;
1095 }
1096 PPC_BCC(true_cond, addrs[i + 1 + off]);
1097 break;
1098
1099 /*
1100 * Tail call
1101 */
1102 case BPF_JMP | BPF_TAIL_CALL:
1103 ctx->seen |= SEEN_TAILCALL;
1104 ret = bpf_jit_emit_tail_call(image, ctx, addrs[i + 1]);
1105 if (ret < 0)
1106 return ret;
1107 break;
1108
1109 default:
1110 /*
1111 * The filter contains something cruel & unusual.
1112 * We don't handle it, but also there shouldn't be
1113 * anything missing from our list.
1114 */
1115 pr_err_ratelimited("eBPF filter opcode %04x (@%d) unsupported\n", code, i);
1116 return -EOPNOTSUPP;
1117 }
1118 if (BPF_CLASS(code) == BPF_ALU && !fp->aux->verifier_zext &&
1119 !insn_is_zext(&insn[i + 1]) && !(BPF_OP(code) == BPF_END && imm == 64))
1120 EMIT(PPC_RAW_LI(dst_reg_h, 0));
1121 }
1122
1123 /* Set end-of-body-code address for exit. */
1124 addrs[i] = ctx->idx * 4;
1125
1126 return 0;
1127 }
1128