1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Routines providing a simple monitor for use on the PowerMac.
4 *
5 * Copyright (C) 1996-2005 Paul Mackerras.
6 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/errno.h>
12 #include <linux/sched/signal.h>
13 #include <linux/smp.h>
14 #include <linux/mm.h>
15 #include <linux/reboot.h>
16 #include <linux/delay.h>
17 #include <linux/kallsyms.h>
18 #include <linux/kmsg_dump.h>
19 #include <linux/cpumask.h>
20 #include <linux/export.h>
21 #include <linux/sysrq.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/bug.h>
25 #include <linux/nmi.h>
26 #include <linux/ctype.h>
27 #include <linux/highmem.h>
28 #include <linux/security.h>
29 #include <linux/debugfs.h>
30
31 #include <asm/ptrace.h>
32 #include <asm/smp.h>
33 #include <asm/string.h>
34 #include <asm/prom.h>
35 #include <asm/machdep.h>
36 #include <asm/xmon.h>
37 #include <asm/processor.h>
38 #include <asm/mmu.h>
39 #include <asm/mmu_context.h>
40 #include <asm/plpar_wrappers.h>
41 #include <asm/cputable.h>
42 #include <asm/rtas.h>
43 #include <asm/sstep.h>
44 #include <asm/irq_regs.h>
45 #include <asm/spu.h>
46 #include <asm/spu_priv1.h>
47 #include <asm/setjmp.h>
48 #include <asm/reg.h>
49 #include <asm/debug.h>
50 #include <asm/hw_breakpoint.h>
51 #include <asm/xive.h>
52 #include <asm/opal.h>
53 #include <asm/firmware.h>
54 #include <asm/code-patching.h>
55 #include <asm/sections.h>
56 #include <asm/inst.h>
57 #include <asm/interrupt.h>
58
59 #ifdef CONFIG_PPC64
60 #include <asm/hvcall.h>
61 #include <asm/paca.h>
62 #include <asm/lppaca.h>
63 #endif
64
65 #include "nonstdio.h"
66 #include "dis-asm.h"
67 #include "xmon_bpts.h"
68
69 #ifdef CONFIG_SMP
70 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
71 static unsigned long xmon_taken = 1;
72 static int xmon_owner;
73 static int xmon_gate;
74 static int xmon_batch;
75 static unsigned long xmon_batch_start_cpu;
76 static cpumask_t xmon_batch_cpus = CPU_MASK_NONE;
77 #else
78 #define xmon_owner 0
79 #endif /* CONFIG_SMP */
80
81 #ifdef CONFIG_PPC_PSERIES
82 static int set_indicator_token = RTAS_UNKNOWN_SERVICE;
83 #endif
84 static unsigned long in_xmon __read_mostly = 0;
85 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
86 static bool xmon_is_ro = IS_ENABLED(CONFIG_XMON_DEFAULT_RO_MODE);
87
88 static unsigned long adrs;
89 static int size = 1;
90 #define MAX_DUMP (64 * 1024)
91 static unsigned long ndump = 64;
92 #define MAX_IDUMP (MAX_DUMP >> 2)
93 static unsigned long nidump = 16;
94 static unsigned long ncsum = 4096;
95 static int termch;
96 static char tmpstr[128];
97 static int tracing_enabled;
98
99 static long bus_error_jmp[JMP_BUF_LEN];
100 static int catch_memory_errors;
101 static int catch_spr_faults;
102 static long *xmon_fault_jmp[NR_CPUS];
103
104 /* Breakpoint stuff */
105 struct bpt {
106 unsigned long address;
107 u32 *instr;
108 atomic_t ref_count;
109 int enabled;
110 unsigned long pad;
111 };
112
113 /* Bits in bpt.enabled */
114 #define BP_CIABR 1
115 #define BP_TRAP 2
116 #define BP_DABR 4
117
118 static struct bpt bpts[NBPTS];
119 static struct bpt dabr[HBP_NUM_MAX];
120 static struct bpt *iabr;
121 static unsigned bpinstr = 0x7fe00008; /* trap */
122
123 #define BP_NUM(bp) ((bp) - bpts + 1)
124
125 /* Prototypes */
126 static int cmds(struct pt_regs *);
127 static int mread(unsigned long, void *, int);
128 static int mwrite(unsigned long, void *, int);
129 static int mread_instr(unsigned long, struct ppc_inst *);
130 static int handle_fault(struct pt_regs *);
131 static void byterev(unsigned char *, int);
132 static void memex(void);
133 static int bsesc(void);
134 static void dump(void);
135 static void show_pte(unsigned long);
136 static void prdump(unsigned long, long);
137 static int ppc_inst_dump(unsigned long, long, int);
138 static void dump_log_buf(void);
139
140 #ifdef CONFIG_SMP
141 static int xmon_switch_cpu(unsigned long);
142 static int xmon_batch_next_cpu(void);
143 static int batch_cmds(struct pt_regs *);
144 #endif
145
146 #ifdef CONFIG_PPC_POWERNV
147 static void dump_opal_msglog(void);
148 #else
dump_opal_msglog(void)149 static inline void dump_opal_msglog(void)
150 {
151 printf("Machine is not running OPAL firmware.\n");
152 }
153 #endif
154
155 static void backtrace(struct pt_regs *);
156 static void excprint(struct pt_regs *);
157 static void prregs(struct pt_regs *);
158 static void memops(int);
159 static void memlocate(void);
160 static void memzcan(void);
161 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
162 int skipbl(void);
163 int scanhex(unsigned long *valp);
164 static void scannl(void);
165 static int hexdigit(int);
166 void getstring(char *, int);
167 static void flush_input(void);
168 static int inchar(void);
169 static void take_input(char *);
170 static int read_spr(int, unsigned long *);
171 static void write_spr(int, unsigned long);
172 static void super_regs(void);
173 static void remove_bpts(void);
174 static void insert_bpts(void);
175 static void remove_cpu_bpts(void);
176 static void insert_cpu_bpts(void);
177 static struct bpt *at_breakpoint(unsigned long pc);
178 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
179 static int do_step(struct pt_regs *);
180 static void bpt_cmds(void);
181 static void cacheflush(void);
182 static int cpu_cmd(void);
183 static void csum(void);
184 static void bootcmds(void);
185 static void proccall(void);
186 static void show_tasks(void);
187 void dump_segments(void);
188 static void symbol_lookup(void);
189 static void xmon_show_stack(unsigned long sp, unsigned long lr,
190 unsigned long pc);
191 static void xmon_print_symbol(unsigned long address, const char *mid,
192 const char *after);
193 static const char *getvecname(unsigned long vec);
194
195 static int do_spu_cmd(void);
196
197 #ifdef CONFIG_44x
198 static void dump_tlb_44x(void);
199 #endif
200 #ifdef CONFIG_PPC_BOOK3E
201 static void dump_tlb_book3e(void);
202 #endif
203
204 static void clear_all_bpt(void);
205
206 #ifdef CONFIG_PPC64
207 #define REG "%.16lx"
208 #else
209 #define REG "%.8lx"
210 #endif
211
212 #ifdef __LITTLE_ENDIAN__
213 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
214 #else
215 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
216 #endif
217
218 static const char *xmon_ro_msg = "Operation disabled: xmon in read-only mode\n";
219
220 static char *help_string = "\
221 Commands:\n\
222 b show breakpoints\n\
223 bd set data breakpoint\n\
224 bi set instruction breakpoint\n\
225 bc clear breakpoint\n"
226 #ifdef CONFIG_SMP
227 "\
228 c print cpus stopped in xmon\n\
229 c# try to switch to cpu number h (in hex)\n\
230 c# $ run command '$' (one of 'r','S' or 't') on all cpus in xmon\n"
231 #endif
232 "\
233 C checksum\n\
234 d dump bytes\n\
235 d1 dump 1 byte values\n\
236 d2 dump 2 byte values\n\
237 d4 dump 4 byte values\n\
238 d8 dump 8 byte values\n\
239 di dump instructions\n\
240 df dump float values\n\
241 dd dump double values\n\
242 dl dump the kernel log buffer\n"
243 #ifdef CONFIG_PPC_POWERNV
244 "\
245 do dump the OPAL message log\n"
246 #endif
247 #ifdef CONFIG_PPC64
248 "\
249 dp[#] dump paca for current cpu, or cpu #\n\
250 dpa dump paca for all possible cpus\n"
251 #endif
252 "\
253 dr dump stream of raw bytes\n\
254 dv dump virtual address translation \n\
255 dt dump the tracing buffers (uses printk)\n\
256 dtc dump the tracing buffers for current CPU (uses printk)\n\
257 "
258 #ifdef CONFIG_PPC_POWERNV
259 " dx# dump xive on CPU #\n\
260 dxi# dump xive irq state #\n\
261 dxa dump xive on all CPUs\n"
262 #endif
263 " e print exception information\n\
264 f flush cache\n\
265 la lookup symbol+offset of specified address\n\
266 ls lookup address of specified symbol\n\
267 lp s [#] lookup address of percpu symbol s for current cpu, or cpu #\n\
268 m examine/change memory\n\
269 mm move a block of memory\n\
270 ms set a block of memory\n\
271 md compare two blocks of memory\n\
272 ml locate a block of memory\n\
273 mz zero a block of memory\n\
274 mi show information about memory allocation\n\
275 p call a procedure\n\
276 P list processes/tasks\n\
277 r print registers\n\
278 s single step\n"
279 #ifdef CONFIG_SPU_BASE
280 " ss stop execution on all spus\n\
281 sr restore execution on stopped spus\n\
282 sf # dump spu fields for spu # (in hex)\n\
283 sd # dump spu local store for spu # (in hex)\n\
284 sdi # disassemble spu local store for spu # (in hex)\n"
285 #endif
286 " S print special registers\n\
287 Sa print all SPRs\n\
288 Sr # read SPR #\n\
289 Sw #v write v to SPR #\n\
290 t print backtrace\n\
291 x exit monitor and recover\n\
292 X exit monitor and don't recover\n"
293 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
294 " u dump segment table or SLB\n"
295 #elif defined(CONFIG_PPC_BOOK3S_32)
296 " u dump segment registers\n"
297 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
298 " u dump TLB\n"
299 #endif
300 " U show uptime information\n"
301 " ? help\n"
302 " # n limit output to n lines per page (for dp, dpa, dl)\n"
303 " zr reboot\n"
304 " zh halt\n"
305 ;
306
307 #ifdef CONFIG_SECURITY
xmon_is_locked_down(void)308 static bool xmon_is_locked_down(void)
309 {
310 static bool lockdown;
311
312 if (!lockdown) {
313 lockdown = !!security_locked_down(LOCKDOWN_XMON_RW);
314 if (lockdown) {
315 printf("xmon: Disabled due to kernel lockdown\n");
316 xmon_is_ro = true;
317 }
318 }
319
320 if (!xmon_is_ro) {
321 xmon_is_ro = !!security_locked_down(LOCKDOWN_XMON_WR);
322 if (xmon_is_ro)
323 printf("xmon: Read-only due to kernel lockdown\n");
324 }
325
326 return lockdown;
327 }
328 #else /* CONFIG_SECURITY */
xmon_is_locked_down(void)329 static inline bool xmon_is_locked_down(void)
330 {
331 return false;
332 }
333 #endif
334
335 static struct pt_regs *xmon_regs;
336
sync(void)337 static inline void sync(void)
338 {
339 asm volatile("sync; isync");
340 }
341
cflush(void * p)342 static inline void cflush(void *p)
343 {
344 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
345 }
346
cinval(void * p)347 static inline void cinval(void *p)
348 {
349 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
350 }
351
352 /**
353 * write_ciabr() - write the CIABR SPR
354 * @ciabr: The value to write.
355 *
356 * This function writes a value to the CIARB register either directly
357 * through mtspr instruction if the kernel is in HV privilege mode or
358 * call a hypervisor function to achieve the same in case the kernel
359 * is in supervisor privilege mode.
360 */
write_ciabr(unsigned long ciabr)361 static void write_ciabr(unsigned long ciabr)
362 {
363 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
364 return;
365
366 if (cpu_has_feature(CPU_FTR_HVMODE)) {
367 mtspr(SPRN_CIABR, ciabr);
368 return;
369 }
370 plpar_set_ciabr(ciabr);
371 }
372
373 /**
374 * set_ciabr() - set the CIABR
375 * @addr: The value to set.
376 *
377 * This function sets the correct privilege value into the the HW
378 * breakpoint address before writing it up in the CIABR register.
379 */
set_ciabr(unsigned long addr)380 static void set_ciabr(unsigned long addr)
381 {
382 addr &= ~CIABR_PRIV;
383
384 if (cpu_has_feature(CPU_FTR_HVMODE))
385 addr |= CIABR_PRIV_HYPER;
386 else
387 addr |= CIABR_PRIV_SUPER;
388 write_ciabr(addr);
389 }
390
391 /*
392 * Disable surveillance (the service processor watchdog function)
393 * while we are in xmon.
394 * XXX we should re-enable it when we leave. :)
395 */
396 #define SURVEILLANCE_TOKEN 9000
397
disable_surveillance(void)398 static inline void disable_surveillance(void)
399 {
400 #ifdef CONFIG_PPC_PSERIES
401 /* Since this can't be a module, args should end up below 4GB. */
402 static struct rtas_args args;
403
404 /*
405 * At this point we have got all the cpus we can into
406 * xmon, so there is hopefully no other cpu calling RTAS
407 * at the moment, even though we don't take rtas.lock.
408 * If we did try to take rtas.lock there would be a
409 * real possibility of deadlock.
410 */
411 if (set_indicator_token == RTAS_UNKNOWN_SERVICE)
412 return;
413
414 rtas_call_unlocked(&args, set_indicator_token, 3, 1, NULL,
415 SURVEILLANCE_TOKEN, 0, 0);
416
417 #endif /* CONFIG_PPC_PSERIES */
418 }
419
420 #ifdef CONFIG_SMP
421 static int xmon_speaker;
422
get_output_lock(void)423 static void get_output_lock(void)
424 {
425 int me = smp_processor_id() + 0x100;
426 int last_speaker = 0, prev;
427 long timeout;
428
429 if (xmon_speaker == me)
430 return;
431
432 for (;;) {
433 last_speaker = cmpxchg(&xmon_speaker, 0, me);
434 if (last_speaker == 0)
435 return;
436
437 /*
438 * Wait a full second for the lock, we might be on a slow
439 * console, but check every 100us.
440 */
441 timeout = 10000;
442 while (xmon_speaker == last_speaker) {
443 if (--timeout > 0) {
444 udelay(100);
445 continue;
446 }
447
448 /* hostile takeover */
449 prev = cmpxchg(&xmon_speaker, last_speaker, me);
450 if (prev == last_speaker)
451 return;
452 break;
453 }
454 }
455 }
456
release_output_lock(void)457 static void release_output_lock(void)
458 {
459 xmon_speaker = 0;
460 }
461
cpus_are_in_xmon(void)462 int cpus_are_in_xmon(void)
463 {
464 return !cpumask_empty(&cpus_in_xmon);
465 }
466
wait_for_other_cpus(int ncpus)467 static bool wait_for_other_cpus(int ncpus)
468 {
469 unsigned long timeout;
470
471 /* We wait for 2s, which is a metric "little while" */
472 for (timeout = 20000; timeout != 0; --timeout) {
473 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
474 return true;
475 udelay(100);
476 barrier();
477 }
478
479 return false;
480 }
481 #else /* CONFIG_SMP */
get_output_lock(void)482 static inline void get_output_lock(void) {}
release_output_lock(void)483 static inline void release_output_lock(void) {}
484 #endif
485
xmon_touch_watchdogs(void)486 static void xmon_touch_watchdogs(void)
487 {
488 touch_softlockup_watchdog_sync();
489 rcu_cpu_stall_reset();
490 touch_nmi_watchdog();
491 }
492
xmon_core(struct pt_regs * regs,volatile int fromipi)493 static int xmon_core(struct pt_regs *regs, volatile int fromipi)
494 {
495 volatile int cmd = 0;
496 struct bpt *volatile bp;
497 long recurse_jmp[JMP_BUF_LEN];
498 bool locked_down;
499 unsigned long offset;
500 unsigned long flags;
501 #ifdef CONFIG_SMP
502 int cpu;
503 int secondary;
504 #endif
505
506 local_irq_save(flags);
507 hard_irq_disable();
508
509 locked_down = xmon_is_locked_down();
510
511 if (!fromipi) {
512 tracing_enabled = tracing_is_on();
513 tracing_off();
514 }
515
516 bp = in_breakpoint_table(regs->nip, &offset);
517 if (bp != NULL) {
518 regs_set_return_ip(regs, bp->address + offset);
519 atomic_dec(&bp->ref_count);
520 }
521
522 remove_cpu_bpts();
523
524 #ifdef CONFIG_SMP
525 cpu = smp_processor_id();
526 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
527 /*
528 * We catch SPR read/write faults here because the 0x700, 0xf60
529 * etc. handlers don't call debugger_fault_handler().
530 */
531 if (catch_spr_faults)
532 longjmp(bus_error_jmp, 1);
533 get_output_lock();
534 excprint(regs);
535 printf("cpu 0x%x: Exception %lx %s in xmon, "
536 "returning to main loop\n",
537 cpu, regs->trap, getvecname(TRAP(regs)));
538 release_output_lock();
539 longjmp(xmon_fault_jmp[cpu], 1);
540 }
541
542 if (setjmp(recurse_jmp) != 0) {
543 if (!in_xmon || !xmon_gate) {
544 get_output_lock();
545 printf("xmon: WARNING: bad recursive fault "
546 "on cpu 0x%x\n", cpu);
547 release_output_lock();
548 goto waiting;
549 }
550 secondary = !(xmon_taken && cpu == xmon_owner);
551 goto cmdloop;
552 }
553
554 xmon_fault_jmp[cpu] = recurse_jmp;
555
556 bp = NULL;
557 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
558 bp = at_breakpoint(regs->nip);
559 if (bp || regs_is_unrecoverable(regs))
560 fromipi = 0;
561
562 if (!fromipi) {
563 get_output_lock();
564 if (!locked_down)
565 excprint(regs);
566 if (bp) {
567 printf("cpu 0x%x stopped at breakpoint 0x%tx (",
568 cpu, BP_NUM(bp));
569 xmon_print_symbol(regs->nip, " ", ")\n");
570 }
571 if (regs_is_unrecoverable(regs))
572 printf("WARNING: exception is not recoverable, "
573 "can't continue\n");
574 release_output_lock();
575 }
576
577 cpumask_set_cpu(cpu, &cpus_in_xmon);
578
579 waiting:
580 secondary = 1;
581 spin_begin();
582 while (secondary && !xmon_gate) {
583 if (in_xmon == 0) {
584 if (fromipi) {
585 spin_end();
586 goto leave;
587 }
588 secondary = test_and_set_bit(0, &in_xmon);
589 }
590 spin_cpu_relax();
591 touch_nmi_watchdog();
592 }
593 spin_end();
594
595 if (!secondary && !xmon_gate) {
596 /* we are the first cpu to come in */
597 /* interrupt other cpu(s) */
598 int ncpus = num_online_cpus();
599
600 xmon_owner = cpu;
601 mb();
602 if (ncpus > 1) {
603 /*
604 * A system reset (trap == 0x100) can be triggered on
605 * all CPUs, so when we come in via 0x100 try waiting
606 * for the other CPUs to come in before we send the
607 * debugger break (IPI). This is similar to
608 * crash_kexec_secondary().
609 */
610 if (TRAP(regs) != INTERRUPT_SYSTEM_RESET || !wait_for_other_cpus(ncpus))
611 smp_send_debugger_break();
612
613 wait_for_other_cpus(ncpus);
614 }
615 remove_bpts();
616 disable_surveillance();
617
618 if (!locked_down) {
619 /* for breakpoint or single step, print curr insn */
620 if (bp || TRAP(regs) == INTERRUPT_TRACE)
621 ppc_inst_dump(regs->nip, 1, 0);
622 printf("enter ? for help\n");
623 }
624
625 mb();
626 xmon_gate = 1;
627 barrier();
628 touch_nmi_watchdog();
629 }
630
631 cmdloop:
632 while (in_xmon) {
633 if (secondary) {
634 spin_begin();
635 if (cpu == xmon_owner) {
636 if (!test_and_set_bit(0, &xmon_taken)) {
637 secondary = 0;
638 spin_end();
639 continue;
640 }
641 /* missed it */
642 while (cpu == xmon_owner)
643 spin_cpu_relax();
644 }
645 spin_cpu_relax();
646 touch_nmi_watchdog();
647 } else {
648 cmd = 1;
649 #ifdef CONFIG_SMP
650 if (xmon_batch)
651 cmd = batch_cmds(regs);
652 #endif
653 if (!locked_down && cmd)
654 cmd = cmds(regs);
655 if (locked_down || cmd != 0) {
656 /* exiting xmon */
657 insert_bpts();
658 xmon_gate = 0;
659 wmb();
660 in_xmon = 0;
661 break;
662 }
663 /* have switched to some other cpu */
664 secondary = 1;
665 }
666 }
667 leave:
668 cpumask_clear_cpu(cpu, &cpus_in_xmon);
669 xmon_fault_jmp[cpu] = NULL;
670 #else
671 /* UP is simple... */
672 if (in_xmon) {
673 printf("Exception %lx %s in xmon, returning to main loop\n",
674 regs->trap, getvecname(TRAP(regs)));
675 longjmp(xmon_fault_jmp[0], 1);
676 }
677 if (setjmp(recurse_jmp) == 0) {
678 xmon_fault_jmp[0] = recurse_jmp;
679 in_xmon = 1;
680
681 excprint(regs);
682 bp = at_breakpoint(regs->nip);
683 if (bp) {
684 printf("Stopped at breakpoint %tx (", BP_NUM(bp));
685 xmon_print_symbol(regs->nip, " ", ")\n");
686 }
687 if (regs_is_unrecoverable(regs))
688 printf("WARNING: exception is not recoverable, "
689 "can't continue\n");
690 remove_bpts();
691 disable_surveillance();
692 if (!locked_down) {
693 /* for breakpoint or single step, print current insn */
694 if (bp || TRAP(regs) == INTERRUPT_TRACE)
695 ppc_inst_dump(regs->nip, 1, 0);
696 printf("enter ? for help\n");
697 }
698 }
699
700 if (!locked_down)
701 cmd = cmds(regs);
702
703 insert_bpts();
704 in_xmon = 0;
705 #endif
706
707 #ifdef CONFIG_BOOKE
708 if (regs->msr & MSR_DE) {
709 bp = at_breakpoint(regs->nip);
710 if (bp != NULL) {
711 regs_set_return_ip(regs, (unsigned long) &bp->instr[0]);
712 atomic_inc(&bp->ref_count);
713 }
714 }
715 #else
716 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
717 bp = at_breakpoint(regs->nip);
718 if (bp != NULL) {
719 int stepped = emulate_step(regs, ppc_inst_read(bp->instr));
720 if (stepped == 0) {
721 regs_set_return_ip(regs, (unsigned long) &bp->instr[0]);
722 atomic_inc(&bp->ref_count);
723 } else if (stepped < 0) {
724 printf("Couldn't single-step %s instruction\n",
725 IS_RFID(ppc_inst_read(bp->instr))? "rfid": "mtmsrd");
726 }
727 }
728 }
729 #endif
730 if (locked_down)
731 clear_all_bpt();
732 else
733 insert_cpu_bpts();
734
735 xmon_touch_watchdogs();
736 local_irq_restore(flags);
737
738 return cmd != 'X' && cmd != EOF;
739 }
740
xmon(struct pt_regs * excp)741 int xmon(struct pt_regs *excp)
742 {
743 struct pt_regs regs;
744
745 if (excp == NULL) {
746 ppc_save_regs(®s);
747 excp = ®s;
748 }
749
750 return xmon_core(excp, 0);
751 }
752 EXPORT_SYMBOL(xmon);
753
xmon_irq(int irq,void * d)754 irqreturn_t xmon_irq(int irq, void *d)
755 {
756 unsigned long flags;
757 local_irq_save(flags);
758 printf("Keyboard interrupt\n");
759 xmon(get_irq_regs());
760 local_irq_restore(flags);
761 return IRQ_HANDLED;
762 }
763
xmon_bpt(struct pt_regs * regs)764 static int xmon_bpt(struct pt_regs *regs)
765 {
766 struct bpt *bp;
767 unsigned long offset;
768
769 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
770 return 0;
771
772 /* Are we at the trap at bp->instr[1] for some bp? */
773 bp = in_breakpoint_table(regs->nip, &offset);
774 if (bp != NULL && (offset == 4 || offset == 8)) {
775 regs_set_return_ip(regs, bp->address + offset);
776 atomic_dec(&bp->ref_count);
777 return 1;
778 }
779
780 /* Are we at a breakpoint? */
781 bp = at_breakpoint(regs->nip);
782 if (!bp)
783 return 0;
784
785 xmon_core(regs, 0);
786
787 return 1;
788 }
789
xmon_sstep(struct pt_regs * regs)790 static int xmon_sstep(struct pt_regs *regs)
791 {
792 if (user_mode(regs))
793 return 0;
794 xmon_core(regs, 0);
795 return 1;
796 }
797
xmon_break_match(struct pt_regs * regs)798 static int xmon_break_match(struct pt_regs *regs)
799 {
800 int i;
801
802 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
803 return 0;
804 for (i = 0; i < nr_wp_slots(); i++) {
805 if (dabr[i].enabled)
806 goto found;
807 }
808 return 0;
809
810 found:
811 xmon_core(regs, 0);
812 return 1;
813 }
814
xmon_iabr_match(struct pt_regs * regs)815 static int xmon_iabr_match(struct pt_regs *regs)
816 {
817 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
818 return 0;
819 if (iabr == NULL)
820 return 0;
821 xmon_core(regs, 0);
822 return 1;
823 }
824
xmon_ipi(struct pt_regs * regs)825 static int xmon_ipi(struct pt_regs *regs)
826 {
827 #ifdef CONFIG_SMP
828 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
829 xmon_core(regs, 1);
830 #endif
831 return 0;
832 }
833
xmon_fault_handler(struct pt_regs * regs)834 static int xmon_fault_handler(struct pt_regs *regs)
835 {
836 struct bpt *bp;
837 unsigned long offset;
838
839 if (in_xmon && catch_memory_errors)
840 handle_fault(regs); /* doesn't return */
841
842 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
843 bp = in_breakpoint_table(regs->nip, &offset);
844 if (bp != NULL) {
845 regs_set_return_ip(regs, bp->address + offset);
846 atomic_dec(&bp->ref_count);
847 }
848 }
849
850 return 0;
851 }
852
853 /* Force enable xmon if not already enabled */
force_enable_xmon(void)854 static inline void force_enable_xmon(void)
855 {
856 /* Enable xmon hooks if needed */
857 if (!xmon_on) {
858 printf("xmon: Enabling debugger hooks\n");
859 xmon_on = 1;
860 }
861 }
862
at_breakpoint(unsigned long pc)863 static struct bpt *at_breakpoint(unsigned long pc)
864 {
865 int i;
866 struct bpt *volatile bp;
867
868 bp = bpts;
869 for (i = 0; i < NBPTS; ++i, ++bp)
870 if (bp->enabled && pc == bp->address)
871 return bp;
872 return NULL;
873 }
874
in_breakpoint_table(unsigned long nip,unsigned long * offp)875 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
876 {
877 unsigned long off;
878
879 off = nip - (unsigned long)bpt_table;
880 if (off >= sizeof(bpt_table))
881 return NULL;
882 *offp = off & (BPT_SIZE - 1);
883 if (off & 3)
884 return NULL;
885 return bpts + (off / BPT_SIZE);
886 }
887
new_breakpoint(unsigned long a)888 static struct bpt *new_breakpoint(unsigned long a)
889 {
890 struct bpt *bp;
891
892 a &= ~3UL;
893 bp = at_breakpoint(a);
894 if (bp)
895 return bp;
896
897 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
898 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
899 bp->address = a;
900 bp->instr = (void *)(bpt_table + ((bp - bpts) * BPT_WORDS));
901 return bp;
902 }
903 }
904
905 printf("Sorry, no free breakpoints. Please clear one first.\n");
906 return NULL;
907 }
908
insert_bpts(void)909 static void insert_bpts(void)
910 {
911 int i;
912 struct ppc_inst instr, instr2;
913 struct bpt *bp, *bp2;
914
915 bp = bpts;
916 for (i = 0; i < NBPTS; ++i, ++bp) {
917 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
918 continue;
919 if (!mread_instr(bp->address, &instr)) {
920 printf("Couldn't read instruction at %lx, "
921 "disabling breakpoint there\n", bp->address);
922 bp->enabled = 0;
923 continue;
924 }
925 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
926 printf("Breakpoint at %lx is on an mtmsrd or rfid "
927 "instruction, disabling it\n", bp->address);
928 bp->enabled = 0;
929 continue;
930 }
931 /*
932 * Check the address is not a suffix by looking for a prefix in
933 * front of it.
934 */
935 if (mread_instr(bp->address - 4, &instr2) == 8) {
936 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n",
937 bp->address);
938 bp->enabled = 0;
939 continue;
940 }
941 /*
942 * We might still be a suffix - if the prefix has already been
943 * replaced by a breakpoint we won't catch it with the above
944 * test.
945 */
946 bp2 = at_breakpoint(bp->address - 4);
947 if (bp2 && ppc_inst_prefixed(ppc_inst_read(bp2->instr))) {
948 printf("Breakpoint at %lx is on the second word of a prefixed instruction, disabling it\n",
949 bp->address);
950 bp->enabled = 0;
951 continue;
952 }
953
954 patch_instruction(bp->instr, instr);
955 patch_instruction(ppc_inst_next(bp->instr, bp->instr),
956 ppc_inst(bpinstr));
957 if (bp->enabled & BP_CIABR)
958 continue;
959 if (patch_instruction((u32 *)bp->address,
960 ppc_inst(bpinstr)) != 0) {
961 printf("Couldn't write instruction at %lx, "
962 "disabling breakpoint there\n", bp->address);
963 bp->enabled &= ~BP_TRAP;
964 continue;
965 }
966 }
967 }
968
insert_cpu_bpts(void)969 static void insert_cpu_bpts(void)
970 {
971 int i;
972 struct arch_hw_breakpoint brk;
973
974 for (i = 0; i < nr_wp_slots(); i++) {
975 if (dabr[i].enabled) {
976 brk.address = dabr[i].address;
977 brk.type = (dabr[i].enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
978 brk.len = 8;
979 brk.hw_len = 8;
980 __set_breakpoint(i, &brk);
981 }
982 }
983
984 if (iabr)
985 set_ciabr(iabr->address);
986 }
987
remove_bpts(void)988 static void remove_bpts(void)
989 {
990 int i;
991 struct bpt *bp;
992 struct ppc_inst instr;
993
994 bp = bpts;
995 for (i = 0; i < NBPTS; ++i, ++bp) {
996 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
997 continue;
998 if (mread_instr(bp->address, &instr)
999 && ppc_inst_equal(instr, ppc_inst(bpinstr))
1000 && patch_instruction(
1001 (u32 *)bp->address, ppc_inst_read(bp->instr)) != 0)
1002 printf("Couldn't remove breakpoint at %lx\n",
1003 bp->address);
1004 }
1005 }
1006
remove_cpu_bpts(void)1007 static void remove_cpu_bpts(void)
1008 {
1009 hw_breakpoint_disable();
1010 write_ciabr(0);
1011 }
1012
1013 /* Based on uptime_proc_show(). */
1014 static void
show_uptime(void)1015 show_uptime(void)
1016 {
1017 struct timespec64 uptime;
1018
1019 if (setjmp(bus_error_jmp) == 0) {
1020 catch_memory_errors = 1;
1021 sync();
1022
1023 ktime_get_coarse_boottime_ts64(&uptime);
1024 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec,
1025 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100)));
1026
1027 sync();
1028 __delay(200); \
1029 }
1030 catch_memory_errors = 0;
1031 }
1032
set_lpp_cmd(void)1033 static void set_lpp_cmd(void)
1034 {
1035 unsigned long lpp;
1036
1037 if (!scanhex(&lpp)) {
1038 printf("Invalid number.\n");
1039 lpp = 0;
1040 }
1041 xmon_set_pagination_lpp(lpp);
1042 }
1043 /* Command interpreting routine */
1044 static char *last_cmd;
1045
1046 static int
cmds(struct pt_regs * excp)1047 cmds(struct pt_regs *excp)
1048 {
1049 int cmd = 0;
1050
1051 last_cmd = NULL;
1052 xmon_regs = excp;
1053
1054 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1055
1056 for(;;) {
1057 #ifdef CONFIG_SMP
1058 printf("%x:", smp_processor_id());
1059 #endif /* CONFIG_SMP */
1060 printf("mon> ");
1061 flush_input();
1062 termch = 0;
1063 cmd = skipbl();
1064 if( cmd == '\n' ) {
1065 if (last_cmd == NULL)
1066 continue;
1067 take_input(last_cmd);
1068 last_cmd = NULL;
1069 cmd = inchar();
1070 }
1071 switch (cmd) {
1072 case 'm':
1073 cmd = inchar();
1074 switch (cmd) {
1075 case 'm':
1076 case 's':
1077 case 'd':
1078 memops(cmd);
1079 break;
1080 case 'l':
1081 memlocate();
1082 break;
1083 case 'z':
1084 if (xmon_is_ro) {
1085 printf(xmon_ro_msg);
1086 break;
1087 }
1088 memzcan();
1089 break;
1090 case 'i':
1091 show_mem(0, NULL);
1092 break;
1093 default:
1094 termch = cmd;
1095 memex();
1096 }
1097 break;
1098 case 'd':
1099 dump();
1100 break;
1101 case 'l':
1102 symbol_lookup();
1103 break;
1104 case 'r':
1105 prregs(excp); /* print regs */
1106 break;
1107 case 'e':
1108 excprint(excp);
1109 break;
1110 case 'S':
1111 super_regs();
1112 break;
1113 case 't':
1114 backtrace(excp);
1115 break;
1116 case 'f':
1117 cacheflush();
1118 break;
1119 case 's':
1120 if (do_spu_cmd() == 0)
1121 break;
1122 if (do_step(excp))
1123 return cmd;
1124 break;
1125 case 'x':
1126 case 'X':
1127 if (tracing_enabled)
1128 tracing_on();
1129 return cmd;
1130 case EOF:
1131 printf(" <no input ...>\n");
1132 mdelay(2000);
1133 return cmd;
1134 case '?':
1135 xmon_puts(help_string);
1136 break;
1137 case '#':
1138 set_lpp_cmd();
1139 break;
1140 case 'b':
1141 bpt_cmds();
1142 break;
1143 case 'C':
1144 csum();
1145 break;
1146 case 'c':
1147 if (cpu_cmd())
1148 return 0;
1149 break;
1150 case 'z':
1151 bootcmds();
1152 break;
1153 case 'p':
1154 if (xmon_is_ro) {
1155 printf(xmon_ro_msg);
1156 break;
1157 }
1158 proccall();
1159 break;
1160 case 'P':
1161 show_tasks();
1162 break;
1163 #ifdef CONFIG_PPC_BOOK3S
1164 case 'u':
1165 dump_segments();
1166 break;
1167 #elif defined(CONFIG_44x)
1168 case 'u':
1169 dump_tlb_44x();
1170 break;
1171 #elif defined(CONFIG_PPC_BOOK3E)
1172 case 'u':
1173 dump_tlb_book3e();
1174 break;
1175 #endif
1176 case 'U':
1177 show_uptime();
1178 break;
1179 default:
1180 printf("Unrecognized command: ");
1181 do {
1182 if (' ' < cmd && cmd <= '~')
1183 putchar(cmd);
1184 else
1185 printf("\\x%x", cmd);
1186 cmd = inchar();
1187 } while (cmd != '\n');
1188 printf(" (type ? for help)\n");
1189 break;
1190 }
1191 }
1192 }
1193
1194 #ifdef CONFIG_BOOKE
do_step(struct pt_regs * regs)1195 static int do_step(struct pt_regs *regs)
1196 {
1197 regs_set_return_msr(regs, regs->msr | MSR_DE);
1198 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1199 return 1;
1200 }
1201 #else
1202 /*
1203 * Step a single instruction.
1204 * Some instructions we emulate, others we execute with MSR_SE set.
1205 */
do_step(struct pt_regs * regs)1206 static int do_step(struct pt_regs *regs)
1207 {
1208 struct ppc_inst instr;
1209 int stepped;
1210
1211 force_enable_xmon();
1212 /* check we are in 64-bit kernel mode, translation enabled */
1213 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1214 if (mread_instr(regs->nip, &instr)) {
1215 stepped = emulate_step(regs, instr);
1216 if (stepped < 0) {
1217 printf("Couldn't single-step %s instruction\n",
1218 (IS_RFID(instr)? "rfid": "mtmsrd"));
1219 return 0;
1220 }
1221 if (stepped > 0) {
1222 set_trap(regs, 0xd00);
1223 printf("stepped to ");
1224 xmon_print_symbol(regs->nip, " ", "\n");
1225 ppc_inst_dump(regs->nip, 1, 0);
1226 return 0;
1227 }
1228 }
1229 }
1230 regs_set_return_msr(regs, regs->msr | MSR_SE);
1231 return 1;
1232 }
1233 #endif
1234
bootcmds(void)1235 static void bootcmds(void)
1236 {
1237 char tmp[64];
1238 int cmd;
1239
1240 cmd = inchar();
1241 if (cmd == 'r') {
1242 getstring(tmp, 64);
1243 ppc_md.restart(tmp);
1244 } else if (cmd == 'h') {
1245 ppc_md.halt();
1246 } else if (cmd == 'p') {
1247 if (pm_power_off)
1248 pm_power_off();
1249 }
1250 }
1251
1252 #ifdef CONFIG_SMP
xmon_switch_cpu(unsigned long cpu)1253 static int xmon_switch_cpu(unsigned long cpu)
1254 {
1255 int timeout;
1256
1257 xmon_taken = 0;
1258 mb();
1259 xmon_owner = cpu;
1260 timeout = 10000000;
1261 while (!xmon_taken) {
1262 if (--timeout == 0) {
1263 if (test_and_set_bit(0, &xmon_taken))
1264 break;
1265 /* take control back */
1266 mb();
1267 xmon_owner = smp_processor_id();
1268 printf("cpu 0x%lx didn't take control\n", cpu);
1269 return 0;
1270 }
1271 barrier();
1272 }
1273 return 1;
1274 }
1275
xmon_batch_next_cpu(void)1276 static int xmon_batch_next_cpu(void)
1277 {
1278 unsigned long cpu;
1279
1280 while (!cpumask_empty(&xmon_batch_cpus)) {
1281 cpu = cpumask_next_wrap(smp_processor_id(), &xmon_batch_cpus,
1282 xmon_batch_start_cpu, true);
1283 if (cpu == nr_cpumask_bits)
1284 break;
1285 if (xmon_batch_start_cpu == -1)
1286 xmon_batch_start_cpu = cpu;
1287 if (xmon_switch_cpu(cpu))
1288 return 0;
1289 cpumask_clear_cpu(cpu, &xmon_batch_cpus);
1290 }
1291
1292 xmon_batch = 0;
1293 printf("%x:mon> \n", smp_processor_id());
1294 return 1;
1295 }
1296
batch_cmds(struct pt_regs * excp)1297 static int batch_cmds(struct pt_regs *excp)
1298 {
1299 int cmd;
1300
1301 /* simulate command entry */
1302 cmd = xmon_batch;
1303 termch = '\n';
1304
1305 last_cmd = NULL;
1306 xmon_regs = excp;
1307
1308 printf("%x:", smp_processor_id());
1309 printf("mon> ");
1310 printf("%c\n", (char)cmd);
1311
1312 switch (cmd) {
1313 case 'r':
1314 prregs(excp); /* print regs */
1315 break;
1316 case 'S':
1317 super_regs();
1318 break;
1319 case 't':
1320 backtrace(excp);
1321 break;
1322 }
1323
1324 cpumask_clear_cpu(smp_processor_id(), &xmon_batch_cpus);
1325
1326 return xmon_batch_next_cpu();
1327 }
1328
cpu_cmd(void)1329 static int cpu_cmd(void)
1330 {
1331 unsigned long cpu, first_cpu, last_cpu;
1332
1333 cpu = skipbl();
1334 if (cpu == '#') {
1335 xmon_batch = skipbl();
1336 if (xmon_batch) {
1337 switch (xmon_batch) {
1338 case 'r':
1339 case 'S':
1340 case 't':
1341 cpumask_copy(&xmon_batch_cpus, &cpus_in_xmon);
1342 if (cpumask_weight(&xmon_batch_cpus) <= 1) {
1343 printf("There are no other cpus in xmon\n");
1344 break;
1345 }
1346 xmon_batch_start_cpu = -1;
1347 if (!xmon_batch_next_cpu())
1348 return 1;
1349 break;
1350 default:
1351 printf("c# only supports 'r', 'S' and 't' commands\n");
1352 }
1353 xmon_batch = 0;
1354 return 0;
1355 }
1356 }
1357 termch = cpu;
1358
1359 if (!scanhex(&cpu)) {
1360 /* print cpus waiting or in xmon */
1361 printf("cpus stopped:");
1362 last_cpu = first_cpu = NR_CPUS;
1363 for_each_possible_cpu(cpu) {
1364 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1365 if (cpu == last_cpu + 1) {
1366 last_cpu = cpu;
1367 } else {
1368 if (last_cpu != first_cpu)
1369 printf("-0x%lx", last_cpu);
1370 last_cpu = first_cpu = cpu;
1371 printf(" 0x%lx", cpu);
1372 }
1373 }
1374 }
1375 if (last_cpu != first_cpu)
1376 printf("-0x%lx", last_cpu);
1377 printf("\n");
1378 return 0;
1379 }
1380 /* try to switch to cpu specified */
1381 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1382 printf("cpu 0x%lx isn't in xmon\n", cpu);
1383 #ifdef CONFIG_PPC64
1384 printf("backtrace of paca[0x%lx].saved_r1 (possibly stale):\n", cpu);
1385 xmon_show_stack(paca_ptrs[cpu]->saved_r1, 0, 0);
1386 #endif
1387 return 0;
1388 }
1389
1390 return xmon_switch_cpu(cpu);
1391 }
1392 #else
cpu_cmd(void)1393 static int cpu_cmd(void)
1394 {
1395 return 0;
1396 }
1397 #endif /* CONFIG_SMP */
1398
1399 static unsigned short fcstab[256] = {
1400 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1401 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1402 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1403 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1404 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1405 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1406 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1407 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1408 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1409 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1410 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1411 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1412 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1413 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1414 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1415 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1416 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1417 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1418 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1419 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1420 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1421 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1422 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1423 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1424 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1425 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1426 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1427 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1428 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1429 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1430 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1431 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1432 };
1433
1434 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1435
1436 static void
csum(void)1437 csum(void)
1438 {
1439 unsigned int i;
1440 unsigned short fcs;
1441 unsigned char v;
1442
1443 if (!scanhex(&adrs))
1444 return;
1445 if (!scanhex(&ncsum))
1446 return;
1447 fcs = 0xffff;
1448 for (i = 0; i < ncsum; ++i) {
1449 if (mread(adrs+i, &v, 1) == 0) {
1450 printf("csum stopped at "REG"\n", adrs+i);
1451 break;
1452 }
1453 fcs = FCS(fcs, v);
1454 }
1455 printf("%x\n", fcs);
1456 }
1457
1458 /*
1459 * Check if this is a suitable place to put a breakpoint.
1460 */
check_bp_loc(unsigned long addr)1461 static long check_bp_loc(unsigned long addr)
1462 {
1463 struct ppc_inst instr;
1464
1465 addr &= ~3;
1466 if (!is_kernel_addr(addr)) {
1467 printf("Breakpoints may only be placed at kernel addresses\n");
1468 return 0;
1469 }
1470 if (!mread_instr(addr, &instr)) {
1471 printf("Can't read instruction at address %lx\n", addr);
1472 return 0;
1473 }
1474 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1475 printf("Breakpoints may not be placed on mtmsrd or rfid "
1476 "instructions\n");
1477 return 0;
1478 }
1479 return 1;
1480 }
1481
find_free_data_bpt(void)1482 static int find_free_data_bpt(void)
1483 {
1484 int i;
1485
1486 for (i = 0; i < nr_wp_slots(); i++) {
1487 if (!dabr[i].enabled)
1488 return i;
1489 }
1490 printf("Couldn't find free breakpoint register\n");
1491 return -1;
1492 }
1493
print_data_bpts(void)1494 static void print_data_bpts(void)
1495 {
1496 int i;
1497
1498 for (i = 0; i < nr_wp_slots(); i++) {
1499 if (!dabr[i].enabled)
1500 continue;
1501
1502 printf(" data "REG" [", dabr[i].address);
1503 if (dabr[i].enabled & 1)
1504 printf("r");
1505 if (dabr[i].enabled & 2)
1506 printf("w");
1507 printf("]\n");
1508 }
1509 }
1510
1511 static char *breakpoint_help_string =
1512 "Breakpoint command usage:\n"
1513 "b show breakpoints\n"
1514 "b <addr> [cnt] set breakpoint at given instr addr\n"
1515 "bc clear all breakpoints\n"
1516 "bc <n/addr> clear breakpoint number n or at addr\n"
1517 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1518 "bd <addr> [cnt] set hardware data breakpoint\n"
1519 "";
1520
1521 static void
bpt_cmds(void)1522 bpt_cmds(void)
1523 {
1524 int cmd;
1525 unsigned long a;
1526 int i;
1527 struct bpt *bp;
1528
1529 cmd = inchar();
1530
1531 switch (cmd) {
1532 case 'd': { /* bd - hardware data breakpoint */
1533 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1534 int mode;
1535 if (xmon_is_ro) {
1536 printf(xmon_ro_msg);
1537 break;
1538 }
1539 if (!ppc_breakpoint_available()) {
1540 printf("Hardware data breakpoint not supported on this cpu\n");
1541 break;
1542 }
1543 i = find_free_data_bpt();
1544 if (i < 0)
1545 break;
1546 mode = 7;
1547 cmd = inchar();
1548 if (cmd == 'r')
1549 mode = 5;
1550 else if (cmd == 'w')
1551 mode = 6;
1552 else
1553 termch = cmd;
1554 dabr[i].address = 0;
1555 dabr[i].enabled = 0;
1556 if (scanhex(&dabr[i].address)) {
1557 if (!is_kernel_addr(dabr[i].address)) {
1558 printf(badaddr);
1559 break;
1560 }
1561 dabr[i].address &= ~HW_BRK_TYPE_DABR;
1562 dabr[i].enabled = mode | BP_DABR;
1563 }
1564
1565 force_enable_xmon();
1566 break;
1567 }
1568
1569 case 'i': /* bi - hardware instr breakpoint */
1570 if (xmon_is_ro) {
1571 printf(xmon_ro_msg);
1572 break;
1573 }
1574 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1575 printf("Hardware instruction breakpoint "
1576 "not supported on this cpu\n");
1577 break;
1578 }
1579 if (iabr) {
1580 iabr->enabled &= ~BP_CIABR;
1581 iabr = NULL;
1582 }
1583 if (!scanhex(&a))
1584 break;
1585 if (!check_bp_loc(a))
1586 break;
1587 bp = new_breakpoint(a);
1588 if (bp != NULL) {
1589 bp->enabled |= BP_CIABR;
1590 iabr = bp;
1591 force_enable_xmon();
1592 }
1593 break;
1594
1595 case 'c':
1596 if (!scanhex(&a)) {
1597 /* clear all breakpoints */
1598 for (i = 0; i < NBPTS; ++i)
1599 bpts[i].enabled = 0;
1600 iabr = NULL;
1601 for (i = 0; i < nr_wp_slots(); i++)
1602 dabr[i].enabled = 0;
1603
1604 printf("All breakpoints cleared\n");
1605 break;
1606 }
1607
1608 if (a <= NBPTS && a >= 1) {
1609 /* assume a breakpoint number */
1610 bp = &bpts[a-1]; /* bp nums are 1 based */
1611 } else {
1612 /* assume a breakpoint address */
1613 bp = at_breakpoint(a);
1614 if (bp == NULL) {
1615 printf("No breakpoint at %lx\n", a);
1616 break;
1617 }
1618 }
1619
1620 printf("Cleared breakpoint %tx (", BP_NUM(bp));
1621 xmon_print_symbol(bp->address, " ", ")\n");
1622 bp->enabled = 0;
1623 break;
1624
1625 default:
1626 termch = cmd;
1627 cmd = skipbl();
1628 if (cmd == '?') {
1629 printf(breakpoint_help_string);
1630 break;
1631 }
1632 termch = cmd;
1633
1634 if (xmon_is_ro || !scanhex(&a)) {
1635 /* print all breakpoints */
1636 printf(" type address\n");
1637 print_data_bpts();
1638 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1639 if (!bp->enabled)
1640 continue;
1641 printf("%tx %s ", BP_NUM(bp),
1642 (bp->enabled & BP_CIABR) ? "inst": "trap");
1643 xmon_print_symbol(bp->address, " ", "\n");
1644 }
1645 break;
1646 }
1647
1648 if (!check_bp_loc(a))
1649 break;
1650 bp = new_breakpoint(a);
1651 if (bp != NULL) {
1652 bp->enabled |= BP_TRAP;
1653 force_enable_xmon();
1654 }
1655 break;
1656 }
1657 }
1658
1659 /* Very cheap human name for vector lookup. */
1660 static
getvecname(unsigned long vec)1661 const char *getvecname(unsigned long vec)
1662 {
1663 char *ret;
1664
1665 switch (vec) {
1666 case 0x100: ret = "(System Reset)"; break;
1667 case 0x200: ret = "(Machine Check)"; break;
1668 case 0x300: ret = "(Data Access)"; break;
1669 case 0x380:
1670 if (radix_enabled())
1671 ret = "(Data Access Out of Range)";
1672 else
1673 ret = "(Data SLB Access)";
1674 break;
1675 case 0x400: ret = "(Instruction Access)"; break;
1676 case 0x480:
1677 if (radix_enabled())
1678 ret = "(Instruction Access Out of Range)";
1679 else
1680 ret = "(Instruction SLB Access)";
1681 break;
1682 case 0x500: ret = "(Hardware Interrupt)"; break;
1683 case 0x600: ret = "(Alignment)"; break;
1684 case 0x700: ret = "(Program Check)"; break;
1685 case 0x800: ret = "(FPU Unavailable)"; break;
1686 case 0x900: ret = "(Decrementer)"; break;
1687 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1688 case 0xa00: ret = "(Doorbell)"; break;
1689 case 0xc00: ret = "(System Call)"; break;
1690 case 0xd00: ret = "(Single Step)"; break;
1691 case 0xe40: ret = "(Emulation Assist)"; break;
1692 case 0xe60: ret = "(HMI)"; break;
1693 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1694 case 0xf00: ret = "(Performance Monitor)"; break;
1695 case 0xf20: ret = "(Altivec Unavailable)"; break;
1696 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1697 case 0x1500: ret = "(Denormalisation)"; break;
1698 case 0x1700: ret = "(Altivec Assist)"; break;
1699 case 0x3000: ret = "(System Call Vectored)"; break;
1700 default: ret = "";
1701 }
1702 return ret;
1703 }
1704
get_function_bounds(unsigned long pc,unsigned long * startp,unsigned long * endp)1705 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1706 unsigned long *endp)
1707 {
1708 unsigned long size, offset;
1709 const char *name;
1710
1711 *startp = *endp = 0;
1712 if (pc == 0)
1713 return;
1714 if (setjmp(bus_error_jmp) == 0) {
1715 catch_memory_errors = 1;
1716 sync();
1717 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1718 if (name != NULL) {
1719 *startp = pc - offset;
1720 *endp = pc - offset + size;
1721 }
1722 sync();
1723 }
1724 catch_memory_errors = 0;
1725 }
1726
1727 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1728 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1729
xmon_show_stack(unsigned long sp,unsigned long lr,unsigned long pc)1730 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1731 unsigned long pc)
1732 {
1733 int max_to_print = 64;
1734 unsigned long ip;
1735 unsigned long newsp;
1736 unsigned long marker;
1737 struct pt_regs regs;
1738
1739 while (max_to_print--) {
1740 if (!is_kernel_addr(sp)) {
1741 if (sp != 0)
1742 printf("SP (%lx) is in userspace\n", sp);
1743 break;
1744 }
1745
1746 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1747 || !mread(sp, &newsp, sizeof(unsigned long))) {
1748 printf("Couldn't read stack frame at %lx\n", sp);
1749 break;
1750 }
1751
1752 /*
1753 * For the first stack frame, try to work out if
1754 * LR and/or the saved LR value in the bottommost
1755 * stack frame are valid.
1756 */
1757 if ((pc | lr) != 0) {
1758 unsigned long fnstart, fnend;
1759 unsigned long nextip;
1760 int printip = 1;
1761
1762 get_function_bounds(pc, &fnstart, &fnend);
1763 nextip = 0;
1764 if (newsp > sp)
1765 mread(newsp + LRSAVE_OFFSET, &nextip,
1766 sizeof(unsigned long));
1767 if (lr == ip) {
1768 if (!is_kernel_addr(lr)
1769 || (fnstart <= lr && lr < fnend))
1770 printip = 0;
1771 } else if (lr == nextip) {
1772 printip = 0;
1773 } else if (is_kernel_addr(lr)
1774 && !(fnstart <= lr && lr < fnend)) {
1775 printf("[link register ] ");
1776 xmon_print_symbol(lr, " ", "\n");
1777 }
1778 if (printip) {
1779 printf("["REG"] ", sp);
1780 xmon_print_symbol(ip, " ", " (unreliable)\n");
1781 }
1782 pc = lr = 0;
1783
1784 } else {
1785 printf("["REG"] ", sp);
1786 xmon_print_symbol(ip, " ", "\n");
1787 }
1788
1789 /* Look for "regshere" marker to see if this is
1790 an exception frame. */
1791 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1792 && marker == STACK_FRAME_REGS_MARKER) {
1793 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs))
1794 != sizeof(regs)) {
1795 printf("Couldn't read registers at %lx\n",
1796 sp + STACK_FRAME_OVERHEAD);
1797 break;
1798 }
1799 printf("--- Exception: %lx %s at ", regs.trap,
1800 getvecname(TRAP(®s)));
1801 pc = regs.nip;
1802 lr = regs.link;
1803 xmon_print_symbol(pc, " ", "\n");
1804 }
1805
1806 if (newsp == 0)
1807 break;
1808
1809 sp = newsp;
1810 }
1811 }
1812
backtrace(struct pt_regs * excp)1813 static void backtrace(struct pt_regs *excp)
1814 {
1815 unsigned long sp;
1816
1817 if (scanhex(&sp))
1818 xmon_show_stack(sp, 0, 0);
1819 else
1820 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1821 scannl();
1822 }
1823
print_bug_trap(struct pt_regs * regs)1824 static void print_bug_trap(struct pt_regs *regs)
1825 {
1826 #ifdef CONFIG_BUG
1827 const struct bug_entry *bug;
1828 unsigned long addr;
1829
1830 if (regs->msr & MSR_PR)
1831 return; /* not in kernel */
1832 addr = regs->nip; /* address of trap instruction */
1833 if (!is_kernel_addr(addr))
1834 return;
1835 bug = find_bug(regs->nip);
1836 if (bug == NULL)
1837 return;
1838 if (is_warning_bug(bug))
1839 return;
1840
1841 #ifdef CONFIG_DEBUG_BUGVERBOSE
1842 printf("kernel BUG at %s:%u!\n",
1843 (char *)bug + bug->file_disp, bug->line);
1844 #else
1845 printf("kernel BUG at %px!\n", (void *)bug + bug->bug_addr_disp);
1846 #endif
1847 #endif /* CONFIG_BUG */
1848 }
1849
excprint(struct pt_regs * fp)1850 static void excprint(struct pt_regs *fp)
1851 {
1852 unsigned long trap;
1853
1854 #ifdef CONFIG_SMP
1855 printf("cpu 0x%x: ", smp_processor_id());
1856 #endif /* CONFIG_SMP */
1857
1858 trap = TRAP(fp);
1859 printf("Vector: %lx %s at [%px]\n", fp->trap, getvecname(trap), fp);
1860 printf(" pc: ");
1861 xmon_print_symbol(fp->nip, ": ", "\n");
1862
1863 printf(" lr: ");
1864 xmon_print_symbol(fp->link, ": ", "\n");
1865
1866 printf(" sp: %lx\n", fp->gpr[1]);
1867 printf(" msr: %lx\n", fp->msr);
1868
1869 if (trap == INTERRUPT_DATA_STORAGE ||
1870 trap == INTERRUPT_DATA_SEGMENT ||
1871 trap == INTERRUPT_ALIGNMENT ||
1872 trap == INTERRUPT_MACHINE_CHECK) {
1873 printf(" dar: %lx\n", fp->dar);
1874 if (trap != INTERRUPT_DATA_SEGMENT)
1875 printf(" dsisr: %lx\n", fp->dsisr);
1876 }
1877
1878 printf(" current = 0x%px\n", current);
1879 #ifdef CONFIG_PPC64
1880 printf(" paca = 0x%px\t irqmask: 0x%02x\t irq_happened: 0x%02x\n",
1881 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened);
1882 #endif
1883 if (current) {
1884 printf(" pid = %d, comm = %s\n",
1885 current->pid, current->comm);
1886 }
1887
1888 if (trap == INTERRUPT_PROGRAM)
1889 print_bug_trap(fp);
1890
1891 printf(linux_banner);
1892 }
1893
prregs(struct pt_regs * fp)1894 static void prregs(struct pt_regs *fp)
1895 {
1896 int n, trap;
1897 unsigned long base;
1898 struct pt_regs regs;
1899
1900 if (scanhex(&base)) {
1901 if (setjmp(bus_error_jmp) == 0) {
1902 catch_memory_errors = 1;
1903 sync();
1904 regs = *(struct pt_regs *)base;
1905 sync();
1906 __delay(200);
1907 } else {
1908 catch_memory_errors = 0;
1909 printf("*** Error reading registers from "REG"\n",
1910 base);
1911 return;
1912 }
1913 catch_memory_errors = 0;
1914 fp = ®s;
1915 }
1916
1917 #ifdef CONFIG_PPC64
1918 #define R_PER_LINE 2
1919 #else
1920 #define R_PER_LINE 4
1921 #endif
1922
1923 for (n = 0; n < 32; ++n) {
1924 printf("R%.2d = "REG"%s", n, fp->gpr[n],
1925 (n % R_PER_LINE) == R_PER_LINE - 1 ? "\n" : " ");
1926 }
1927
1928 printf("pc = ");
1929 xmon_print_symbol(fp->nip, " ", "\n");
1930 if (!trap_is_syscall(fp) && cpu_has_feature(CPU_FTR_CFAR)) {
1931 printf("cfar= ");
1932 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1933 }
1934 printf("lr = ");
1935 xmon_print_symbol(fp->link, " ", "\n");
1936 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1937 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1938 fp->ctr, fp->xer, fp->trap);
1939 trap = TRAP(fp);
1940 if (trap == INTERRUPT_DATA_STORAGE ||
1941 trap == INTERRUPT_DATA_SEGMENT ||
1942 trap == INTERRUPT_ALIGNMENT)
1943 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1944 }
1945
cacheflush(void)1946 static void cacheflush(void)
1947 {
1948 int cmd;
1949 unsigned long nflush;
1950
1951 cmd = inchar();
1952 if (cmd != 'i')
1953 termch = cmd;
1954 scanhex((void *)&adrs);
1955 if (termch != '\n')
1956 termch = 0;
1957 nflush = 1;
1958 scanhex(&nflush);
1959 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1960 if (setjmp(bus_error_jmp) == 0) {
1961 catch_memory_errors = 1;
1962 sync();
1963
1964 if (cmd != 'i' || IS_ENABLED(CONFIG_PPC_BOOK3S_64)) {
1965 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1966 cflush((void *) adrs);
1967 } else {
1968 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1969 cinval((void *) adrs);
1970 }
1971 sync();
1972 /* wait a little while to see if we get a machine check */
1973 __delay(200);
1974 }
1975 catch_memory_errors = 0;
1976 }
1977
1978 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1979 extern void xmon_mtspr(int spr, unsigned long value);
1980
1981 static int
read_spr(int n,unsigned long * vp)1982 read_spr(int n, unsigned long *vp)
1983 {
1984 unsigned long ret = -1UL;
1985 int ok = 0;
1986
1987 if (setjmp(bus_error_jmp) == 0) {
1988 catch_spr_faults = 1;
1989 sync();
1990
1991 ret = xmon_mfspr(n, *vp);
1992
1993 sync();
1994 *vp = ret;
1995 ok = 1;
1996 }
1997 catch_spr_faults = 0;
1998
1999 return ok;
2000 }
2001
2002 static void
write_spr(int n,unsigned long val)2003 write_spr(int n, unsigned long val)
2004 {
2005 if (xmon_is_ro) {
2006 printf(xmon_ro_msg);
2007 return;
2008 }
2009
2010 if (setjmp(bus_error_jmp) == 0) {
2011 catch_spr_faults = 1;
2012 sync();
2013
2014 xmon_mtspr(n, val);
2015
2016 sync();
2017 } else {
2018 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
2019 }
2020 catch_spr_faults = 0;
2021 }
2022
dump_206_sprs(void)2023 static void dump_206_sprs(void)
2024 {
2025 #ifdef CONFIG_PPC64
2026 if (!cpu_has_feature(CPU_FTR_ARCH_206))
2027 return;
2028
2029 /* Actually some of these pre-date 2.06, but whatevs */
2030
2031 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8lx\n",
2032 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
2033 printf("dscr = %.16lx ppr = %.16lx pir = %.8lx\n",
2034 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
2035 printf("amr = %.16lx uamor = %.16lx\n",
2036 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
2037
2038 if (!(mfmsr() & MSR_HV))
2039 return;
2040
2041 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8lx\n",
2042 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
2043 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
2044 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
2045 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8lx\n",
2046 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
2047 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
2048 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
2049 printf("dabr = %.16lx dabrx = %.16lx\n",
2050 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
2051 #endif
2052 }
2053
dump_207_sprs(void)2054 static void dump_207_sprs(void)
2055 {
2056 #ifdef CONFIG_PPC64
2057 unsigned long msr;
2058
2059 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2060 return;
2061
2062 printf("dpdes = %.16lx tir = %.16lx cir = %.8lx\n",
2063 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
2064
2065 printf("fscr = %.16lx tar = %.16lx pspb = %.8lx\n",
2066 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
2067
2068 msr = mfmsr();
2069 if (msr & MSR_TM) {
2070 /* Only if TM has been enabled in the kernel */
2071 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
2072 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
2073 mfspr(SPRN_TEXASR));
2074 }
2075
2076 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
2077 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
2078 printf("pmc1 = %.8lx pmc2 = %.8lx pmc3 = %.8lx pmc4 = %.8lx\n",
2079 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
2080 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
2081 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8lx\n",
2082 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
2083 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8lx\n",
2084 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
2085 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
2086 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
2087 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
2088
2089 if (!(msr & MSR_HV))
2090 return;
2091
2092 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
2093 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
2094 printf("dawr0 = %.16lx dawrx0 = %.16lx\n",
2095 mfspr(SPRN_DAWR0), mfspr(SPRN_DAWRX0));
2096 if (nr_wp_slots() > 1) {
2097 printf("dawr1 = %.16lx dawrx1 = %.16lx\n",
2098 mfspr(SPRN_DAWR1), mfspr(SPRN_DAWRX1));
2099 }
2100 printf("ciabr = %.16lx\n", mfspr(SPRN_CIABR));
2101 #endif
2102 }
2103
dump_300_sprs(void)2104 static void dump_300_sprs(void)
2105 {
2106 #ifdef CONFIG_PPC64
2107 bool hv = mfmsr() & MSR_HV;
2108
2109 if (!cpu_has_feature(CPU_FTR_ARCH_300))
2110 return;
2111
2112 printf("pidr = %.16lx tidr = %.16lx\n",
2113 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
2114 printf("psscr = %.16lx\n",
2115 hv ? mfspr(SPRN_PSSCR) : mfspr(SPRN_PSSCR_PR));
2116
2117 if (!hv)
2118 return;
2119
2120 printf("ptcr = %.16lx asdr = %.16lx\n",
2121 mfspr(SPRN_PTCR), mfspr(SPRN_ASDR));
2122 #endif
2123 }
2124
dump_310_sprs(void)2125 static void dump_310_sprs(void)
2126 {
2127 #ifdef CONFIG_PPC64
2128 if (!cpu_has_feature(CPU_FTR_ARCH_31))
2129 return;
2130
2131 printf("mmcr3 = %.16lx, sier2 = %.16lx, sier3 = %.16lx\n",
2132 mfspr(SPRN_MMCR3), mfspr(SPRN_SIER2), mfspr(SPRN_SIER3));
2133
2134 #endif
2135 }
2136
dump_one_spr(int spr,bool show_unimplemented)2137 static void dump_one_spr(int spr, bool show_unimplemented)
2138 {
2139 unsigned long val;
2140
2141 val = 0xdeadbeef;
2142 if (!read_spr(spr, &val)) {
2143 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
2144 return;
2145 }
2146
2147 if (val == 0xdeadbeef) {
2148 /* Looks like read was a nop, confirm */
2149 val = 0x0badcafe;
2150 if (!read_spr(spr, &val)) {
2151 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
2152 return;
2153 }
2154
2155 if (val == 0x0badcafe) {
2156 if (show_unimplemented)
2157 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
2158 return;
2159 }
2160 }
2161
2162 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
2163 }
2164
super_regs(void)2165 static void super_regs(void)
2166 {
2167 static unsigned long regno;
2168 int cmd;
2169 int spr;
2170
2171 cmd = skipbl();
2172
2173 switch (cmd) {
2174 case '\n': {
2175 unsigned long sp, toc;
2176 asm("mr %0,1" : "=r" (sp) :);
2177 asm("mr %0,2" : "=r" (toc) :);
2178
2179 printf("msr = "REG" sprg0 = "REG"\n",
2180 mfmsr(), mfspr(SPRN_SPRG0));
2181 printf("pvr = "REG" sprg1 = "REG"\n",
2182 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
2183 printf("dec = "REG" sprg2 = "REG"\n",
2184 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
2185 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
2186 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
2187
2188 dump_206_sprs();
2189 dump_207_sprs();
2190 dump_300_sprs();
2191 dump_310_sprs();
2192
2193 return;
2194 }
2195 case 'w': {
2196 unsigned long val;
2197 scanhex(®no);
2198 val = 0;
2199 read_spr(regno, &val);
2200 scanhex(&val);
2201 write_spr(regno, val);
2202 dump_one_spr(regno, true);
2203 break;
2204 }
2205 case 'r':
2206 scanhex(®no);
2207 dump_one_spr(regno, true);
2208 break;
2209 case 'a':
2210 /* dump ALL SPRs */
2211 for (spr = 1; spr < 1024; ++spr)
2212 dump_one_spr(spr, false);
2213 break;
2214 }
2215
2216 scannl();
2217 }
2218
2219 /*
2220 * Stuff for reading and writing memory safely
2221 */
2222 static int
mread(unsigned long adrs,void * buf,int size)2223 mread(unsigned long adrs, void *buf, int size)
2224 {
2225 volatile int n;
2226 char *p, *q;
2227
2228 n = 0;
2229 if (setjmp(bus_error_jmp) == 0) {
2230 catch_memory_errors = 1;
2231 sync();
2232 p = (char *)adrs;
2233 q = (char *)buf;
2234 switch (size) {
2235 case 2:
2236 *(u16 *)q = *(u16 *)p;
2237 break;
2238 case 4:
2239 *(u32 *)q = *(u32 *)p;
2240 break;
2241 case 8:
2242 *(u64 *)q = *(u64 *)p;
2243 break;
2244 default:
2245 for( ; n < size; ++n) {
2246 *q++ = *p++;
2247 sync();
2248 }
2249 }
2250 sync();
2251 /* wait a little while to see if we get a machine check */
2252 __delay(200);
2253 n = size;
2254 }
2255 catch_memory_errors = 0;
2256 return n;
2257 }
2258
2259 static int
mwrite(unsigned long adrs,void * buf,int size)2260 mwrite(unsigned long adrs, void *buf, int size)
2261 {
2262 volatile int n;
2263 char *p, *q;
2264
2265 n = 0;
2266
2267 if (xmon_is_ro) {
2268 printf(xmon_ro_msg);
2269 return n;
2270 }
2271
2272 if (setjmp(bus_error_jmp) == 0) {
2273 catch_memory_errors = 1;
2274 sync();
2275 p = (char *) adrs;
2276 q = (char *) buf;
2277 switch (size) {
2278 case 2:
2279 *(u16 *)p = *(u16 *)q;
2280 break;
2281 case 4:
2282 *(u32 *)p = *(u32 *)q;
2283 break;
2284 case 8:
2285 *(u64 *)p = *(u64 *)q;
2286 break;
2287 default:
2288 for ( ; n < size; ++n) {
2289 *p++ = *q++;
2290 sync();
2291 }
2292 }
2293 sync();
2294 /* wait a little while to see if we get a machine check */
2295 __delay(200);
2296 n = size;
2297 } else {
2298 printf("*** Error writing address "REG"\n", adrs + n);
2299 }
2300 catch_memory_errors = 0;
2301 return n;
2302 }
2303
2304 static int
mread_instr(unsigned long adrs,struct ppc_inst * instr)2305 mread_instr(unsigned long adrs, struct ppc_inst *instr)
2306 {
2307 volatile int n;
2308
2309 n = 0;
2310 if (setjmp(bus_error_jmp) == 0) {
2311 catch_memory_errors = 1;
2312 sync();
2313 *instr = ppc_inst_read((u32 *)adrs);
2314 sync();
2315 /* wait a little while to see if we get a machine check */
2316 __delay(200);
2317 n = ppc_inst_len(*instr);
2318 }
2319 catch_memory_errors = 0;
2320 return n;
2321 }
2322
2323 static int fault_type;
2324 static int fault_except;
2325 static char *fault_chars[] = { "--", "**", "##" };
2326
handle_fault(struct pt_regs * regs)2327 static int handle_fault(struct pt_regs *regs)
2328 {
2329 fault_except = TRAP(regs);
2330 switch (TRAP(regs)) {
2331 case 0x200:
2332 fault_type = 0;
2333 break;
2334 case 0x300:
2335 case 0x380:
2336 fault_type = 1;
2337 break;
2338 default:
2339 fault_type = 2;
2340 }
2341
2342 longjmp(bus_error_jmp, 1);
2343
2344 return 0;
2345 }
2346
2347 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2348
2349 static void
byterev(unsigned char * val,int size)2350 byterev(unsigned char *val, int size)
2351 {
2352 int t;
2353
2354 switch (size) {
2355 case 2:
2356 SWAP(val[0], val[1], t);
2357 break;
2358 case 4:
2359 SWAP(val[0], val[3], t);
2360 SWAP(val[1], val[2], t);
2361 break;
2362 case 8: /* is there really any use for this? */
2363 SWAP(val[0], val[7], t);
2364 SWAP(val[1], val[6], t);
2365 SWAP(val[2], val[5], t);
2366 SWAP(val[3], val[4], t);
2367 break;
2368 }
2369 }
2370
2371 static int brev;
2372 static int mnoread;
2373
2374 static char *memex_help_string =
2375 "Memory examine command usage:\n"
2376 "m [addr] [flags] examine/change memory\n"
2377 " addr is optional. will start where left off.\n"
2378 " flags may include chars from this set:\n"
2379 " b modify by bytes (default)\n"
2380 " w modify by words (2 byte)\n"
2381 " l modify by longs (4 byte)\n"
2382 " d modify by doubleword (8 byte)\n"
2383 " r toggle reverse byte order mode\n"
2384 " n do not read memory (for i/o spaces)\n"
2385 " . ok to read (default)\n"
2386 "NOTE: flags are saved as defaults\n"
2387 "";
2388
2389 static char *memex_subcmd_help_string =
2390 "Memory examine subcommands:\n"
2391 " hexval write this val to current location\n"
2392 " 'string' write chars from string to this location\n"
2393 " ' increment address\n"
2394 " ^ decrement address\n"
2395 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2396 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2397 " ` clear no-read flag\n"
2398 " ; stay at this addr\n"
2399 " v change to byte mode\n"
2400 " w change to word (2 byte) mode\n"
2401 " l change to long (4 byte) mode\n"
2402 " u change to doubleword (8 byte) mode\n"
2403 " m addr change current addr\n"
2404 " n toggle no-read flag\n"
2405 " r toggle byte reverse flag\n"
2406 " < count back up count bytes\n"
2407 " > count skip forward count bytes\n"
2408 " x exit this mode\n"
2409 "";
2410
2411 static void
memex(void)2412 memex(void)
2413 {
2414 int cmd, inc, i, nslash;
2415 unsigned long n;
2416 unsigned char val[16];
2417
2418 scanhex((void *)&adrs);
2419 cmd = skipbl();
2420 if (cmd == '?') {
2421 printf(memex_help_string);
2422 return;
2423 } else {
2424 termch = cmd;
2425 }
2426 last_cmd = "m\n";
2427 while ((cmd = skipbl()) != '\n') {
2428 switch( cmd ){
2429 case 'b': size = 1; break;
2430 case 'w': size = 2; break;
2431 case 'l': size = 4; break;
2432 case 'd': size = 8; break;
2433 case 'r': brev = !brev; break;
2434 case 'n': mnoread = 1; break;
2435 case '.': mnoread = 0; break;
2436 }
2437 }
2438 if( size <= 0 )
2439 size = 1;
2440 else if( size > 8 )
2441 size = 8;
2442 for(;;){
2443 if (!mnoread)
2444 n = mread(adrs, val, size);
2445 printf(REG"%c", adrs, brev? 'r': ' ');
2446 if (!mnoread) {
2447 if (brev)
2448 byterev(val, size);
2449 putchar(' ');
2450 for (i = 0; i < n; ++i)
2451 printf("%.2x", val[i]);
2452 for (; i < size; ++i)
2453 printf("%s", fault_chars[fault_type]);
2454 }
2455 putchar(' ');
2456 inc = size;
2457 nslash = 0;
2458 for(;;){
2459 if( scanhex(&n) ){
2460 for (i = 0; i < size; ++i)
2461 val[i] = n >> (i * 8);
2462 if (!brev)
2463 byterev(val, size);
2464 mwrite(adrs, val, size);
2465 inc = size;
2466 }
2467 cmd = skipbl();
2468 if (cmd == '\n')
2469 break;
2470 inc = 0;
2471 switch (cmd) {
2472 case '\'':
2473 for(;;){
2474 n = inchar();
2475 if( n == '\\' )
2476 n = bsesc();
2477 else if( n == '\'' )
2478 break;
2479 for (i = 0; i < size; ++i)
2480 val[i] = n >> (i * 8);
2481 if (!brev)
2482 byterev(val, size);
2483 mwrite(adrs, val, size);
2484 adrs += size;
2485 }
2486 adrs -= size;
2487 inc = size;
2488 break;
2489 case ',':
2490 adrs += size;
2491 break;
2492 case '.':
2493 mnoread = 0;
2494 break;
2495 case ';':
2496 break;
2497 case 'x':
2498 case EOF:
2499 scannl();
2500 return;
2501 case 'b':
2502 case 'v':
2503 size = 1;
2504 break;
2505 case 'w':
2506 size = 2;
2507 break;
2508 case 'l':
2509 size = 4;
2510 break;
2511 case 'u':
2512 size = 8;
2513 break;
2514 case '^':
2515 adrs -= size;
2516 break;
2517 case '/':
2518 if (nslash > 0)
2519 adrs -= 1 << nslash;
2520 else
2521 nslash = 0;
2522 nslash += 4;
2523 adrs += 1 << nslash;
2524 break;
2525 case '\\':
2526 if (nslash < 0)
2527 adrs += 1 << -nslash;
2528 else
2529 nslash = 0;
2530 nslash -= 4;
2531 adrs -= 1 << -nslash;
2532 break;
2533 case 'm':
2534 scanhex((void *)&adrs);
2535 break;
2536 case 'n':
2537 mnoread = 1;
2538 break;
2539 case 'r':
2540 brev = !brev;
2541 break;
2542 case '<':
2543 n = size;
2544 scanhex(&n);
2545 adrs -= n;
2546 break;
2547 case '>':
2548 n = size;
2549 scanhex(&n);
2550 adrs += n;
2551 break;
2552 case '?':
2553 printf(memex_subcmd_help_string);
2554 break;
2555 }
2556 }
2557 adrs += inc;
2558 }
2559 }
2560
2561 static int
bsesc(void)2562 bsesc(void)
2563 {
2564 int c;
2565
2566 c = inchar();
2567 switch( c ){
2568 case 'n': c = '\n'; break;
2569 case 'r': c = '\r'; break;
2570 case 'b': c = '\b'; break;
2571 case 't': c = '\t'; break;
2572 }
2573 return c;
2574 }
2575
xmon_rawdump(unsigned long adrs,long ndump)2576 static void xmon_rawdump (unsigned long adrs, long ndump)
2577 {
2578 long n, m, r, nr;
2579 unsigned char temp[16];
2580
2581 for (n = ndump; n > 0;) {
2582 r = n < 16? n: 16;
2583 nr = mread(adrs, temp, r);
2584 adrs += nr;
2585 for (m = 0; m < r; ++m) {
2586 if (m < nr)
2587 printf("%.2x", temp[m]);
2588 else
2589 printf("%s", fault_chars[fault_type]);
2590 }
2591 n -= r;
2592 if (nr < r)
2593 break;
2594 }
2595 printf("\n");
2596 }
2597
dump_tracing(void)2598 static void dump_tracing(void)
2599 {
2600 int c;
2601
2602 c = inchar();
2603 if (c == 'c')
2604 ftrace_dump(DUMP_ORIG);
2605 else
2606 ftrace_dump(DUMP_ALL);
2607 }
2608
2609 #ifdef CONFIG_PPC64
dump_one_paca(int cpu)2610 static void dump_one_paca(int cpu)
2611 {
2612 struct paca_struct *p;
2613 #ifdef CONFIG_PPC_BOOK3S_64
2614 int i = 0;
2615 #endif
2616
2617 if (setjmp(bus_error_jmp) != 0) {
2618 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2619 return;
2620 }
2621
2622 catch_memory_errors = 1;
2623 sync();
2624
2625 p = paca_ptrs[cpu];
2626
2627 printf("paca for cpu 0x%x @ %px:\n", cpu, p);
2628
2629 printf(" %-*s = %s\n", 25, "possible", cpu_possible(cpu) ? "yes" : "no");
2630 printf(" %-*s = %s\n", 25, "present", cpu_present(cpu) ? "yes" : "no");
2631 printf(" %-*s = %s\n", 25, "online", cpu_online(cpu) ? "yes" : "no");
2632
2633 #define DUMP(paca, name, format) \
2634 printf(" %-*s = "format"\t(0x%lx)\n", 25, #name, 18, paca->name, \
2635 offsetof(struct paca_struct, name));
2636
2637 DUMP(p, lock_token, "%#-*x");
2638 DUMP(p, paca_index, "%#-*x");
2639 DUMP(p, kernel_toc, "%#-*llx");
2640 DUMP(p, kernelbase, "%#-*llx");
2641 DUMP(p, kernel_msr, "%#-*llx");
2642 DUMP(p, emergency_sp, "%-*px");
2643 #ifdef CONFIG_PPC_BOOK3S_64
2644 DUMP(p, nmi_emergency_sp, "%-*px");
2645 DUMP(p, mc_emergency_sp, "%-*px");
2646 DUMP(p, in_nmi, "%#-*x");
2647 DUMP(p, in_mce, "%#-*x");
2648 DUMP(p, hmi_event_available, "%#-*x");
2649 #endif
2650 DUMP(p, data_offset, "%#-*llx");
2651 DUMP(p, hw_cpu_id, "%#-*x");
2652 DUMP(p, cpu_start, "%#-*x");
2653 DUMP(p, kexec_state, "%#-*x");
2654 #ifdef CONFIG_PPC_BOOK3S_64
2655 if (!early_radix_enabled()) {
2656 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2657 u64 esid, vsid;
2658
2659 if (!p->slb_shadow_ptr)
2660 continue;
2661
2662 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2663 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2664
2665 if (esid || vsid) {
2666 printf(" %-*s[%d] = 0x%016llx 0x%016llx\n",
2667 22, "slb_shadow", i, esid, vsid);
2668 }
2669 }
2670 DUMP(p, vmalloc_sllp, "%#-*x");
2671 DUMP(p, stab_rr, "%#-*x");
2672 DUMP(p, slb_used_bitmap, "%#-*x");
2673 DUMP(p, slb_kern_bitmap, "%#-*x");
2674
2675 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
2676 DUMP(p, slb_cache_ptr, "%#-*x");
2677 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2678 printf(" %-*s[%d] = 0x%016x\n",
2679 22, "slb_cache", i, p->slb_cache[i]);
2680 }
2681 }
2682
2683 DUMP(p, rfi_flush_fallback_area, "%-*px");
2684 #endif
2685 DUMP(p, dscr_default, "%#-*llx");
2686 #ifdef CONFIG_PPC_BOOK3E
2687 DUMP(p, pgd, "%-*px");
2688 DUMP(p, kernel_pgd, "%-*px");
2689 DUMP(p, tcd_ptr, "%-*px");
2690 DUMP(p, mc_kstack, "%-*px");
2691 DUMP(p, crit_kstack, "%-*px");
2692 DUMP(p, dbg_kstack, "%-*px");
2693 #endif
2694 DUMP(p, __current, "%-*px");
2695 DUMP(p, kstack, "%#-*llx");
2696 printf(" %-*s = 0x%016llx\n", 25, "kstack_base", p->kstack & ~(THREAD_SIZE - 1));
2697 #ifdef CONFIG_STACKPROTECTOR
2698 DUMP(p, canary, "%#-*lx");
2699 #endif
2700 DUMP(p, saved_r1, "%#-*llx");
2701 #ifdef CONFIG_PPC_BOOK3E
2702 DUMP(p, trap_save, "%#-*x");
2703 #endif
2704 DUMP(p, irq_soft_mask, "%#-*x");
2705 DUMP(p, irq_happened, "%#-*x");
2706 #ifdef CONFIG_MMIOWB
2707 DUMP(p, mmiowb_state.nesting_count, "%#-*x");
2708 DUMP(p, mmiowb_state.mmiowb_pending, "%#-*x");
2709 #endif
2710 DUMP(p, irq_work_pending, "%#-*x");
2711 DUMP(p, sprg_vdso, "%#-*llx");
2712
2713 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2714 DUMP(p, tm_scratch, "%#-*llx");
2715 #endif
2716
2717 #ifdef CONFIG_PPC_POWERNV
2718 DUMP(p, idle_state, "%#-*lx");
2719 if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
2720 DUMP(p, thread_idle_state, "%#-*x");
2721 DUMP(p, subcore_sibling_mask, "%#-*x");
2722 } else {
2723 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
2724 DUMP(p, requested_psscr, "%#-*llx");
2725 DUMP(p, dont_stop.counter, "%#-*x");
2726 #endif
2727 }
2728 #endif
2729
2730 DUMP(p, accounting.utime, "%#-*lx");
2731 DUMP(p, accounting.stime, "%#-*lx");
2732 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME
2733 DUMP(p, accounting.utime_scaled, "%#-*lx");
2734 #endif
2735 DUMP(p, accounting.starttime, "%#-*lx");
2736 DUMP(p, accounting.starttime_user, "%#-*lx");
2737 #ifdef CONFIG_ARCH_HAS_SCALED_CPUTIME
2738 DUMP(p, accounting.startspurr, "%#-*lx");
2739 DUMP(p, accounting.utime_sspurr, "%#-*lx");
2740 #endif
2741 DUMP(p, accounting.steal_time, "%#-*lx");
2742 #undef DUMP
2743
2744 catch_memory_errors = 0;
2745 sync();
2746 }
2747
dump_all_pacas(void)2748 static void dump_all_pacas(void)
2749 {
2750 int cpu;
2751
2752 if (num_possible_cpus() == 0) {
2753 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2754 return;
2755 }
2756
2757 for_each_possible_cpu(cpu)
2758 dump_one_paca(cpu);
2759 }
2760
dump_pacas(void)2761 static void dump_pacas(void)
2762 {
2763 unsigned long num;
2764 int c;
2765
2766 c = inchar();
2767 if (c == 'a') {
2768 dump_all_pacas();
2769 return;
2770 }
2771
2772 termch = c; /* Put c back, it wasn't 'a' */
2773
2774 if (scanhex(&num))
2775 dump_one_paca(num);
2776 else
2777 dump_one_paca(xmon_owner);
2778 }
2779 #endif
2780
2781 #ifdef CONFIG_PPC_POWERNV
dump_one_xive(int cpu)2782 static void dump_one_xive(int cpu)
2783 {
2784 unsigned int hwid = get_hard_smp_processor_id(cpu);
2785 bool hv = cpu_has_feature(CPU_FTR_HVMODE);
2786
2787 if (hv) {
2788 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2789 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2790 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2791 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2792 opal_xive_dump(XIVE_DUMP_VP, hwid);
2793 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2794 }
2795
2796 if (setjmp(bus_error_jmp) != 0) {
2797 catch_memory_errors = 0;
2798 printf("*** Error dumping xive on cpu %d\n", cpu);
2799 return;
2800 }
2801
2802 catch_memory_errors = 1;
2803 sync();
2804 xmon_xive_do_dump(cpu);
2805 sync();
2806 __delay(200);
2807 catch_memory_errors = 0;
2808 }
2809
dump_all_xives(void)2810 static void dump_all_xives(void)
2811 {
2812 int cpu;
2813
2814 if (num_possible_cpus() == 0) {
2815 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2816 return;
2817 }
2818
2819 for_each_possible_cpu(cpu)
2820 dump_one_xive(cpu);
2821 }
2822
dump_xives(void)2823 static void dump_xives(void)
2824 {
2825 unsigned long num;
2826 int c;
2827
2828 if (!xive_enabled()) {
2829 printf("Xive disabled on this system\n");
2830 return;
2831 }
2832
2833 c = inchar();
2834 if (c == 'a') {
2835 dump_all_xives();
2836 return;
2837 } else if (c == 'i') {
2838 if (scanhex(&num))
2839 xmon_xive_get_irq_config(num, NULL);
2840 else
2841 xmon_xive_get_irq_all();
2842 return;
2843 }
2844
2845 termch = c; /* Put c back, it wasn't 'a' */
2846
2847 if (scanhex(&num))
2848 dump_one_xive(num);
2849 else
2850 dump_one_xive(xmon_owner);
2851 }
2852 #endif /* CONFIG_PPC_POWERNV */
2853
dump_by_size(unsigned long addr,long count,int size)2854 static void dump_by_size(unsigned long addr, long count, int size)
2855 {
2856 unsigned char temp[16];
2857 int i, j;
2858 u64 val;
2859
2860 count = ALIGN(count, 16);
2861
2862 for (i = 0; i < count; i += 16, addr += 16) {
2863 printf(REG, addr);
2864
2865 if (mread(addr, temp, 16) != 16) {
2866 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2867 return;
2868 }
2869
2870 for (j = 0; j < 16; j += size) {
2871 putchar(' ');
2872 switch (size) {
2873 case 1: val = temp[j]; break;
2874 case 2: val = *(u16 *)&temp[j]; break;
2875 case 4: val = *(u32 *)&temp[j]; break;
2876 case 8: val = *(u64 *)&temp[j]; break;
2877 default: val = 0;
2878 }
2879
2880 printf("%0*llx", size * 2, val);
2881 }
2882 printf(" |");
2883 for (j = 0; j < 16; ++j) {
2884 val = temp[j];
2885 putchar(' ' <= val && val <= '~' ? val : '.');
2886 }
2887 printf("|\n");
2888 }
2889 }
2890
2891 static void
dump(void)2892 dump(void)
2893 {
2894 static char last[] = { "d?\n" };
2895 int c;
2896
2897 c = inchar();
2898
2899 #ifdef CONFIG_PPC64
2900 if (c == 'p') {
2901 xmon_start_pagination();
2902 dump_pacas();
2903 xmon_end_pagination();
2904 return;
2905 }
2906 #endif
2907 #ifdef CONFIG_PPC_POWERNV
2908 if (c == 'x') {
2909 xmon_start_pagination();
2910 dump_xives();
2911 xmon_end_pagination();
2912 return;
2913 }
2914 #endif
2915
2916 if (c == 't') {
2917 dump_tracing();
2918 return;
2919 }
2920
2921 if (c == '\n')
2922 termch = c;
2923
2924 scanhex((void *)&adrs);
2925 if (termch != '\n')
2926 termch = 0;
2927 if (c == 'i') {
2928 scanhex(&nidump);
2929 if (nidump == 0)
2930 nidump = 16;
2931 else if (nidump > MAX_IDUMP)
2932 nidump = MAX_IDUMP;
2933 adrs += ppc_inst_dump(adrs, nidump, 1);
2934 last_cmd = "di\n";
2935 } else if (c == 'l') {
2936 dump_log_buf();
2937 } else if (c == 'o') {
2938 dump_opal_msglog();
2939 } else if (c == 'v') {
2940 /* dump virtual to physical translation */
2941 show_pte(adrs);
2942 } else if (c == 'r') {
2943 scanhex(&ndump);
2944 if (ndump == 0)
2945 ndump = 64;
2946 xmon_rawdump(adrs, ndump);
2947 adrs += ndump;
2948 last_cmd = "dr\n";
2949 } else {
2950 scanhex(&ndump);
2951 if (ndump == 0)
2952 ndump = 64;
2953 else if (ndump > MAX_DUMP)
2954 ndump = MAX_DUMP;
2955
2956 switch (c) {
2957 case '8':
2958 case '4':
2959 case '2':
2960 case '1':
2961 ndump = ALIGN(ndump, 16);
2962 dump_by_size(adrs, ndump, c - '0');
2963 last[1] = c;
2964 last_cmd = last;
2965 break;
2966 default:
2967 prdump(adrs, ndump);
2968 last_cmd = "d\n";
2969 }
2970
2971 adrs += ndump;
2972 }
2973 }
2974
2975 static void
prdump(unsigned long adrs,long ndump)2976 prdump(unsigned long adrs, long ndump)
2977 {
2978 long n, m, c, r, nr;
2979 unsigned char temp[16];
2980
2981 for (n = ndump; n > 0;) {
2982 printf(REG, adrs);
2983 putchar(' ');
2984 r = n < 16? n: 16;
2985 nr = mread(adrs, temp, r);
2986 adrs += nr;
2987 for (m = 0; m < r; ++m) {
2988 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2989 putchar(' ');
2990 if (m < nr)
2991 printf("%.2x", temp[m]);
2992 else
2993 printf("%s", fault_chars[fault_type]);
2994 }
2995 for (; m < 16; ++m) {
2996 if ((m & (sizeof(long) - 1)) == 0)
2997 putchar(' ');
2998 printf(" ");
2999 }
3000 printf(" |");
3001 for (m = 0; m < r; ++m) {
3002 if (m < nr) {
3003 c = temp[m];
3004 putchar(' ' <= c && c <= '~'? c: '.');
3005 } else
3006 putchar(' ');
3007 }
3008 n -= r;
3009 for (; m < 16; ++m)
3010 putchar(' ');
3011 printf("|\n");
3012 if (nr < r)
3013 break;
3014 }
3015 }
3016
3017 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
3018
3019 static int
generic_inst_dump(unsigned long adr,long count,int praddr,instruction_dump_func dump_func)3020 generic_inst_dump(unsigned long adr, long count, int praddr,
3021 instruction_dump_func dump_func)
3022 {
3023 int nr, dotted;
3024 unsigned long first_adr;
3025 struct ppc_inst inst, last_inst = ppc_inst(0);
3026
3027 dotted = 0;
3028 for (first_adr = adr; count > 0; --count, adr += ppc_inst_len(inst)) {
3029 nr = mread_instr(adr, &inst);
3030 if (nr == 0) {
3031 if (praddr) {
3032 const char *x = fault_chars[fault_type];
3033 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
3034 }
3035 break;
3036 }
3037 if (adr > first_adr && ppc_inst_equal(inst, last_inst)) {
3038 if (!dotted) {
3039 printf(" ...\n");
3040 dotted = 1;
3041 }
3042 continue;
3043 }
3044 dotted = 0;
3045 last_inst = inst;
3046 if (praddr)
3047 printf(REG" %s", adr, ppc_inst_as_str(inst));
3048 printf("\t");
3049 if (!ppc_inst_prefixed(inst))
3050 dump_func(ppc_inst_val(inst), adr);
3051 else
3052 dump_func(ppc_inst_as_ulong(inst), adr);
3053 printf("\n");
3054 }
3055 return adr - first_adr;
3056 }
3057
3058 static int
ppc_inst_dump(unsigned long adr,long count,int praddr)3059 ppc_inst_dump(unsigned long adr, long count, int praddr)
3060 {
3061 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
3062 }
3063
3064 void
print_address(unsigned long addr)3065 print_address(unsigned long addr)
3066 {
3067 xmon_print_symbol(addr, "\t# ", "");
3068 }
3069
3070 static void
dump_log_buf(void)3071 dump_log_buf(void)
3072 {
3073 struct kmsg_dump_iter iter;
3074 static unsigned char buf[1024];
3075 size_t len;
3076
3077 if (setjmp(bus_error_jmp) != 0) {
3078 printf("Error dumping printk buffer!\n");
3079 return;
3080 }
3081
3082 catch_memory_errors = 1;
3083 sync();
3084
3085 kmsg_dump_rewind(&iter);
3086 xmon_start_pagination();
3087 while (kmsg_dump_get_line(&iter, false, buf, sizeof(buf), &len)) {
3088 buf[len] = '\0';
3089 printf("%s", buf);
3090 }
3091 xmon_end_pagination();
3092
3093 sync();
3094 /* wait a little while to see if we get a machine check */
3095 __delay(200);
3096 catch_memory_errors = 0;
3097 }
3098
3099 #ifdef CONFIG_PPC_POWERNV
dump_opal_msglog(void)3100 static void dump_opal_msglog(void)
3101 {
3102 unsigned char buf[128];
3103 ssize_t res;
3104 volatile loff_t pos = 0;
3105
3106 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
3107 printf("Machine is not running OPAL firmware.\n");
3108 return;
3109 }
3110
3111 if (setjmp(bus_error_jmp) != 0) {
3112 printf("Error dumping OPAL msglog!\n");
3113 return;
3114 }
3115
3116 catch_memory_errors = 1;
3117 sync();
3118
3119 xmon_start_pagination();
3120 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
3121 if (res < 0) {
3122 printf("Error dumping OPAL msglog! Error: %zd\n", res);
3123 break;
3124 }
3125 buf[res] = '\0';
3126 printf("%s", buf);
3127 pos += res;
3128 }
3129 xmon_end_pagination();
3130
3131 sync();
3132 /* wait a little while to see if we get a machine check */
3133 __delay(200);
3134 catch_memory_errors = 0;
3135 }
3136 #endif
3137
3138 /*
3139 * Memory operations - move, set, print differences
3140 */
3141 static unsigned long mdest; /* destination address */
3142 static unsigned long msrc; /* source address */
3143 static unsigned long mval; /* byte value to set memory to */
3144 static unsigned long mcount; /* # bytes to affect */
3145 static unsigned long mdiffs; /* max # differences to print */
3146
3147 static void
memops(int cmd)3148 memops(int cmd)
3149 {
3150 scanhex((void *)&mdest);
3151 if( termch != '\n' )
3152 termch = 0;
3153 scanhex((void *)(cmd == 's'? &mval: &msrc));
3154 if( termch != '\n' )
3155 termch = 0;
3156 scanhex((void *)&mcount);
3157 switch( cmd ){
3158 case 'm':
3159 if (xmon_is_ro) {
3160 printf(xmon_ro_msg);
3161 break;
3162 }
3163 memmove((void *)mdest, (void *)msrc, mcount);
3164 break;
3165 case 's':
3166 if (xmon_is_ro) {
3167 printf(xmon_ro_msg);
3168 break;
3169 }
3170 memset((void *)mdest, mval, mcount);
3171 break;
3172 case 'd':
3173 if( termch != '\n' )
3174 termch = 0;
3175 scanhex((void *)&mdiffs);
3176 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
3177 break;
3178 }
3179 }
3180
3181 static void
memdiffs(unsigned char * p1,unsigned char * p2,unsigned nb,unsigned maxpr)3182 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
3183 {
3184 unsigned n, prt;
3185
3186 prt = 0;
3187 for( n = nb; n > 0; --n )
3188 if( *p1++ != *p2++ )
3189 if( ++prt <= maxpr )
3190 printf("%px %.2x # %px %.2x\n", p1 - 1,
3191 p1[-1], p2 - 1, p2[-1]);
3192 if( prt > maxpr )
3193 printf("Total of %d differences\n", prt);
3194 }
3195
3196 static unsigned mend;
3197 static unsigned mask;
3198
3199 static void
memlocate(void)3200 memlocate(void)
3201 {
3202 unsigned a, n;
3203 unsigned char val[4];
3204
3205 last_cmd = "ml";
3206 scanhex((void *)&mdest);
3207 if (termch != '\n') {
3208 termch = 0;
3209 scanhex((void *)&mend);
3210 if (termch != '\n') {
3211 termch = 0;
3212 scanhex((void *)&mval);
3213 mask = ~0;
3214 if (termch != '\n') termch = 0;
3215 scanhex((void *)&mask);
3216 }
3217 }
3218 n = 0;
3219 for (a = mdest; a < mend; a += 4) {
3220 if (mread(a, val, 4) == 4
3221 && ((GETWORD(val) ^ mval) & mask) == 0) {
3222 printf("%.16x: %.16x\n", a, GETWORD(val));
3223 if (++n >= 10)
3224 break;
3225 }
3226 }
3227 }
3228
3229 static unsigned long mskip = 0x1000;
3230 static unsigned long mlim = 0xffffffff;
3231
3232 static void
memzcan(void)3233 memzcan(void)
3234 {
3235 unsigned char v;
3236 unsigned a;
3237 int ok, ook;
3238
3239 scanhex(&mdest);
3240 if (termch != '\n') termch = 0;
3241 scanhex(&mskip);
3242 if (termch != '\n') termch = 0;
3243 scanhex(&mlim);
3244 ook = 0;
3245 for (a = mdest; a < mlim; a += mskip) {
3246 ok = mread(a, &v, 1);
3247 if (ok && !ook) {
3248 printf("%.8x .. ", a);
3249 } else if (!ok && ook)
3250 printf("%.8lx\n", a - mskip);
3251 ook = ok;
3252 if (a + mskip < a)
3253 break;
3254 }
3255 if (ook)
3256 printf("%.8lx\n", a - mskip);
3257 }
3258
show_task(struct task_struct * volatile tsk)3259 static void show_task(struct task_struct *volatile tsk)
3260 {
3261 unsigned int p_state = READ_ONCE(tsk->__state);
3262 char state;
3263
3264 /*
3265 * Cloned from kdb_task_state_char(), which is not entirely
3266 * appropriate for calling from xmon. This could be moved
3267 * to a common, generic, routine used by both.
3268 */
3269 state = (p_state == TASK_RUNNING) ? 'R' :
3270 (p_state & TASK_UNINTERRUPTIBLE) ? 'D' :
3271 (p_state & TASK_STOPPED) ? 'T' :
3272 (p_state & TASK_TRACED) ? 'C' :
3273 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
3274 (tsk->exit_state & EXIT_DEAD) ? 'E' :
3275 (p_state & TASK_INTERRUPTIBLE) ? 'S' : '?';
3276
3277 printf("%16px %16lx %16px %6d %6d %c %2d %s\n", tsk,
3278 tsk->thread.ksp, tsk->thread.regs,
3279 tsk->pid, rcu_dereference(tsk->parent)->pid,
3280 state, task_cpu(tsk),
3281 tsk->comm);
3282 }
3283
3284 #ifdef CONFIG_PPC_BOOK3S_64
format_pte(void * ptep,unsigned long pte)3285 static void format_pte(void *ptep, unsigned long pte)
3286 {
3287 pte_t entry = __pte(pte);
3288
3289 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
3290 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
3291
3292 printf("Flags = %s%s%s%s%s\n",
3293 pte_young(entry) ? "Accessed " : "",
3294 pte_dirty(entry) ? "Dirty " : "",
3295 pte_read(entry) ? "Read " : "",
3296 pte_write(entry) ? "Write " : "",
3297 pte_exec(entry) ? "Exec " : "");
3298 }
3299
show_pte(unsigned long addr)3300 static void show_pte(unsigned long addr)
3301 {
3302 unsigned long tskv = 0;
3303 struct task_struct *volatile tsk = NULL;
3304 struct mm_struct *mm;
3305 pgd_t *pgdp;
3306 p4d_t *p4dp;
3307 pud_t *pudp;
3308 pmd_t *pmdp;
3309 pte_t *ptep;
3310
3311 if (!scanhex(&tskv))
3312 mm = &init_mm;
3313 else
3314 tsk = (struct task_struct *)tskv;
3315
3316 if (tsk == NULL)
3317 mm = &init_mm;
3318 else
3319 mm = tsk->active_mm;
3320
3321 if (setjmp(bus_error_jmp) != 0) {
3322 catch_memory_errors = 0;
3323 printf("*** Error dumping pte for task %px\n", tsk);
3324 return;
3325 }
3326
3327 catch_memory_errors = 1;
3328 sync();
3329
3330 if (mm == &init_mm)
3331 pgdp = pgd_offset_k(addr);
3332 else
3333 pgdp = pgd_offset(mm, addr);
3334
3335 p4dp = p4d_offset(pgdp, addr);
3336
3337 if (p4d_none(*p4dp)) {
3338 printf("No valid P4D\n");
3339 return;
3340 }
3341
3342 if (p4d_is_leaf(*p4dp)) {
3343 format_pte(p4dp, p4d_val(*p4dp));
3344 return;
3345 }
3346
3347 printf("p4dp @ 0x%px = 0x%016lx\n", p4dp, p4d_val(*p4dp));
3348
3349 pudp = pud_offset(p4dp, addr);
3350
3351 if (pud_none(*pudp)) {
3352 printf("No valid PUD\n");
3353 return;
3354 }
3355
3356 if (pud_is_leaf(*pudp)) {
3357 format_pte(pudp, pud_val(*pudp));
3358 return;
3359 }
3360
3361 printf("pudp @ 0x%px = 0x%016lx\n", pudp, pud_val(*pudp));
3362
3363 pmdp = pmd_offset(pudp, addr);
3364
3365 if (pmd_none(*pmdp)) {
3366 printf("No valid PMD\n");
3367 return;
3368 }
3369
3370 if (pmd_is_leaf(*pmdp)) {
3371 format_pte(pmdp, pmd_val(*pmdp));
3372 return;
3373 }
3374 printf("pmdp @ 0x%px = 0x%016lx\n", pmdp, pmd_val(*pmdp));
3375
3376 ptep = pte_offset_map(pmdp, addr);
3377 if (pte_none(*ptep)) {
3378 printf("no valid PTE\n");
3379 return;
3380 }
3381
3382 format_pte(ptep, pte_val(*ptep));
3383
3384 sync();
3385 __delay(200);
3386 catch_memory_errors = 0;
3387 }
3388 #else
show_pte(unsigned long addr)3389 static void show_pte(unsigned long addr)
3390 {
3391 printf("show_pte not yet implemented\n");
3392 }
3393 #endif /* CONFIG_PPC_BOOK3S_64 */
3394
show_tasks(void)3395 static void show_tasks(void)
3396 {
3397 unsigned long tskv;
3398 struct task_struct *volatile tsk = NULL;
3399
3400 printf(" task_struct ->thread.ksp ->thread.regs PID PPID S P CMD\n");
3401
3402 if (scanhex(&tskv))
3403 tsk = (struct task_struct *)tskv;
3404
3405 if (setjmp(bus_error_jmp) != 0) {
3406 catch_memory_errors = 0;
3407 printf("*** Error dumping task %px\n", tsk);
3408 return;
3409 }
3410
3411 catch_memory_errors = 1;
3412 sync();
3413
3414 if (tsk)
3415 show_task(tsk);
3416 else
3417 for_each_process(tsk)
3418 show_task(tsk);
3419
3420 sync();
3421 __delay(200);
3422 catch_memory_errors = 0;
3423 }
3424
proccall(void)3425 static void proccall(void)
3426 {
3427 unsigned long args[8];
3428 unsigned long ret;
3429 int i;
3430 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
3431 unsigned long, unsigned long, unsigned long,
3432 unsigned long, unsigned long, unsigned long);
3433 callfunc_t func;
3434
3435 if (!scanhex(&adrs))
3436 return;
3437 if (termch != '\n')
3438 termch = 0;
3439 for (i = 0; i < 8; ++i)
3440 args[i] = 0;
3441 for (i = 0; i < 8; ++i) {
3442 if (!scanhex(&args[i]) || termch == '\n')
3443 break;
3444 termch = 0;
3445 }
3446 func = (callfunc_t) adrs;
3447 ret = 0;
3448 if (setjmp(bus_error_jmp) == 0) {
3449 catch_memory_errors = 1;
3450 sync();
3451 ret = func(args[0], args[1], args[2], args[3],
3452 args[4], args[5], args[6], args[7]);
3453 sync();
3454 printf("return value is 0x%lx\n", ret);
3455 } else {
3456 printf("*** %x exception occurred\n", fault_except);
3457 }
3458 catch_memory_errors = 0;
3459 }
3460
3461 /* Input scanning routines */
3462 int
skipbl(void)3463 skipbl(void)
3464 {
3465 int c;
3466
3467 if( termch != 0 ){
3468 c = termch;
3469 termch = 0;
3470 } else
3471 c = inchar();
3472 while( c == ' ' || c == '\t' )
3473 c = inchar();
3474 return c;
3475 }
3476
3477 #define N_PTREGS 44
3478 static const char *regnames[N_PTREGS] = {
3479 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3480 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3481 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3482 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3483 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3484 #ifdef CONFIG_PPC64
3485 "softe",
3486 #else
3487 "mq",
3488 #endif
3489 "trap", "dar", "dsisr", "res"
3490 };
3491
3492 int
scanhex(unsigned long * vp)3493 scanhex(unsigned long *vp)
3494 {
3495 int c, d;
3496 unsigned long v;
3497
3498 c = skipbl();
3499 if (c == '%') {
3500 /* parse register name */
3501 char regname[8];
3502 int i;
3503
3504 for (i = 0; i < sizeof(regname) - 1; ++i) {
3505 c = inchar();
3506 if (!isalnum(c)) {
3507 termch = c;
3508 break;
3509 }
3510 regname[i] = c;
3511 }
3512 regname[i] = 0;
3513 i = match_string(regnames, N_PTREGS, regname);
3514 if (i < 0) {
3515 printf("invalid register name '%%%s'\n", regname);
3516 return 0;
3517 }
3518 if (xmon_regs == NULL) {
3519 printf("regs not available\n");
3520 return 0;
3521 }
3522 *vp = ((unsigned long *)xmon_regs)[i];
3523 return 1;
3524 }
3525
3526 /* skip leading "0x" if any */
3527
3528 if (c == '0') {
3529 c = inchar();
3530 if (c == 'x') {
3531 c = inchar();
3532 } else {
3533 d = hexdigit(c);
3534 if (d == EOF) {
3535 termch = c;
3536 *vp = 0;
3537 return 1;
3538 }
3539 }
3540 } else if (c == '$') {
3541 int i;
3542 for (i=0; i<63; i++) {
3543 c = inchar();
3544 if (isspace(c) || c == '\0') {
3545 termch = c;
3546 break;
3547 }
3548 tmpstr[i] = c;
3549 }
3550 tmpstr[i++] = 0;
3551 *vp = 0;
3552 if (setjmp(bus_error_jmp) == 0) {
3553 catch_memory_errors = 1;
3554 sync();
3555 *vp = kallsyms_lookup_name(tmpstr);
3556 sync();
3557 }
3558 catch_memory_errors = 0;
3559 if (!(*vp)) {
3560 printf("unknown symbol '%s'\n", tmpstr);
3561 return 0;
3562 }
3563 return 1;
3564 }
3565
3566 d = hexdigit(c);
3567 if (d == EOF) {
3568 termch = c;
3569 return 0;
3570 }
3571 v = 0;
3572 do {
3573 v = (v << 4) + d;
3574 c = inchar();
3575 d = hexdigit(c);
3576 } while (d != EOF);
3577 termch = c;
3578 *vp = v;
3579 return 1;
3580 }
3581
3582 static void
scannl(void)3583 scannl(void)
3584 {
3585 int c;
3586
3587 c = termch;
3588 termch = 0;
3589 while( c != '\n' )
3590 c = inchar();
3591 }
3592
hexdigit(int c)3593 static int hexdigit(int c)
3594 {
3595 if( '0' <= c && c <= '9' )
3596 return c - '0';
3597 if( 'A' <= c && c <= 'F' )
3598 return c - ('A' - 10);
3599 if( 'a' <= c && c <= 'f' )
3600 return c - ('a' - 10);
3601 return EOF;
3602 }
3603
3604 void
getstring(char * s,int size)3605 getstring(char *s, int size)
3606 {
3607 int c;
3608
3609 c = skipbl();
3610 if (c == '\n') {
3611 *s = 0;
3612 return;
3613 }
3614
3615 do {
3616 if( size > 1 ){
3617 *s++ = c;
3618 --size;
3619 }
3620 c = inchar();
3621 } while( c != ' ' && c != '\t' && c != '\n' );
3622 termch = c;
3623 *s = 0;
3624 }
3625
3626 static char line[256];
3627 static char *lineptr;
3628
3629 static void
flush_input(void)3630 flush_input(void)
3631 {
3632 lineptr = NULL;
3633 }
3634
3635 static int
inchar(void)3636 inchar(void)
3637 {
3638 if (lineptr == NULL || *lineptr == 0) {
3639 if (xmon_gets(line, sizeof(line)) == NULL) {
3640 lineptr = NULL;
3641 return EOF;
3642 }
3643 lineptr = line;
3644 }
3645 return *lineptr++;
3646 }
3647
3648 static void
take_input(char * str)3649 take_input(char *str)
3650 {
3651 lineptr = str;
3652 }
3653
3654
3655 static void
symbol_lookup(void)3656 symbol_lookup(void)
3657 {
3658 int type = inchar();
3659 unsigned long addr, cpu;
3660 void __percpu *ptr = NULL;
3661 static char tmp[64];
3662
3663 switch (type) {
3664 case 'a':
3665 if (scanhex(&addr))
3666 xmon_print_symbol(addr, ": ", "\n");
3667 termch = 0;
3668 break;
3669 case 's':
3670 getstring(tmp, 64);
3671 if (setjmp(bus_error_jmp) == 0) {
3672 catch_memory_errors = 1;
3673 sync();
3674 addr = kallsyms_lookup_name(tmp);
3675 if (addr)
3676 printf("%s: %lx\n", tmp, addr);
3677 else
3678 printf("Symbol '%s' not found.\n", tmp);
3679 sync();
3680 }
3681 catch_memory_errors = 0;
3682 termch = 0;
3683 break;
3684 case 'p':
3685 getstring(tmp, 64);
3686 if (setjmp(bus_error_jmp) == 0) {
3687 catch_memory_errors = 1;
3688 sync();
3689 ptr = (void __percpu *)kallsyms_lookup_name(tmp);
3690 sync();
3691 }
3692
3693 if (ptr &&
3694 ptr >= (void __percpu *)__per_cpu_start &&
3695 ptr < (void __percpu *)__per_cpu_end)
3696 {
3697 if (scanhex(&cpu) && cpu < num_possible_cpus()) {
3698 addr = (unsigned long)per_cpu_ptr(ptr, cpu);
3699 } else {
3700 cpu = raw_smp_processor_id();
3701 addr = (unsigned long)this_cpu_ptr(ptr);
3702 }
3703
3704 printf("%s for cpu 0x%lx: %lx\n", tmp, cpu, addr);
3705 } else {
3706 printf("Percpu symbol '%s' not found.\n", tmp);
3707 }
3708
3709 catch_memory_errors = 0;
3710 termch = 0;
3711 break;
3712 }
3713 }
3714
3715
3716 /* Print an address in numeric and symbolic form (if possible) */
xmon_print_symbol(unsigned long address,const char * mid,const char * after)3717 static void xmon_print_symbol(unsigned long address, const char *mid,
3718 const char *after)
3719 {
3720 char *modname;
3721 const char *volatile name = NULL;
3722 unsigned long offset, size;
3723
3724 printf(REG, address);
3725 if (setjmp(bus_error_jmp) == 0) {
3726 catch_memory_errors = 1;
3727 sync();
3728 name = kallsyms_lookup(address, &size, &offset, &modname,
3729 tmpstr);
3730 sync();
3731 /* wait a little while to see if we get a machine check */
3732 __delay(200);
3733 }
3734
3735 catch_memory_errors = 0;
3736
3737 if (name) {
3738 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3739 if (modname)
3740 printf(" [%s]", modname);
3741 }
3742 printf("%s", after);
3743 }
3744
3745 #ifdef CONFIG_PPC_BOOK3S_64
dump_segments(void)3746 void dump_segments(void)
3747 {
3748 int i;
3749 unsigned long esid,vsid;
3750 unsigned long llp;
3751
3752 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3753
3754 for (i = 0; i < mmu_slb_size; i++) {
3755 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3756 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3757
3758 if (!esid && !vsid)
3759 continue;
3760
3761 printf("%02d %016lx %016lx", i, esid, vsid);
3762
3763 if (!(esid & SLB_ESID_V)) {
3764 printf("\n");
3765 continue;
3766 }
3767
3768 llp = vsid & SLB_VSID_LLP;
3769 if (vsid & SLB_VSID_B_1T) {
3770 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3771 GET_ESID_1T(esid),
3772 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3773 llp);
3774 } else {
3775 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3776 GET_ESID(esid),
3777 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3778 llp);
3779 }
3780 }
3781 }
3782 #endif
3783
3784 #ifdef CONFIG_PPC_BOOK3S_32
dump_segments(void)3785 void dump_segments(void)
3786 {
3787 int i;
3788
3789 printf("sr0-15 =");
3790 for (i = 0; i < 16; ++i)
3791 printf(" %x", mfsr(i << 28));
3792 printf("\n");
3793 }
3794 #endif
3795
3796 #ifdef CONFIG_44x
dump_tlb_44x(void)3797 static void dump_tlb_44x(void)
3798 {
3799 int i;
3800
3801 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3802 unsigned long w0,w1,w2;
3803 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3804 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3805 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3806 printf("[%02x] %08lx %08lx %08lx ", i, w0, w1, w2);
3807 if (w0 & PPC44x_TLB_VALID) {
3808 printf("V %08lx -> %01lx%08lx %c%c%c%c%c",
3809 w0 & PPC44x_TLB_EPN_MASK,
3810 w1 & PPC44x_TLB_ERPN_MASK,
3811 w1 & PPC44x_TLB_RPN_MASK,
3812 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3813 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3814 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3815 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3816 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3817 }
3818 printf("\n");
3819 }
3820 }
3821 #endif /* CONFIG_44x */
3822
3823 #ifdef CONFIG_PPC_BOOK3E
dump_tlb_book3e(void)3824 static void dump_tlb_book3e(void)
3825 {
3826 u32 mmucfg, pidmask, lpidmask;
3827 u64 ramask;
3828 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3829 int mmu_version;
3830 static const char *pgsz_names[] = {
3831 " 1K",
3832 " 2K",
3833 " 4K",
3834 " 8K",
3835 " 16K",
3836 " 32K",
3837 " 64K",
3838 "128K",
3839 "256K",
3840 "512K",
3841 " 1M",
3842 " 2M",
3843 " 4M",
3844 " 8M",
3845 " 16M",
3846 " 32M",
3847 " 64M",
3848 "128M",
3849 "256M",
3850 "512M",
3851 " 1G",
3852 " 2G",
3853 " 4G",
3854 " 8G",
3855 " 16G",
3856 " 32G",
3857 " 64G",
3858 "128G",
3859 "256G",
3860 "512G",
3861 " 1T",
3862 " 2T",
3863 };
3864
3865 /* Gather some infos about the MMU */
3866 mmucfg = mfspr(SPRN_MMUCFG);
3867 mmu_version = (mmucfg & 3) + 1;
3868 ntlbs = ((mmucfg >> 2) & 3) + 1;
3869 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3870 lpidsz = (mmucfg >> 24) & 0xf;
3871 rasz = (mmucfg >> 16) & 0x7f;
3872 if ((mmu_version > 1) && (mmucfg & 0x10000))
3873 lrat = 1;
3874 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3875 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3876 pidmask = (1ul << pidsz) - 1;
3877 lpidmask = (1ul << lpidsz) - 1;
3878 ramask = (1ull << rasz) - 1;
3879
3880 for (tlb = 0; tlb < ntlbs; tlb++) {
3881 u32 tlbcfg;
3882 int nent, assoc, new_cc = 1;
3883 printf("TLB %d:\n------\n", tlb);
3884 switch(tlb) {
3885 case 0:
3886 tlbcfg = mfspr(SPRN_TLB0CFG);
3887 break;
3888 case 1:
3889 tlbcfg = mfspr(SPRN_TLB1CFG);
3890 break;
3891 case 2:
3892 tlbcfg = mfspr(SPRN_TLB2CFG);
3893 break;
3894 case 3:
3895 tlbcfg = mfspr(SPRN_TLB3CFG);
3896 break;
3897 default:
3898 printf("Unsupported TLB number !\n");
3899 continue;
3900 }
3901 nent = tlbcfg & 0xfff;
3902 assoc = (tlbcfg >> 24) & 0xff;
3903 for (i = 0; i < nent; i++) {
3904 u32 mas0 = MAS0_TLBSEL(tlb);
3905 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3906 u64 mas2 = 0;
3907 u64 mas7_mas3;
3908 int esel = i, cc = i;
3909
3910 if (assoc != 0) {
3911 cc = i / assoc;
3912 esel = i % assoc;
3913 mas2 = cc * 0x1000;
3914 }
3915
3916 mas0 |= MAS0_ESEL(esel);
3917 mtspr(SPRN_MAS0, mas0);
3918 mtspr(SPRN_MAS1, mas1);
3919 mtspr(SPRN_MAS2, mas2);
3920 asm volatile("tlbre 0,0,0" : : : "memory");
3921 mas1 = mfspr(SPRN_MAS1);
3922 mas2 = mfspr(SPRN_MAS2);
3923 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3924 if (assoc && (i % assoc) == 0)
3925 new_cc = 1;
3926 if (!(mas1 & MAS1_VALID))
3927 continue;
3928 if (assoc == 0)
3929 printf("%04x- ", i);
3930 else if (new_cc)
3931 printf("%04x-%c", cc, 'A' + esel);
3932 else
3933 printf(" |%c", 'A' + esel);
3934 new_cc = 0;
3935 printf(" %016llx %04x %s %c%c AS%c",
3936 mas2 & ~0x3ffull,
3937 (mas1 >> 16) & 0x3fff,
3938 pgsz_names[(mas1 >> 7) & 0x1f],
3939 mas1 & MAS1_IND ? 'I' : ' ',
3940 mas1 & MAS1_IPROT ? 'P' : ' ',
3941 mas1 & MAS1_TS ? '1' : '0');
3942 printf(" %c%c%c%c%c%c%c",
3943 mas2 & MAS2_X0 ? 'a' : ' ',
3944 mas2 & MAS2_X1 ? 'v' : ' ',
3945 mas2 & MAS2_W ? 'w' : ' ',
3946 mas2 & MAS2_I ? 'i' : ' ',
3947 mas2 & MAS2_M ? 'm' : ' ',
3948 mas2 & MAS2_G ? 'g' : ' ',
3949 mas2 & MAS2_E ? 'e' : ' ');
3950 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3951 if (mas1 & MAS1_IND)
3952 printf(" %s\n",
3953 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3954 else
3955 printf(" U%c%c%c S%c%c%c\n",
3956 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3957 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3958 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3959 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3960 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3961 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3962 }
3963 }
3964 }
3965 #endif /* CONFIG_PPC_BOOK3E */
3966
xmon_init(int enable)3967 static void xmon_init(int enable)
3968 {
3969 if (enable) {
3970 __debugger = xmon;
3971 __debugger_ipi = xmon_ipi;
3972 __debugger_bpt = xmon_bpt;
3973 __debugger_sstep = xmon_sstep;
3974 __debugger_iabr_match = xmon_iabr_match;
3975 __debugger_break_match = xmon_break_match;
3976 __debugger_fault_handler = xmon_fault_handler;
3977
3978 #ifdef CONFIG_PPC_PSERIES
3979 /*
3980 * Get the token here to avoid trying to get a lock
3981 * during the crash, causing a deadlock.
3982 */
3983 set_indicator_token = rtas_token("set-indicator");
3984 #endif
3985 } else {
3986 __debugger = NULL;
3987 __debugger_ipi = NULL;
3988 __debugger_bpt = NULL;
3989 __debugger_sstep = NULL;
3990 __debugger_iabr_match = NULL;
3991 __debugger_break_match = NULL;
3992 __debugger_fault_handler = NULL;
3993 }
3994 }
3995
3996 #ifdef CONFIG_MAGIC_SYSRQ
sysrq_handle_xmon(int key)3997 static void sysrq_handle_xmon(int key)
3998 {
3999 if (xmon_is_locked_down()) {
4000 clear_all_bpt();
4001 xmon_init(0);
4002 return;
4003 }
4004 /* ensure xmon is enabled */
4005 xmon_init(1);
4006 debugger(get_irq_regs());
4007 if (!xmon_on)
4008 xmon_init(0);
4009 }
4010
4011 static const struct sysrq_key_op sysrq_xmon_op = {
4012 .handler = sysrq_handle_xmon,
4013 .help_msg = "xmon(x)",
4014 .action_msg = "Entering xmon",
4015 };
4016
setup_xmon_sysrq(void)4017 static int __init setup_xmon_sysrq(void)
4018 {
4019 register_sysrq_key('x', &sysrq_xmon_op);
4020 return 0;
4021 }
4022 device_initcall(setup_xmon_sysrq);
4023 #endif /* CONFIG_MAGIC_SYSRQ */
4024
clear_all_bpt(void)4025 static void clear_all_bpt(void)
4026 {
4027 int i;
4028
4029 /* clear/unpatch all breakpoints */
4030 remove_bpts();
4031 remove_cpu_bpts();
4032
4033 /* Disable all breakpoints */
4034 for (i = 0; i < NBPTS; ++i)
4035 bpts[i].enabled = 0;
4036
4037 /* Clear any data or iabr breakpoints */
4038 iabr = NULL;
4039 for (i = 0; i < nr_wp_slots(); i++)
4040 dabr[i].enabled = 0;
4041 }
4042
4043 #ifdef CONFIG_DEBUG_FS
xmon_dbgfs_set(void * data,u64 val)4044 static int xmon_dbgfs_set(void *data, u64 val)
4045 {
4046 xmon_on = !!val;
4047 xmon_init(xmon_on);
4048
4049 /* make sure all breakpoints removed when disabling */
4050 if (!xmon_on) {
4051 clear_all_bpt();
4052 get_output_lock();
4053 printf("xmon: All breakpoints cleared\n");
4054 release_output_lock();
4055 }
4056
4057 return 0;
4058 }
4059
xmon_dbgfs_get(void * data,u64 * val)4060 static int xmon_dbgfs_get(void *data, u64 *val)
4061 {
4062 *val = xmon_on;
4063 return 0;
4064 }
4065
4066 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
4067 xmon_dbgfs_set, "%llu\n");
4068
setup_xmon_dbgfs(void)4069 static int __init setup_xmon_dbgfs(void)
4070 {
4071 debugfs_create_file("xmon", 0600, arch_debugfs_dir, NULL,
4072 &xmon_dbgfs_ops);
4073 return 0;
4074 }
4075 device_initcall(setup_xmon_dbgfs);
4076 #endif /* CONFIG_DEBUG_FS */
4077
4078 static int xmon_early __initdata;
4079
early_parse_xmon(char * p)4080 static int __init early_parse_xmon(char *p)
4081 {
4082 if (xmon_is_locked_down()) {
4083 xmon_init(0);
4084 xmon_early = 0;
4085 xmon_on = 0;
4086 } else if (!p || strncmp(p, "early", 5) == 0) {
4087 /* just "xmon" is equivalent to "xmon=early" */
4088 xmon_init(1);
4089 xmon_early = 1;
4090 xmon_on = 1;
4091 } else if (strncmp(p, "on", 2) == 0) {
4092 xmon_init(1);
4093 xmon_on = 1;
4094 } else if (strncmp(p, "rw", 2) == 0) {
4095 xmon_init(1);
4096 xmon_on = 1;
4097 xmon_is_ro = false;
4098 } else if (strncmp(p, "ro", 2) == 0) {
4099 xmon_init(1);
4100 xmon_on = 1;
4101 xmon_is_ro = true;
4102 } else if (strncmp(p, "off", 3) == 0)
4103 xmon_on = 0;
4104 else
4105 return 1;
4106
4107 return 0;
4108 }
4109 early_param("xmon", early_parse_xmon);
4110
xmon_setup(void)4111 void __init xmon_setup(void)
4112 {
4113 if (xmon_on)
4114 xmon_init(1);
4115 if (xmon_early)
4116 debugger(NULL);
4117 }
4118
4119 #ifdef CONFIG_SPU_BASE
4120
4121 struct spu_info {
4122 struct spu *spu;
4123 u64 saved_mfc_sr1_RW;
4124 u32 saved_spu_runcntl_RW;
4125 unsigned long dump_addr;
4126 u8 stopped_ok;
4127 };
4128
4129 #define XMON_NUM_SPUS 16 /* Enough for current hardware */
4130
4131 static struct spu_info spu_info[XMON_NUM_SPUS];
4132
xmon_register_spus(struct list_head * list)4133 void xmon_register_spus(struct list_head *list)
4134 {
4135 struct spu *spu;
4136
4137 list_for_each_entry(spu, list, full_list) {
4138 if (spu->number >= XMON_NUM_SPUS) {
4139 WARN_ON(1);
4140 continue;
4141 }
4142
4143 spu_info[spu->number].spu = spu;
4144 spu_info[spu->number].stopped_ok = 0;
4145 spu_info[spu->number].dump_addr = (unsigned long)
4146 spu_info[spu->number].spu->local_store;
4147 }
4148 }
4149
stop_spus(void)4150 static void stop_spus(void)
4151 {
4152 struct spu *spu;
4153 volatile int i;
4154 u64 tmp;
4155
4156 for (i = 0; i < XMON_NUM_SPUS; i++) {
4157 if (!spu_info[i].spu)
4158 continue;
4159
4160 if (setjmp(bus_error_jmp) == 0) {
4161 catch_memory_errors = 1;
4162 sync();
4163
4164 spu = spu_info[i].spu;
4165
4166 spu_info[i].saved_spu_runcntl_RW =
4167 in_be32(&spu->problem->spu_runcntl_RW);
4168
4169 tmp = spu_mfc_sr1_get(spu);
4170 spu_info[i].saved_mfc_sr1_RW = tmp;
4171
4172 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
4173 spu_mfc_sr1_set(spu, tmp);
4174
4175 sync();
4176 __delay(200);
4177
4178 spu_info[i].stopped_ok = 1;
4179
4180 printf("Stopped spu %.2d (was %s)\n", i,
4181 spu_info[i].saved_spu_runcntl_RW ?
4182 "running" : "stopped");
4183 } else {
4184 catch_memory_errors = 0;
4185 printf("*** Error stopping spu %.2d\n", i);
4186 }
4187 catch_memory_errors = 0;
4188 }
4189 }
4190
restart_spus(void)4191 static void restart_spus(void)
4192 {
4193 struct spu *spu;
4194 volatile int i;
4195
4196 for (i = 0; i < XMON_NUM_SPUS; i++) {
4197 if (!spu_info[i].spu)
4198 continue;
4199
4200 if (!spu_info[i].stopped_ok) {
4201 printf("*** Error, spu %d was not successfully stopped"
4202 ", not restarting\n", i);
4203 continue;
4204 }
4205
4206 if (setjmp(bus_error_jmp) == 0) {
4207 catch_memory_errors = 1;
4208 sync();
4209
4210 spu = spu_info[i].spu;
4211 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
4212 out_be32(&spu->problem->spu_runcntl_RW,
4213 spu_info[i].saved_spu_runcntl_RW);
4214
4215 sync();
4216 __delay(200);
4217
4218 printf("Restarted spu %.2d\n", i);
4219 } else {
4220 catch_memory_errors = 0;
4221 printf("*** Error restarting spu %.2d\n", i);
4222 }
4223 catch_memory_errors = 0;
4224 }
4225 }
4226
4227 #define DUMP_WIDTH 23
4228 #define DUMP_VALUE(format, field, value) \
4229 do { \
4230 if (setjmp(bus_error_jmp) == 0) { \
4231 catch_memory_errors = 1; \
4232 sync(); \
4233 printf(" %-*s = "format"\n", DUMP_WIDTH, \
4234 #field, value); \
4235 sync(); \
4236 __delay(200); \
4237 } else { \
4238 catch_memory_errors = 0; \
4239 printf(" %-*s = *** Error reading field.\n", \
4240 DUMP_WIDTH, #field); \
4241 } \
4242 catch_memory_errors = 0; \
4243 } while (0)
4244
4245 #define DUMP_FIELD(obj, format, field) \
4246 DUMP_VALUE(format, field, obj->field)
4247
dump_spu_fields(struct spu * spu)4248 static void dump_spu_fields(struct spu *spu)
4249 {
4250 printf("Dumping spu fields at address %p:\n", spu);
4251
4252 DUMP_FIELD(spu, "0x%x", number);
4253 DUMP_FIELD(spu, "%s", name);
4254 DUMP_FIELD(spu, "0x%lx", local_store_phys);
4255 DUMP_FIELD(spu, "0x%p", local_store);
4256 DUMP_FIELD(spu, "0x%lx", ls_size);
4257 DUMP_FIELD(spu, "0x%x", node);
4258 DUMP_FIELD(spu, "0x%lx", flags);
4259 DUMP_FIELD(spu, "%llu", class_0_pending);
4260 DUMP_FIELD(spu, "0x%llx", class_0_dar);
4261 DUMP_FIELD(spu, "0x%llx", class_1_dar);
4262 DUMP_FIELD(spu, "0x%llx", class_1_dsisr);
4263 DUMP_FIELD(spu, "0x%x", irqs[0]);
4264 DUMP_FIELD(spu, "0x%x", irqs[1]);
4265 DUMP_FIELD(spu, "0x%x", irqs[2]);
4266 DUMP_FIELD(spu, "0x%x", slb_replace);
4267 DUMP_FIELD(spu, "%d", pid);
4268 DUMP_FIELD(spu, "0x%p", mm);
4269 DUMP_FIELD(spu, "0x%p", ctx);
4270 DUMP_FIELD(spu, "0x%p", rq);
4271 DUMP_FIELD(spu, "0x%llx", timestamp);
4272 DUMP_FIELD(spu, "0x%lx", problem_phys);
4273 DUMP_FIELD(spu, "0x%p", problem);
4274 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
4275 in_be32(&spu->problem->spu_runcntl_RW));
4276 DUMP_VALUE("0x%x", problem->spu_status_R,
4277 in_be32(&spu->problem->spu_status_R));
4278 DUMP_VALUE("0x%x", problem->spu_npc_RW,
4279 in_be32(&spu->problem->spu_npc_RW));
4280 DUMP_FIELD(spu, "0x%p", priv2);
4281 DUMP_FIELD(spu, "0x%p", pdata);
4282 }
4283
spu_inst_dump(unsigned long adr,long count,int praddr)4284 static int spu_inst_dump(unsigned long adr, long count, int praddr)
4285 {
4286 return generic_inst_dump(adr, count, praddr, print_insn_spu);
4287 }
4288
dump_spu_ls(unsigned long num,int subcmd)4289 static void dump_spu_ls(unsigned long num, int subcmd)
4290 {
4291 unsigned long offset, addr, ls_addr;
4292
4293 if (setjmp(bus_error_jmp) == 0) {
4294 catch_memory_errors = 1;
4295 sync();
4296 ls_addr = (unsigned long)spu_info[num].spu->local_store;
4297 sync();
4298 __delay(200);
4299 } else {
4300 catch_memory_errors = 0;
4301 printf("*** Error: accessing spu info for spu %ld\n", num);
4302 return;
4303 }
4304 catch_memory_errors = 0;
4305
4306 if (scanhex(&offset))
4307 addr = ls_addr + offset;
4308 else
4309 addr = spu_info[num].dump_addr;
4310
4311 if (addr >= ls_addr + LS_SIZE) {
4312 printf("*** Error: address outside of local store\n");
4313 return;
4314 }
4315
4316 switch (subcmd) {
4317 case 'i':
4318 addr += spu_inst_dump(addr, 16, 1);
4319 last_cmd = "sdi\n";
4320 break;
4321 default:
4322 prdump(addr, 64);
4323 addr += 64;
4324 last_cmd = "sd\n";
4325 break;
4326 }
4327
4328 spu_info[num].dump_addr = addr;
4329 }
4330
do_spu_cmd(void)4331 static int do_spu_cmd(void)
4332 {
4333 static unsigned long num = 0;
4334 int cmd, subcmd = 0;
4335
4336 cmd = inchar();
4337 switch (cmd) {
4338 case 's':
4339 stop_spus();
4340 break;
4341 case 'r':
4342 restart_spus();
4343 break;
4344 case 'd':
4345 subcmd = inchar();
4346 if (isxdigit(subcmd) || subcmd == '\n')
4347 termch = subcmd;
4348 fallthrough;
4349 case 'f':
4350 scanhex(&num);
4351 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
4352 printf("*** Error: invalid spu number\n");
4353 return 0;
4354 }
4355
4356 switch (cmd) {
4357 case 'f':
4358 dump_spu_fields(spu_info[num].spu);
4359 break;
4360 default:
4361 dump_spu_ls(num, subcmd);
4362 break;
4363 }
4364
4365 break;
4366 default:
4367 return -1;
4368 }
4369
4370 return 0;
4371 }
4372 #else /* ! CONFIG_SPU_BASE */
do_spu_cmd(void)4373 static int do_spu_cmd(void)
4374 {
4375 return -1;
4376 }
4377 #endif
4378